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2005-06-07 * Makefile.am (ALL_MACHINES): Add ms1 support.Aldy Hernandez1-0/+5
(ALL_MACHINES_CFILES): Same. (BFD32_BACKENDS): Same. (BFD32_BACKENDS_CFILES): Same. * Makefile.in: Regenerate. * archures.c (bfd_architecture): Add ms1 entries. Externalize bfd_ms1_arch. (bfd_archures_list): Add bfd_ms1_arch. * bfd-in2.h: Regenerate. * cpu-ms1.c: New file. * elf32-ms1.c: New file. * targets.c: Define extern of bfd_elf32_ms1_vec. Add bfd_elf32_ms1_vec to _bfd_target_vector. * configure.in: Add bfd_elf32_ms1_vec case. * configure: Regenerate. * config.bfd: Add ms1-*-elf to table.
2005-05-04Update the address and phone number of the FSF organization in the GPL noticesNick Clifton1-1/+1
2005-05-04Update the FSF address in the copyright/GPL noticeNick Clifton1-1/+1
2005-01-17Fix SH2A machine variants in order to correctly select instruction inheritanceNick Clifton1-4/+4
2005-01-10Add support for maxq10 and maxq20 machine valuesNick Clifton1-1/+3
2004-12-09 * archures.c: Define bfd_mach_mips9000.Ian Lance Taylor1-0/+1
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_9000. (mips_set_isa_flags): Handle bfd_mach_mips9000. * cpu-mips.c (I_mips9000): Define. (arch_info_struct): Add case for bfd_mach_mips9000. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mips9000. * bfd-in2.h: Regenerate.
2004-11-08Add support fpr MAXQ processorNick Clifton1-0/+7
2004-11-04 * config.bfd: Support crisv32-*-* like cris-*-*.Hans-Peter Nilsson1-0/+3
* archures.c (bfd_mach_cris_v0_v10, bfd_mach_cris_v32) (bfd_mach_cris_v10_v32): New macros. * cpu-cris.c: Tweak formatting. (get_compatible): New function. (N): New macro. (bfd_cris_arch_compat_v10_v32, bfd_cris_arch_v32): New bfd_arch_info_type:s. (bfd_cris_arch): Use bfd_mach_cris_v0_v10 for member mach, get_compatible for member compatible and link bfd_cris_arch_v32 as next. * elf32-cris.c (cris_elf_pcrel_reloc) (cris_elf_set_mach_from_flags): New functions. (cris_elf_howto_table) <R_CRIS_8_PCREL, R_CRIS_16_PCREL> <R_CRIS_32_PCREL>: Use cris_elf_pcrel_reloc. (cris_elf_grok_prstatus, cris_elf_grok_psinfo): Give correct numbers for bfd_mach_cris_v32. (PLT_ENTRY_SIZE_V32): New macro. (elf_cris_plt0_entry): Drop last comma in initializer. (elf_cris_plt0_entry_v32, elf_cris_plt_entry_v32) (elf_cris_pic_plt0_entry_v32, elf_cris_pic_plt_entry_v32): New PLT initializers. (cris_elf_relocate_section): Change all "%B(%A)" messages to "%B, section %A". (elf_cris_finish_dynamic_symbol): Do V32-specific PLT entries. (elf_cris_finish_dynamic_sections): Similar. (elf_cris_adjust_dynamic_symbol): Similar. (cris_elf_check_relocs): Change all "%B(%A)" messages to "%B, section %A". <switch with PIC relocs>: Emit error and return FALSE for bfd_mach_cris_v10_v32. <case R_CRIS_8_PCREL, case R_CRIS_16_PCREL, case R_CRIS_32_PCREL>: Emit warning when generating textrel reloc. (cris_elf_object_p): Call cris_elf_set_mach_from_flags. (cris_elf_final_write_processing): Set flags according to mach. (cris_elf_print_private_bfd_data): Display EF_CRIS_VARIANT_COMMON_V10_V32 and EF_CRIS_VARIANT_V32. (cris_elf_merge_private_bfd_data): Drop variables old_flags, new_flags. Don't call cris_elf_final_write_processing. Don't look at the actual elf header flags at all; use bfd_get_symbol_leading_char to check ibfd, obfd. Trap difference in bfd_get_mach for ibfd and obfd and handle merging of compatible objects. (bfd_elf32_bfd_copy_private_bfd_data): Define. * reloc.c (BFD_RELOC_CRIS_SIGNED_8, BFD_RELOC_CRIS_UNSIGNED_8) (BFD_RELOC_CRIS_SIGNED_16, BFD_RELOC_CRIS_UNSIGNED_16) (BFD_RELOC_CRIS_LAPCQ_OFFSET): New relocs. * bfd-in2.h, libbfd.h: Regenerate.
2004-07-30 * archures.c (bfd_mach_sparc_64bit_p): Define.Jakub Jelinek1-0/+3
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Use it. * bfd-in2.h: Rebuilt.
2004-07-29include/elf/ChangeLog:Alexandre Oliva1-0/+2
Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * sh.h (EF_SH2A_NOFPU): New. 2003-12-01 Michael Snyder <msnyder@redhat.com> * sh.h (EF_SH2A): New. bfd/ChangeLog: Introduce SH2a support. 2004-02-18 Corinna Vinschen <vinschen@redhat.com> * archures.c (bfd_mach_sh2a_nofpu): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH2A_NOFPU_NEXT): New. (arch_info_struct): Add sh2a_nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a_nofpu. 2003-12-29 DJ Delorie <dj@redhat.com> * reloc.c: Add relocs for sh2a. * bfd-in2.h: Regenerate. * libbfd.hh: Regenerate. 2003-12-01 Michael Snyder <msnyder@redhat.com> * archures.c (bfd_mach_sh2a): New. * bfd-in2.h: Rebuilt. * cpu-sh.c (SH_NEXT, SH2_NEXT, etc.): Change defines to enums. (SH2A_NEXT): New. (arch_info_struct): Add sh2a. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle sh2a. binutils/ChangeLog: * readelf.c (get_machine_flags <EM_SH>): Handle EF_SH2A and EF_SH2A_NOFPU. gas/ChangeLog: Introduce SH2a support. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (get_specific): Change arch_sh2a_up to arch_sh2a_nofpu_up. 2004-02-24 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (md_parse_option): Add sh2a-nofpu ISA handling. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c (sh_elf_final_processing): Move sh2a recognition to end of conditional expression. 2004-02-20 Corinna Vinschen <vinschen@redhat.com> * config/tc-sh.c: Add sh2a-nofpu support. 2003-12-29 DJ Delorie <dj@redhat.com> * tc-sh.c: Add sh2a support. (parse_reg): Add tbr. (parse_at): Support @@(disp,tbr). (get_specific): Support sh2a opcodes. (insert4): New, for 4 byte relocs. (build_Mytes): Support sh2a opcodes. (md_apply_fix3_Mytes): Support sh2a opcodes. 2003-12-02 Michael Snyder <msnyder@redhat.com> * config/tc-sh.c (md_parse_option): Handle sh2a. (sh_elf_final_processing): Ditto. gas/testsuite/ChangeLog: 2003-12-30 DJ Delorie <dj@redhat.com> * gas/sh/sh2a.s: New. * gas/sh/sh2a.d: New. * gas/sh/basic.exp: Add it.
2004-07-07Add new port: crx-elfNick Clifton1-0/+4
2004-05-282004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-0/+1
bfd: * Makefile.am: Regenerate dependencies. * Makefile.in: Regenerate. * archures.c: Add bfd_mach_sh3_nommu . * bfd-in2.h: Regenerate. * cpu-sh.c: Add sh3-nommu architecture. (bfd_to_arch_table): Create new table. (sh_get_arch_from_bfd_mach): Create new function. (sh_get_arch_up_from_bfd_mach): Create new function. (sh_merge_bfd_arch): Create new function. * elf32-sh.c (sh_ef_bfd_table): Add table. (sh_elf_check_relocs): Replace switch statement with use of sh_ef_bfd_table . (sh_elf_get_flags_from_mach): Add new function. (sh_find_elf_flags): Likewise. (sh_elf_copy_private_data): Replace most of non-elf contents with a call to sh_merge_bfd_arch() . gas: * Makefile.am: Regenerate dependecies. * Makefile.in: Regenerate. * config/tc-sh.c (valid_arch): Make unsigned. (preset_target_arch): Likewise. (md_begin): Use new architecture flags system. (get_specific): Likewise. (assemble_ppi): Likewise. (md_assemble): Likewise. Also fix error check for bad opcodes. (md_parse_option): Likewise. Also generate -isa values according to the table in bfd/cpu-sh.c instead of just constants. Also allow <arch>-up ISA variants. (sh_elf_final_processing): Replace if-else chain with a call to sh_find_elf_flags(). * testsuite/gas/sh/arch: New directory. * testsuite/gas/sh/arch/arch.exp: New test script. * testsuite/gas/sh/arch/arch_expected.txt: New file. * testsuite/gas/sh/arch/sh.s: New file. * testsuite/gas/sh/arch/sh2.s: New file. * testsuite/gas/sh/arch/sh-dsp.s: New file. * testsuite/gas/sh/arch/sh2e.s: New file. * testsuite/gas/sh/arch/sh3-nommu.s: New file. * testsuite/gas/sh/arch/sh3.s: New file. * testsuite/gas/sh/arch/sh3-dsp.s: New file. * testsuite/gas/sh/arch/sh3e.s: New file. * testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file. * testsuite/gas/sh/arch/sh4-nofpu.s: New file. * testsuite/gas/sh/arch/sh4.s: New file. * testsuite/gas/sh/arch/sh4a-nofpu.s: New file. * testsuite/gas/sh/arch/sh4al-dsp.s: New file. * testsuite/gas/sh/arch/sh4a.s: New file. include/elf: * sh.h (EF_SH_HAS_DSP): Remove. (EF_SH_HAS_FP): Remove. (EF_SH_MERGE_MACH): Remove. (EF_SH4_NOFPU): Convert to decimal. (EF_SH4A_NOFPU): Likewise. (EF_SH4_NOMMU_NOFPU): Likewise. (EF_SH3_NOMMU): Add new macro. (EF_SH_BFD_TABLE): Likewise. (sh_find_elf_flags): Add prototype. (sh_elf_get_flags_from_mach): Likewise. opcodes: * sh-dis.c (target_arch): Make unsigned. (print_insn_sh): Replace (most of) switch with a call to sh_get_arch_from_bfd_mach(). Also use new architecture flags system. * sh-opc.h: Redefine architecture flags values. Add sh3-nommu architecture. Reorganise <arch>_up macros so they make more visual sense. (SH_MERGE_ARCH_SET): Define new macro. (SH_VALID_BASE_ARCH_SET): Likewise. (SH_VALID_MMU_ARCH_SET): Likewise. (SH_VALID_CO_ARCH_SET): Likewise. (SH_VALID_ARCH_SET): Likewise. (SH_MERGE_ARCH_SET_VALID): Likewise. (SH_ARCH_SET_HAS_FPU): Likewise. (SH_ARCH_SET_HAS_DSP): Likewise. (SH_ARCH_UNKNOWN_ARCH): Likewise. (sh_get_arch_from_bfd_mach): Add prototype. (sh_get_arch_up_from_bfd_mach): Likewise. (sh_get_bfd_mach_from_arch_set): Likewise. (sh_merge_bfd_arc): Likewise. ld: * testsuite/ld-sh/arch/arch.exp: New test script. * testsuite/ld-sh/arch/arch_expected.txt: New file. * testsuite/ld-sh/arch/sh.s: New file. * testsuite/ld-sh/arch/sh2.s: New file. * testsuite/ld-sh/arch/sh-dsp.s: New file. * testsuite/ld-sh/arch/sh2e.s: New file. * testsuite/ld-sh/arch/sh3-nommu.s: New file. * testsuite/ld-sh/arch/sh3.s: New file. * testsuite/ld-sh/arch/sh3-dsp.s: New file. * testsuite/ld-sh/arch/sh3e.s: New file. * testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file. * testsuite/ld-sh/arch/sh4-nofpu.s: New file. * testsuite/ld-sh/arch/sh4.s: New file. * testsuite/ld-sh/arch/sh4a-nofpu.s: New file. * testsuite/ld-sh/arch/sh4al-dsp.s: New file. * testsuite/ld-sh/arch/sh4a.s: New file.
2004-05-05Add support for 521x,5249,547x,548x.Nick Clifton1-0/+4
2004-04-22Add support for ColdFire MAC instructions and tidy up support for other m68kNick Clifton1-0/+1
variants.
2004-03-30Add (linker) support for CR16C processorNick Clifton1-0/+4
2004-03-032003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>Joern Rennecke1-1/+2
opcodes: * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu. * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions accordingly. bfd: * archures.c: Add bfd_mach_sh4_nommu_nofpu. * cpu-sh.c: Ditto. * elf32-sh.c: Ditto. * bfd-in2.h: Regenerate. include/elf: * sh.h: Add EF_SH4_NOMMU_NOFPU. gas: * config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and -isa=sh4-nommu-nofpu options. Adjust help messages accordingly. (sh_elf_final_processing): Output BFD type sh4_nofpu if that is the most general type or the user specifically requested it. (md_assemble): Add a new error message for when an instruction is understood, but is not allowed due to an -isa option.
2004-03-01Add fr450 support.Richard Sandiford1-0/+1
2003-12-03Add support for the M32R2 processor.Nick Clifton1-0/+1
2003-11-24 * aix5ppc-core.c: Fix comment typos.Kazu Hirata1-2/+2
* aout-arm.c: Likewise. * aout-ns32k.c: Likewise. * aoutx.h: Likewise. * archures.c: Likewise. * bfd-in.h: Likewise. * bfd.c: Likewise. * bfdio.c: Likewise. * coff-arm.c: Likewise. * coff-h8300.c: Likewise. * coff-i860.c: Likewise. * coff-m88k.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-z8k.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * cofflink.c: Likewise. * cpu-alpha.c: Likewise. * cpu-arm.c: Likewise. * cpu-ns32k.c: Likewise. * dwarf2.c: Likewise. * bfd-in2.h: Regenerate.
2003-10-21 * archures.c (bfd_mach_sh4a, bfd_mach_sh4al_dsp, bfd_mach_sh4_nofpu,Corinna Vinschen1-0/+4
bfd_mach_sh4a_nofpu): New machine types. * bfd-in2.h: Rebuilt. * cpu-sh.c (compatible): Remove unused function. (SH4A_NEXT, SH4AL_DSP_NEXT, SH4_NOFPU_NEXT, SH4A_NOFPU_NEXT): New. (arch_info_struct): Add sh4a, sh4al_dsp, sh4-nofpu and sh4a-nofpu. * elf32-sh.c (sh_elf_set_mach_from_flags): Handle them.
2003-10-21Add ColfFire v4 supportNick Clifton1-0/+5
2003-10-082003-10-08 Dave Brolley <brolley@redhat.com>Dave Brolley1-0/+1
On behalf of Michael Snyder <msnyder@redhat.com> * archures.c: Add FRV fr550 machine. * cpu-frv.c: Ditto. * elf32-frv.c: Ditto. * bfd-in2.h: Regenerate.
2003-09-30[ bfd/ChangeLog ]Chris Demetriou1-0/+1
2003-09-30 Chris Demetriou <cgd@broadcom.com> * archures.c (bfd_mach_mipsisa64r2): New define. * bfd-in2.h: Regenerate. * aoutx.h (NAME(aout,machine_type)): Handle bfd_mach_mipsisa64r2. * cpu-mips.c (I_mipsisa64r2): New enum value. (arch_info_struct): Add entry for I_mipsisa64r2. * elfxx-mips.c (_bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_64R2. (mips_set_isa_flags): Add bfd_mach_mipsisa64r2 case. (mips_mach_extensions): Add entry for bfd_mach_mipsisa64r2. [ binutils/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * readelf.c (get_machine_flags): Handle E_MIPS_ARCH_64R2. [ gas/Changelog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * configure.in (mipsisa64r2, mipsisa64r2el, mipsisa64r2*): New CPUs. * configure: Regenerate. * config/tc-mips.c (imm2_expr): New variable. (md_assemble, mips16_ip): Initialize imm2_expr. (ISA_HAS_64BIT_REGS, ISA_HAS_DROR, ISA_HAS_ROR): Add ISA_MIPS64R2. (macro_build): Handle +A, +B, +C, +E, +F, +G, and +H format operands. (macro): Handle M_DEXT and M_DINS. (validate_mips_insn): Handle +E, +F, +G, +H, and +I format operands. (mips_ip): Likewise. (OPTION_MIPS64R2): New define. (md_longopts): New entry for -mips64r2 (OPTION_MIPS64R2). OPTION_ASE_BASE): Increase to compensate for OPTION_MIPS64R2. (md_parse_option): Handle OPTION_MIPS64R2. (s_mipsset): Handle setting "mips64r2" ISA. (mips_cpu_info_table): Add mips64r2. (md_show_usage): Document -mips64r2 option. * doc/as.texinfo: Docuemnt -mips64r2 option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips64r2.d: New file. * gas/mips/cp0sel-names-mips64r2.d: New file. * gas/mips/elf_arch_mips64r2.d: New file. * gas/mips/hwr-names-mips64r2.d: New file. * gas/mips/mips32r2-ill-fp64.l: New file. * gas/mips/mips32r2-ill-fp64.s: New file. * gas/mips/mips64r2-ill.l: New file. * gas/mips/mips64r2-ill.s: New file. * gas/mips/mips64r2.d: New file. * gas/mips/mips64r2.s: New file. * gas/mips/mips.exp: Define "mips64r2" arch, and run new tests. [ include/elf/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_64R2): New define. [ include/opcode/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document +E, +F, +G, +H, and +I operand types. Update documentation of I, +B and +C operand types. (INSN_ISA64R2, ISA_MIPS64R2, CPU_MIPS64R2): New defines. (M_DEXT, M_DINS): New enum values. [ ld/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ldmain.c (get_emulation): Ignore "-mips64r2". [ ld/testsuite/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * ld-mips-elf/mips-elf-flags.exp: Add tests for combinations with MIPS64r2. [ opcodes/ChangeLog ] 2003-09-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_arch_choices): Add entry for "mips64r2" (print_insn_args): Add handing for +E, +F, +G, and +H. * mips-opc.c (I65): New define for MIPS64r2. (mips_builtin_opcodes): Add "dext", "dextm", "dextu", "dins", "dinsm", "dinsu", "drotl", "drotr", "drotr32", "drotrv", "dsbh", and "dshd" for MIPS64r2. Adjust "dror", "dror32", and "drorv" to be supported on MIPS64r2.
2003-09-08 * archures.c: Add new machine names for hppa.Joel Brobecker1-0/+4
* bfd-in2.h: Regenerate. * cpu-hppa.c: Use the new machine names.
2003-09-04Add binutils support for v850e1 processorNick Clifton1-0/+1
2003-08-08Add MSP430 variantsNick Clifton1-4/+5
2003-07-15include/opcode/Richard Sandiford1-0/+1
* mips.h (CPU_RM7000): New macro. (OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns. bfd/ * archures.c (bfd_mach_mips7000): New. * bfd-in2.h: Regenerated. * cpu-mips.c (arch_info_struct): Add an entry for mips:7000. * elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000. (mips_mach_extensions): Add an entry for it. opcodes/ * mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries. gas/ * config/tc-mips.c (hilo_interlocks): True for CPU_RM7000. (mips_cpu_info_table): Add rm7000 and rm9000 entries. gas/testsuite/ * gas/mips/rm7000.[sd]: New test. * gas/mips/mips.exp: Run it.
2003-07-102001-05-06 Alexandre Oliva <aoliva@redhat.com>Alexandre Oliva1-0/+1
* elf-m10300.c (compute_function_info): Account for AM33 registers in `movm' when computing stack space for `call' when linking for AM33/2.0 link. 2000-04-01 Alexandre Oliva <aoliva@cygnus.com> * archures.c (bfd_mach_am33_2): Renamed from bfd_mach_am332. * bfd-in2.h: Rebuilt. * cpu-m10300.c (bfd_am33_2_arch): Renamed from bfd_am332_arch. * elf-m10300.c: Updated. 2000-03-31 Alexandre Oliva <aoliva@cygnus.com> * archures.c (bfd_mach_am332): Defined. * bfd-in2.h: Rebuilt. * cpu-m10300.c (bfd_am332_arch): Defined. (bfd_am33_arch): Chained with am33-2. * elf-m10300.c (elf_mn10300_mach): Handle am332. (_bfd_mn10300_elf_final_write_processing): Likewise.
2003-06-29Convert to C90 and a few tweaks.Alan Modra1-73/+47
2003-06-10include/elf/Richard Sandiford1-0/+1
* h8.h (E_H8_MACH_H8300SXN): New flag. bfd/ * archures.c (bfd_mach_h8300sxn): New architecture. * bfd-in2.h: Regenerate. * cpu-h8300.c (h8300_scan): Check for 'sxn'. (h8300sxn_info_struct): New. (h8300sx_info_struct): Link to it. * elf32-h8300.c (elf32_h8_mach): Add h8300sxn case. (elf32_h8_final_write_processing): Likewise. gas/ * config/tc-h8300.c (h8300sxnmode): New. (md_pseudo_table): Add .h8300sxn entry. Sync others with FSF version. ld/ * configure.tgt (h8300*): Add h8300sxn emulations. * Makefile.am (ALL_EMULATIONS): Add eh8300sxn.o and eh8300sxnelf.o. (eh8300sxn.c, eh8300sxnelf.c): New rules. * Makefile.in: Regenerate. * emulparams/h8300sxnelf.sh, emulparams/h8300sxn.sh: New files.
2003-05-162003-05-16 Michael Snyder <msnyder@redhat.com>Michael Snyder1-0/+1
From Bernd Schmidt <bernds@redhat.com> * archures.c (bfd_mach_h8300sx): New. * bfd-in2.h: Regenerate. * cpu-h8300.c (h8300_scan)): Add support for h8300sx. (h8300sx_info_struct): New. (h8300s_info_struct): Link to it. * elf32-h8300.c (elf32_h8_mach): Add support for h8300sx. (elf32_h8_final_write_processing): Likewise. (elf32_h8_relax_section): Likewise.
2003-04-24Add support for h8300hn and h8300snNick Clifton1-3/+5
2003-04-23bfd:Joern Rennecke1-1/+1
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH. * cpu-sh.c: Likewise. * elf32-sh.c: Likewise. * reloc.c (bfd_reloc_code_real): Likewise. * elf32-sh64-com.c: Change comment to refer to SuperH. * elf32-sh64.c: Likewise. * elf64-sh64.c: Likewise. * bfd-in2.h (enum bfd_architecture): Regenerate. binutils: * readelf.c (get_machine_name) <EM_SH>: Amend return value to refer to SuperH. gas: * config/tc-sh.c: Amend comment to refer to SuperH. * config/tc-sh.h: Likewise. (LISTING_HEADER): Amend to refer to SuperH. * config/tc-sh64.c: Change comment to refer to SuperH. * config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH. * doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH. * doc/c-sh.texi: Amend to refer to SuperH. Add SuperH architecture documentation references. * doc/c-sh64.texi: Change to refer to SuperH. include/elf: * common.h (EM_SH): Amend comment to refer to SuperH. ld/testsuite: * ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH. * ld-sh/sh64/crange3-media.rd (Machine): Likewise.
2003-04-22Replace references to Mitsubishi M32R with references to Renesas M32R.Nick Clifton1-1/+1
2003-04-15Replace occurrances of 'Hitachi' with 'Renesas'.Nick Clifton1-3/+3
2003-04-04Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and ↵Svein Seldal1-2/+2
s/c3x/tic3x/. 2003 copyright update
2003-04-01Add Xtensa portNick Clifton1-0/+4
2003-04-01Fixes for iWMMXt contribution.Nick Clifton1-0/+1
2003-03-25Add iWMMXt supportNick Clifton1-0/+1
2003-02-10Add support for marking ARM ELF binaries as support the Cirrus EP9312 MaverickNick Clifton1-0/+1
floating point co-processor.
2003-01-23Add SH2E supportNick Clifton1-0/+1
2003-01-03 * Makefile.am (ALL_MACHINES): Add cpu-iq2000.lo.Stan Cox1-1/+6
(ALL_MACHINES_CFILES): Add cpu-iq2000.c. (BFD32_BACKENDS): Add elf32-iq2000.lo. (BFD32_BACKENDS_CFILES): Add elf32-iq2000.c. (cpu-iq2000.lo): New target. * Makefile.in: Regenerate. * config.bfd: Handle iq2000-*-elf. * archures.c (bfd_architecture): Add bfd_{arch,mach}_iq2000. (bfd_archures_list): Add bfd_iq2000_arch. * configure.in: Handle bfd_elf32_iq2000_vec. * configure: Regenerate. * reloc.c: Add BFD_RELOC_IQ2000_OFFSET_16, BFD_RELOC_IQ2000_OFFSET_21, and BFD_RELOC_IQ2000_UHI16. * targets.c (bfd_elf32_iq2000_vec): Declare. (bfd_target_vector): Add bfd_elf32_iq2000_vec. * elf.c (prep_headers): Set e_machine to EM_IQ2000. * cpu-iq2000.c: New file. * elf32-iq2000.c: Likewise. * libbfd.h: Regenerate. * bfd-in2.h: Likewise.
2002-12-31[ bfd/ChangeLog ]Chris Demetriou1-0/+1
2002-12-30 Chris Demetriou <cgd@broadcom.com> * aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case. * archures.c (bfd_mach_mipsisa32r2): New define. * bfd-in2.h: Regenerate. * cpu-mips.c (I_mipsisa32r2): New enum value. (arch_info_struct): Add entry for I_mipsisa32r2. * elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach) (_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2. (_bfd_mips_elf_final_write_processing): Add bfd_mach_mipsisa32r2 case. (_bfd_mips_elf_merge_private_bfd_data): Handle merging of binaries marked as using MIPS32 Release 2. [ binutils/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register) changes in MIPS -M options. [ gas/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * configure.in: Recognize mipsisa32r2, mipsisa32r2el, and CPU variants. * configure: Regenerate. * config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines. (macro_build): Handle "K" operand. (macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where CPU_HAS_DROR and CPU_HAS_ROR are currently used. (mips_ip): New variable "lastpos", and implement "+A", "+B", and "+C" operands for MIPS32 Release 2 ins/ext instructions. Implement "K" operand for MIPS32 Release 2 rdhwr instruction. (validate_mips_insn): Implement "+" as a way to extend the allowed operands, and implement "K", "+A", "+B", and "+C" operands. (OPTION_MIPS32R2): New define. (md_longopts): Add entry for OPTION_MIPS32R2. (OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2. (md_parse_option): Handle OPTION_MIPS32R2. (s_mipsset): Reimplement handling of ".set mipsN" options and add support for ".set mips32r2". (mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2). (md_show_usage): Document "-mips32r2" option. * doc/as.texinfo: Document "-mips32r2" option. * doc/c-mips.texi: Likewise. [ gas/testsuite/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * gas/mips/cp0-names-mips32r2.d: New test. * gas/mips/hwr-names-mips32r2.d: New test. * gas/mips/hwr-names-numeric.d: New test. * gas/mips/hwr-names.s: New test source file. * gas/mips/mips32r2.d: New test. * gas/mips/mips32r2.s: New test source file. * gas/mips/mips32r2-ill.l: New test. * gas/mips/mips32r2-ill.s: New test source file. * gas/mips/mips.exp: Add mips32r2 architecture data array entry. Run new tests mentioned above. [ include/elf/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h (E_MIPS_ARCH_32R2): New define. [ include/opcode/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips.h: Document "+" as the start of two-character operand type names, and add new "K", "+A", "+B", and "+C" operand types. (OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB) (OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New defines. [ opcodes/ChangeLog ] 2002-12-30 Chris Demetriou <cgd@broadcom.com> * mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric) (mips_hwr_names_mips3264r2): New arrays. (mips_arch_choice): New "hwr_names" member. (mips_arch_choices): Adjust for structure change, and add a new entry for "mips32r2" ISA. (mips_hwr_names): New variable. (set_default_mips_dis_options): Set mips_hwr_names. (parse_mips_dis_option): New "hwr-names" option which sets mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names. (print_insn_arg): Change return type to "int" and use that to indicate number of characters consumed. Add support for "+" operand extension character, "+A", "+B", "+C", and "K" operands. (print_insn_mips): Adjust for changes to print_insn_arg. (print_mips_disassembler_options): Adjust for "hwr-names" addition and "reg-names" change. * mips-opc (I33): New define (shorthand for INSN_ISA32R2). (mips_builtin_opcodes): Note that "nop" and "ssnop" are special forms of "sll". Add new MIPS32 Release 2 instructions: ehb, di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2, rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh. Note that hardware rotate instructions (ror, rorv) can be used on MIPS32 Release 2, and add the official mnemonics for them (rotr, rotrv) and the similar "rotl" mnemonic for left-rotate.
2002-12-30Add support for msp430.Nick Clifton1-0/+16
2002-12-23Change linker's default behaviour - it will now reject binary files whoesNick Clifton1-13/+25
architecture it does not recognise, unless it has explicitly told to accept them.
2002-12-01 * bfd-in2.h (bfd_mach_m6812): Rebuild.Stephane Carrez1-0/+3
* archures.c (bfd_mach_m6812_default, bfd_mach_m6812, bfd_mach_m6812s): Declare. * elf32-m68hc12.c (m68hc12_elf_set_mach_from_flags): New function. (_bfd_m68hc12_elf_set_private_flags): Call it. (_bfd_m68hc12_elf_print_private_bfd_data): Report processor version. (_bfd_m68hc12_elf_merge_private_bfd_data): Merge the flags and report microcontroller incompatibilities (HC12 vs HCS12). (elf_backend_object_p): Update.
2002-11-30s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. SimplifyAlan Modra1-19/+19
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-11-06Add support for PEF, Mach-O, xSYMNick Clifton1-12/+13
2002-10-14 * archures.c (bfd_mach_i386_i386, bfd_mach_i386_i8086,Alan Modra1-25/+25
bfd_mach_i386_i386_intel_syntax, bfd_mach_x86_64, bfd_mach_x86_64_intel_syntax bfd_mach_ppc, bfd_mach_ppc64, bfd_mach_rs6k, bfd_mach_d10v, bfd_mach_sh, bfd_mach_v850, bfd_mach_arc_5, bfd_mach_arc_6, bfd_mach_arc_7, bfd_mach_arc_8, bfd_mach_m32r, bfd_mach_frv, bfd_mach_frvsimple, bfd_mach_ia64_elf64, bfd_mach_ia64_elf32, bfd_mach_ip2022, bfd_mach_ip2022ext, bfd_mach_s390_31, bfd_mach_s390_64, bfd_mach_xstormy16): Renumber. * bfd-in2.h: Regenerate.
2002-09-30[include/elf]Richard Sandiford1-0/+3
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New. [bfd/] * archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New. (bfd_mach_mips5500): New. * cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New. (arch_info_struct): Add corresponding entries here. * elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120, E_MIPS_MACH_5400 and E_MIPS_MACH_5500. (_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120, bfd_mach_mips5400 and bfd_mach_mips5500. (_bfd_mips_elf_mach_extends_p): New function. (_bfd_mips_elf_merge_private_bfd_data): Use it to help merge the EF_MIPS_MACH flags. * bfd-in2.h: Regenerate.
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