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path: root/bfd/archures.c
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2000-04-21IA-64 ELF support.Jim Wilson1-0/+3
2000-04-07BFD and include/coff support for tic54x target.Timothy Wall1-0/+3
2000-03-27ATMEL AVR microcontroller support.Alan Modra1-1/+8
2000-02-23Add IBM 370 support.Alan Modra1-0/+3
2000-02-21This lot mainly cleans up `comparison between signed and unsigned' gccAlan Modra1-6/+5
warnings. One usused var, and a macro parenthesis fix too. Also check input sections are elf when doing gc in elflink.h.
2000-02-17bfd:Joern Rennecke1-1/+26
Reinstate bits of sh4 support that got accidentally deleted. Add sh-dsp support. bfd: * archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros. (bfd_mach_sh3_dsp): Likewise. (bfd_mach_sh4): Reinstate. (bfd_default_scan): Recognize 7410, 7708, 7729 and 7750. * bfd-in2.h: Regenerate. * coff-sh.c (struct sh_opcode): flags is no longer short. (USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros. (sh_opcode41, sh_opcode42): Integrate as sh_opcode41. (sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes. (sh_opcode41, sh_opcode4, sh_opcode80): Likewise. (sh_opcodes): No longer const. (sh_dsp_opcodef0, sh_dsp_opcodef): New arrays. (sh_insn_uses_reg): Check for USESAS and USESR8. (sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS. (_bfd_sh_align_load_span): Return early for SH4. Modify sh_opcodes lookup table for sh-dsp / sh3-dsp. Take into account that field b of a parallel processing insn could be mistaken for a separate insn. * cpu-sh.c (arch_info_struct): New array elements for sh2, sh-dsp and sh3-dsp. Reinstate element for sh4. (SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros. (SH4_NEXT): Reinstate. (SH3_NEXT, SH3E_NEXT): Adjust. * elf-bfd.h (_sh_elf_set_mach_from_flags): Declare. * elf32-sh.c (sh_elf_set_private_flags): New function. (sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise. (sh_elf_merge_private_data): New function. (elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define. (bfd_elf32_bfd_copy_private_bfd_data): Define. (bfd_elf32_bfd_merge_private_bfd_data): Change to sh_elf_merge_private_data. gas: * config/tc-sh.c ("elf/sh.h"): Include. (sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables. (md.begin): Initialize target_arch. Only include opcodes in has table that match selected architecture. (parse_reg): Recognize register names for sh-dsp. (parse_at): Recognize post-modify addressing. (get_operands): The leading space is now optional. (get_specific): Remove FDREG_N support. Add support for sh-dsp arguments. Update valid_arch. (build_Mytes): Add support for SDT_REG_N. (find_cooked_opcode): New function, broken out of md_assemble. (assemble_ppi, sh_elf_final_processing): New functions. (md_assemble): Use find_cooked_opcode and assemble_ppi. (md_longopts, md_parse_option): New option: -dsp. * config/tc-sh.h (elf_tc_final_processing): Define. (sh_elf_final_processing): Declare. include/elf: * sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros. (EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise. (EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise. opcodes: * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions. (print_insn_ppi): Likewise. (print_insn_shx): Use info->mach to select appropriate insn set. Add support for sh-dsp. Remove FD_REG_N support. * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support. (sh_arg_type): Likewise. Remove FD_REG_N. (sh_dsp_reg_nums): New enum. (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros. (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise. (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise. (arch_sh3_dsp_up): Likewise. (sh_opcode_info): New field: arch. (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and D_REG_N. Fill in arch field. Add sh-dsp insns.
2000-01-13Apply Tim walls octest vs bytes patchNick Clifton1-1/+51
1999-12-01 * archures.c (bfd_mach_am33): Define.Jeff Law1-0/+1
* bfd-in2.h: Rebuilt. * cpu-m10300.c (bfd_am33_arch): Add to the mn103 architecture list * elf-m10300.c (mn10300_elf_relax_section): Handle am33 instructions. (compute_function_info): Handle additional registers saved by movm on the am33. (elf_mn10300_mach): Handle E_MN10300_MACH_AM33. (_bfd_mn10300_elf_final_write_processing): Handle bfd_mach_am33.
1999-10-25D10V patches from CagneyMichael Meissner1-0/+3
1999-10-05 * archures.c (bfd_mach_m32rx): Define it.Doug Evans1-0/+1
* bfd-in2.h: Rebuild.
1999-09-041999-09-04 Steve Chamberlain <sac@pobox.com>Ian Lance Taylor1-0/+2
* cpu-pj.c: New file. * elf32-pj.c: New file. * config.bfd (pj*): New cpu. (pj-*-*, pjl-*-*): New targets. * configure.in (bfd_elf32_pj_vec): New target vector. (bfd_elf32_pjl_vec): New target vector. * archures.c (bfd_arch_pj): Define. * elf.c (prep_headers): Handle bfd_arch_pj. * reloc.c: Define BFD_RELOC_PJ_* relocations. * targets.c (bfd_elf32_pj_vec, bfd_elf32_pjl_vec): Declare and add to target vector list. * Makefile.am: Rebuild dependencies. (ALL_MACHINES): Add cpu-pj.lo. (ALL_MACHINES_CFILES): Add cpu-pj.c. (BFD32_BACKENDS): Add elf32-pj.lo. (BFD32_BACKENDS_CFILES): Add elf32-pj.c. * configure, Makefile.in, bfd-in2.h, libbfd.h: Rebuild.
1999-07-05Add support for arm v5 architectures.Nick Clifton1-2/+4
1999-05-0319990502 sourceware importbinu_ss_19990502Richard Henderson1-0/+896