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2020-05-20[PATCH v2 0/9] RISC-V: Support version controling for ISA standard ↵Nelson Chu1-0/+21
extensions and CSR 1. Remove the -mriscv-isa-version and --with-riscv-isa-version options. We can still use -march to choose the version for each extensions, so there is no need to add these. 2. Change the arguments of options from [1p9|1p9p1|...] to [1.9|1.9.1|...]. Unlike the architecture string has specified by spec, ther is no need to do the same thing for options. 3. Spilt the patches to reduce the burdens of review. [PATCH 3/7] RISC-V: Support new GAS options and configure options to set ISA versions to [PATCH v2 3/9] RISC-V: Support GAS option -misa-spec to set ISA versions [PATCH v2 4/9] RISC-V: Support configure options to set ISA versions by default. [PATCH 4/7] RISC-V: Support version checking for CSR according to privilege version. to [PATCH v2 5/9] RISC-V: Support version checking for CSR according to privilege spec version. [PATCH v2 6/9] RISC-V: Support configure option to choose the privilege spec version. 4. Use enum class rather than string to compare the choosen ISA spec in opcodes/riscv-opc.c. The behavior is same as comparing the choosen privilege spec. include * opcode/riscv.h: Include "bfd.h" to support bfd_boolean. (enum riscv_isa_spec_class): New enum class. All supported ISA spec belong to one of the class (struct riscv_ext_version): New structure holds version information for the specific ISA. * opcode/riscv-opc.h (DECLARE_CSR): There are two version information, define_version and abort_version. The define_version means which privilege spec is started to define the CSR, and the abort_version means which privilege spec is started to abort the CSR. If the CSR is valid for the newest spec, then the abort_version should be PRIV_SPEC_CLASS_DRAFT. (DECLARE_CSR_ALIAS): Same as DECLARE_CSR, but only for the obselete CSR. * opcode/riscv.h (enum riscv_priv_spec_class): New enum class. Define the current supported privilege spec versions. (struct riscv_csr_extra): Add new fields to store more information about the CSR. We use these information to find the suitable CSR address when user choosing a specific privilege spec. binutils * dwarf.c: Updated since DECLARE_CSR is changed. opcodes * riscv-opc.c (riscv_ext_version_table): The table used to store all information about the supported spec and the corresponding ISA versions. Currently, only Zicsr is supported to verify the correctness of Z sub extension settings. Others will be supported in the future patches. (struct isa_spec_t, isa_specs): List for all supported ISA spec classes and the corresponding strings. (riscv_get_isa_spec_class): New function. Get the corresponding ISA spec class by giving a ISA spec string. * riscv-opc.c (struct priv_spec_t): New structure. (struct priv_spec_t priv_specs): List for all supported privilege spec classes and the corresponding strings. (riscv_get_priv_spec_class): New function. Get the corresponding privilege spec class by giving a spec string. (riscv_get_priv_spec_name): New function. Get the corresponding privilege spec string by giving a CSR version class. * riscv-dis.c: Updated since DECLARE_CSR is changed. * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR according to the chosen version. Build a hash table riscv_csr_hash to store the valid CSR for the chosen pirv verison. Dump the direct CSR address rather than it's name if it is invalid. (parse_riscv_dis_option_without_args): New function. Parse the options without arguments. (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to parse the options without arguments first, and then handle the options with arguments. Add the new option -Mpriv-spec, which has argument. * riscv-dis.c (print_riscv_disassembler_options): Add description about the new OBJDUMP option. ld * testsuite/ld-riscv-elf/attr-merge-arch-01.d: Updated priv attributes according to the -mpriv-spec option. * testsuite/ld-riscv-elf/attr-merge-arch-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-arch-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-a.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec-b.s: Likewise. * testsuite/ld-riscv-elf/attr-merge-priv-spec.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-stack-align.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-01.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-02.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-03.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-04.d: Likewise. * testsuite/ld-riscv-elf/attr-merge-strict-align-05.d: Likewise. bfd * elfxx-riscv.h (riscv_parse_subset_t): Add new callback function get_default_version. It is used to find the default version for the specific extension. * elfxx-riscv.c (riscv_parsing_subset_version): Remove the parameters default_major_version and default_minor_version. Add new bfd_boolean parameter *use_default_version. Set it to TRUE if we need to call the callback rps->get_default_version to find the default version. (riscv_parse_std_ext): Call rps->get_default_version if we fail to find the default version in riscv_parsing_subset_version, and then call riscv_add_subset to add the subset into subset list. (riscv_parse_prefixed_ext): Likewise. (riscv_std_z_ext_strtab): Support Zicsr extensions. * elfnn-riscv.c (riscv_merge_std_ext): Use strcasecmp to compare the strings rather than characters. riscv_merge_arch_attr_info): The callback function get_default_version is only needed for assembler, so set it to NULL int the linker. * elfxx-riscv.c (riscv_estimate_digit): Remove the static. * elfxx-riscv.h: Updated. gas * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: Updated. * config/tc-riscv.c (default_arch_with_ext, default_isa_spec): Static variables which are used to set the ISA extensions. You can use -march (or ELF build attributes) and -misa-spec to set them, respectively. (ext_version_hash): The hash table used to handle the extensions with versions. (init_ext_version_hash): Initialize the ext_version_hash according to riscv_ext_version_table. (riscv_get_default_ext_version): The callback function of riscv_parse_subset_t. According to the choosed ISA spec, get the default version for the specific extension. (riscv_set_arch): Set the callback function. (enum options, struct option md_longopts): Add new option -misa-spec. (md_parse_option): Do not call riscv_set_arch for -march. We will call it later in riscv_after_parse_args. Call riscv_get_isa_spec_class to set default_isa_spec class. (riscv_after_parse_args): Call init_ext_version_hash to initialize the ext_version_hash, and then call riscv_set_arch to set the architecture with versions according to default_arch_with_ext. * testsuite/gas/riscv/attribute-02.d: Set 0p0 as default version for x extensions. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-09.d: New testcase. For i-ext, we already set it's version to 2p1 by march, so no need to use the default 2p2 version. For m-ext, we do not set the version by -march and ELF arch attribute, so set the default 2p0 to it. For zicsr, it is not defined in ISA spec 2p2, so set 0p0 to it. * testsuite/gas/riscv/attribute-10.d: New testcase. The version of zicsr is 2p0 according to ISA spec 20191213. * config/tc-riscv.c (DEFAULT_RISCV_ARCH_WITH_EXT) (DEFAULT_RISCV_ISA_SPEC): Default configure option settings. You can set them by configure options --with-arch and --with-isa-spec, respectively. (riscv_set_default_isa_spec): New function used to set the default ISA spec. (md_parse_option): Call riscv_set_default_isa_spec rather than call riscv_get_isa_spec_class directly. (riscv_after_parse_args): If the -isa-spec is not set, then we set the default ISA spec according to DEFAULT_RISCV_ISA_SPEC by calling riscv_set_default_isa_spec. * testsuite/gas/riscv/attribute-01.d: Add -misa-spec=2.2, since the --with-isa-spec may be set to different ISA spec. * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * configure.ac: Add configure options, --with-arch and --with-isa-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (default_priv_spec): Static variable which is used to check if the CSR is valid for the chosen privilege spec. You can use -mpriv-spec to set it. (enum reg_class): We now get the CSR address from csr_extra_hash rather than reg_names_hash. Therefore, move RCLASS_CSR behind RCLASS_MAX. (riscv_init_csr_hashes): Only need to initialize one hash table csr_extra_hash. (riscv_csr_class_check): Change the return type to void. Don't check the ISA dependency if -mcsr-check isn't set. (riscv_csr_version_check): New function. Check and find the CSR address from csr_extra_hash, according to default_priv_spec. Report warning for the invalid CSR if -mcsr-check is set. (reg_csr_lookup_internal): Updated. (reg_lookup_internal): Likewise. (md_begin): Updated since DECLARE_CSR and DECLARE_CSR_ALIAS are changed. (enum options, struct option md_longopts): Add new GAS option -mpriv-spec. (md_parse_option): Call riscv_set_default_priv_version to set default_priv_spec. (riscv_after_parse_args): If -mpriv-spec isn't set, then set the default privilege spec to the newest one. (enum riscv_csr_class, struct riscv_csr_extra): Move them to include/opcode/riscv.h. * testsuite/gas/riscv/priv-reg-fail-fext.d: This test case just want to check the ISA dependency for CSR, so fix the spec version by adding -mpriv-spec=1.11. * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise. There are some version warnings for the test case. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.d: New test case. Check whether the CSR is valid when privilege version 1.9 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: New test case. Check whether the CSR is valid when privilege version 1.9.1 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p9p1.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.d: New test case. Check whether the CSR is valid when privilege version 1.10 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p10.l: Likewise. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.d: New test case. Check whether the CSR is valid when privilege version 1.11 is choosed. * gas/testsuite/gas/riscv/priv-reg-fail-version-1p11.l: Likewise. * config/tc-riscv.c (DEFAULT_RISCV_ISA_SPEC): Default configure option setting. You can set it by configure option --with-priv-spec. (riscv_set_default_priv_spec): New function used to set the default privilege spec. (md_parse_option): Call riscv_set_default_priv_spec rather than call riscv_get_priv_spec_class directly. (riscv_after_parse_args): If -mpriv-spec isn't set, then we set the default privilege spec according to DEFAULT_RISCV_PRIV_SPEC by calling riscv_set_default_priv_spec. * testsuite/gas/riscv/csr-dw-regnums.d: Add -mpriv-spec=1.11, since the --with-priv-spec may be set to different privilege spec. * testsuite/gas/riscv/priv-reg.d: Likewise. * configure.ac: Add configure option --with-priv-spec. * configure: Regenerated. * config.in: Regenerated. * config/tc-riscv.c (explicit_attr): Rename explicit_arch_attr to explicit_attr. Set it to TRUE if any ELF attribute is found. (riscv_set_default_priv_spec): Try to set the default_priv_spec if the priv attributes are set. (md_assemble): Set the default_priv_spec according to the priv attributes when we start to assemble instruction. (riscv_write_out_attrs): Rename riscv_write_out_arch_attr to riscv_write_out_attrs. Update the arch and priv attributes. If we don't set the corresponding ELF attributes, then try to output the default ones. (riscv_set_public_attributes): If any ELF attribute or -march-attr options is set (explicit_attr is TRUE), then call riscv_write_out_attrs to update the arch and priv attributes. (s_riscv_attribute): Make sure all arch and priv attributes are set before any instruction. * testsuite/gas/riscv/attribute-01.d: Update the priv attributes if any ELF attribute or -march-attr is set. If the priv attributes are not set, then try to update them by the default setting (-mpriv-spec or --with-priv-spec). * testsuite/gas/riscv/attribute-02.d: Likewise. * testsuite/gas/riscv/attribute-03.d: Likewise. * testsuite/gas/riscv/attribute-04.d: Likewise. * testsuite/gas/riscv/attribute-06.d: Likewise. * testsuite/gas/riscv/attribute-07.d: Likewise. * testsuite/gas/riscv/attribute-08.d: Likewise. * testsuite/gas/riscv/attribute-09.d: Likewise. * testsuite/gas/riscv/attribute-10.d: Likewise. * testsuite/gas/riscv/attribute-unknown.d: Likewise. * testsuite/gas/riscv/attribute-05.d: Likewise. Also, the priv spec set by priv attributes must be supported. * testsuite/gas/riscv/attribute-05.s: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9.d: Likewise. Updated priv attributes according to the -mpriv-spec option. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg.d: Removed. * testsuite/gas/riscv/priv-reg-version-1p9.d: New test case. Dump the CSR according to the priv spec 1.9. * testsuite/gas/riscv/priv-reg-version-1p9p1.d: New test case. Dump the CSR according to the priv spec 1.9.1. * testsuite/gas/riscv/priv-reg-version-1p10.d: New test case. Dump the CSR according to the priv spec 1.10. * testsuite/gas/riscv/priv-reg-version-1p11.d: New test case. Dump the CSR according to the priv spec 1.11. * config/tc-riscv.c (md_show_usage): Add descriptions about the new GAS options. * doc/c-riscv.texi: Likewise.
2020-05-20Fix thinko in bfd ChangeLog entryNick Clifton1-2/+3
2020-05-20PR25993, read of freed memoryAlan Modra1-0/+16
ldmain.c:add_archive_element copies file name pointers from the bfd to a lang_input_statement_type. input->filename = abfd->filename; input->local_sym_name = abfd->filename; This results in stale pointers when twiddling the bfd filename in places like the pe ld after_open. So don't free the bfd filename, and make copies using bfd_alloc memory that won't result in small memory leaks that annoy memory checkers. PR 25993 bfd/ * archive.c (_bfd_get_elt_at_filepos): Don't strdup filename, use bfd_set_filename. * elfcode.h (_bfd_elf_bfd_from_remote_memory): Likewise. * mach-o.c (bfd_mach_o_fat_member_init): Likewise. * opncls.c (bfd_fopen, bfd_openstreamr, bfd_openr_iovec, bfd_openw), (bfd_create): Likewise. (_bfd_delete_bfd): Don't free filename. (bfd_set_filename): Copy filename param to bfd_alloc'd memory, return pointer to the copy or NULL on alloc fail. * vms-lib.c (_bfd_vms_lib_get_module): Free newname and test result of bfd_set_filename. * bfd-in2.h: Regenerate. gdb/ * solib-darwin.c (darwin_bfd_open): Don't strdup pathname for bfd_set_filename. * solib-aix.c (solib_aix_bfd_open): Use std::string for name passed to bfd_set_filename. * symfile-mem.c (add_vsyscall_page): Likewise for string passed to symbol_file_add_from_memory. (symbol_file_add_from_memory): Make name param a const char* and don't strdup. ld/ * emultempl/pe.em (gld_${EMULATION_NAME}_after_open): Don't copy other_bfd_filename for bfd_set_filename, and test result of bfd_set_filename call. Don't create a new is->filename, simply copy from bfd filename. Free new_name after bfd_set_filename. * emultempl/pep.em (gld_${EMULATION_NAME}_after_open): Likewise.
2020-05-20PR26011, excessive memory allocation with fuzzed reloc sectionsAlan Modra1-0/+7
Check sizes early, before users of slurp_relocs allocate buffers for the swapped in relocs. PR 26011 * elf.c (_bfd_elf_get_reloc_upper_bound): Sanity check reloc section size against file size. (_bfd_elf_get_dynamic_reloc_upper_bound): Likewise.
2020-05-19Fix thinko in recent update to bfd_section_from_shdr.Gunther Nikl1-0/+6
PR 26005 * elf.c (bfd_section_from_shdr): Replace bfd_malloc + memset with bfd_zmalloc to allocate memory for the sections_being_created array.
2020-05-19OpenRISC BFD fixups for Glibc:Stafford Horne1-0/+28
or1k: Fix static linking when with .rela.got relocations or1k: Fix dynamic TLS symbol flag or1k: Add TLS mask to handle multiple model access or1k: Fix issue with multiple PCREL relocations or1k: TLS offset to use tcb size and section alignment or1k: refactor: Rename p to sec_relocs or1k: refactor: Rename s to sgot and splt or1k: Add dynamic flag to tpoff bfd * elf32-or1k.c (or1k_elf_finish_dynamic_symbol): Rename srela to relgot. (or1k_elf_relocate_section): Access srelgot via htab->root.srelgot. Add assertions for srelgot->contents. Introduce local variable for srelgot to not reuse global sreloc. (or1k_elf_relocate_section): Fixup dynamic symbol detection. (or1k_set_got_and_rela_sizes): New function. (or1k_initial_exec_offset): New function. (TLS_GD, TLS_IE, TLS_LD, TLS_LE): Redefine macros as masks. (or1k_elf_relocate_section): Allow for TLS to handle multiple model access. (or1k_elf_check_relocs): Use OR to set TLS access. (allocate_dynrelocs): Use or1k_set_got_and_rela_sizes to set sizes. (or1k_elf_size_dynamic_sections): Use or1k_set_got_and_rela_sizes to set sizes. (or1k_elf_relocate_section): Fixup PCREL relocation calculation. (TCB_SIZE): New macro. (tpoff): Use TCB_SIZE and alignment to calculate offset. (allocate_dynrelocs, readonly_dynrelocs, or1k_elf_check_relocs) (or1k_elf_size_dynamic_sections): Rename p to sec_relocs. (allocate_dynrelocs): Rename s to splt or sgot based on usage. (tpoff): Add dynamic boolean argument. (or1k_elf_relocate_section): Pass dynamic flag to tpoff.
2020-05-19[PATCH v3] aarch64: Emit jump slot for conditional branch to undefined symbolsSiddhesh Poyarekar1-0/+7
The linker silently writes out a conditional branch to 0 if the target symbol in R_AARCH64_CONDBR19 or R_AARCH64_TSTBR14 relocations is undefined. Emit a PLT instead so that behaviour is the same for these relocations as the llvm linker. The special behaviour for undefined weak symbols, where conditional branches to such symbols result in a branch unto themselves, has been retained. This is because the weak-undefined.s test explicitly checks for that, leading me to conclude that it's expected behaviour. bfd * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Club BFD_RELOC_AARCH64_BRANCH19 and BFD_RELOC_AARCH64_TSTBR14 cases with BFD_RELOC_AARCH64_JUMP26. (elfNN_aarch64_check_relocs): Likewise. ld * testsuite/ld-aarch64/aarch64-elf.exp: New test emit-relocs-560. * testsuite/ld-aarch64/emit-relocs-560.d: New file. * testsuite/ld-aarch64/emit-relocs-560.s: New file.
2020-05-19Use bfd_get_filename throughout bfdAlan Modra1-0/+41
* aix5ppc-core.c (xcoff64_core_file_matches_executable_p): Use bfd_get_filename rather than accessing bfd->filename directly. * aout-target.h (MY (object_p)): Likewise. * aoutx.h (aout_find_nearest_line, aout_link_write_symbols): Likewise. * archive.c (find_nested_archive, _bfd_generic_read_ar_hdr_mag), (_bfd_construct_extended_name_table, _bfd_bsd44_write_ar_hdr), (_bfd_archive_bsd44_construct_extended_name_table), (_bfd_write_archive_contents, _bfd_compute_and_write_armap), (_bfd_bsd_write_armap): Likewise. * bfd.c (bfd_errmsg, _bfd_doprnt): Likewise. * cache.c (bfd_open_file): Likewise. * ecoff.c (_bfd_ecoff_write_armap): Likewise. * ecofflink.c (bfd_ecoff_debug_accumulate_other): Likewise. * elf32-bfin.c (bfinfdpic_relocate_section): Likewise. * elf32-frv.c (elf32_frv_relocate_section): Likewise. * elf32-hppa.c (elf32_hppa_final_link): Likewise. * elf32-nds32.c (nds32_elf_output_symbol_hook), (patch_tls_desc_to_ie): Likewise. * elf32-spu.c (sort_bfds, print_one_overlay_section), (spu_elf_auto_overlay): Likewise. * elf64-hppa.c (elf_hppa_final_link): Likewise. * elf64-ia64-vms.c (elf64_ia64_size_dynamic_sections): Likewise. * elfcore.h (elf_core_file_matches_executable_p): Likewise. * elflink.c (bfd_elf_size_dynamic_sections), (elf_link_input_bfd): Likewise. * linker.c (_bfd_generic_link_output_symbols): Likewise. * mach-o.c (bfd_mach_o_follow_dsym), (bfd_mach_o_close_and_cleanup): Likewise. * opncls.c (_bfd_delete_bfd, _maybe_make_executable), (find_separate_debug_file, get_build_id_name): Likewise. * pdp11.c (aout_find_nearest_line, aout_link_write_symbols): Likewise. * plugin.c (bfd_plugin_open_input): Likewise. * rs6000-core.c (rs6000coff_core_file_matches_executable_p): Likewise. * som.c (som_write_armap): Likewise. * srec.c (srec_write_record, srec_write_symbols): Likewise. * vms-lib.c (_bfd_vms_lib_get_imagelib_file), (_bfd_vms_lib_write_archive_contents): Likewise. * xcofflink.c (xcoff_link_add_dynamic_symbols): Likewise.
2020-05-19win32 typo fixAlan Modra1-0/+5
PR 25713 * bfdio.c (_bfd_real_fopen): Typo fix.
2020-05-18Fix a use-after-free bug in the BFD library when scanning a corrupt ELF file.Nick Clifton1-0/+6
PR 26005 * elf.c (bfd_section_from_shdr): Use bfd_malloc to allocate memory for the sections_being_created array.
2020-05-18ECOFF slurp_relocs thinkoAlan Modra1-0/+5
In git commit 806470a219 I swapped the order of internal vs. external relocs memory allocation in ecoff_slurp_reloc_table, the idea being that the external reloc size can be sanity checked against file size. However, that fails badly with bfd_alloc memory where releasing any block also releases all more recently allocated blocks. * ecoff.c (ecoff_slurp_reloc_table): Malloc external_relocs so they can be freed without also freeing internal_relocs.
2020-05-18Fix the BFD library to handle Windows pathnames with more than 260 ↵Jaydeep Chauhan1-0/+6
characters and UNIX style directory separators. PR 25713 * bfdio.c (_bfd_real_fopen): Convert UNIX style sirectory separators into DOS style when creating a WIN32 fullpath.
2020-05-14RISC-V: Add elfNN_riscv_mkobject to initialize RISC-V tdata.Nelson Chu1-0/+5
For now we only have one char pointer in RISC-V tdata, so it should be fine. But once we need more elements in tdata, then we may get some uninitialize or unexpected values. I do meet the same problem when extending the RISC-V tdata. bfd/ elfnn-riscv.c (elfNN_riscv_mkobject): New function. We need this to initialize RISC-V tdata.
2020-05-12 [PATCH] bfd: Fix 64-bit relocation handling for a.outGunther Nikl1-0/+5
* aoutx.h (NAME (aout, swap_std_reloc_out)): Reject an unsupported relocation size.
2020-05-11Power10 VSX 32-byte storage accessAlan Modra1-0/+4
bfd/ * elf64-ppc.c (xlate_pcrel_opt): Handle lxvp and stxvp. opcodes/ * ppc-opc.c (insert_xtp, extract_xtp): New functions. (XTP, DQXP, DQXP_MASK): Define. (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx. (prefix_opcodes): Add plxvp and pstxvp. gas/ * testsuite/gas/ppc/vsx_32byte.d, * testsuite/gas/ppc/vsx_32byte.s: New test. * testsuite/gas/ppc/ppc.exp: Run it. ld/ * testsuite/ld-powerpc/pcrelopt.s: Add lxvp and stxvp. * testsuite/ld-powerpc/pcrelopt.d: Update.
2020-05-11PowerPC Rename powerxx to power10Alan Modra1-0/+4
Now that ISA3.1 is out we can finish with the powerxx silliness. bfd/ * elf64-ppc.c: Rename powerxx to power10 throughout. gas/ * config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10 renaming. * testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in place of -mfuture/-Mfuture. * testsuite/gas/ppc/prefix-pcrel.d: Likewise. * testsuite/gas/ppc/prefix-reloc.d: Likewise. gold/ * powerpc.cc: Rename powerxx to power10 throughout. include/ * elf/ppc64.h: Update comment. * opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX. ld/ * testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in place of -mfuture/-Mfuture. * testsuite/ld-powerpc/notoc2.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Likewise. * testsuite/ld-powerpc/tlsgd.d: Likewise. * testsuite/ld-powerpc/tlsie.d: Likewise. * testsuite/ld-powerpc/tlsld.d: Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power10" entry. (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming. * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
2020-05-11PR25961, buffer overflow in coff_swap_aux_inAlan Modra1-0/+8
PR 25961 * coffgen.c (coff_get_normalized_symtab): Check that buffer contains required number of auxents before processing any auxent. * coffswap.h (coff_swap_aux_in <C_FILE>): Only swap in extended file name from auxents for PE.
2020-05-04[PATCH] bfd: tweak SET_ARCH_MACH of aout-cris.cGunther Nikl1-1/+10
* aout-cris.c (DEFAULT_ARCH): Delete define. (MY_set_arch_mach): Likewise. (SET_ARCH_MACH): Use bfd_set_arch_mach with an explicit architecture of bfd_arch_cris. (swap_ext_reloc_in): Add casts to r_index extraction. Mask valid bits of r_type before the shift.
2020-05-04[binutils-gdb][ld][AArch64] Fix group_sections algorithmWilco Dijkstra1-0/+6
PR ld/25665 * bfd/elfnn-aarch64.c (group_sections): Copy implementation from elf32-arm.c. * testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * testsuite/ld-aarch64/farcall-group.s: New large group test. * testsuite/ld-aarch64/farcall-group.d: Likewise.
2020-05-01PR25900, RISC-V: null pointer dereferenceAlan Modra1-0/+7
PR 25900 * elfnn-riscv.c (_bfd_riscv_relax_section): Check root.type before accessing root.u.def of symbols. Also check root.u.def.section is non-NULL. Reverse tests so as to make the logic positive.
2020-05-01PR25882, .gnu.attributes are not checked for shared librariesAlan Modra1-0/+6
This allows backend merge_private_bfd_data to examine shared library e_flags and/or .gnu.attributes. ARM and PowerPC have done so when using ld.gold for a long time. (The tic6x change below is dead code due to the earlier FIXME, but this is probably one of the changes needed there.) PR 25882 bfd/ * elf32-tic6x.c (elf32_tic6x_merge_attributes): Don't transfer Tag_ABI_PIC or Tag_ABI_PID from dynamic objects to the output. ld/ * ldlang.c (lang_check): Call bfd_merge_private_bfd_data for shared libraries.
2020-05-01FIXME for merging of e_flags and .gnu.attributesAlan Modra1-0/+14
Code in the linker, present before the addition of .gnu.attributes support, results in shared libraries not being considered by BFD when merging e_flags and .gnu.attributes from input files to the output. That doesn't seem correct to me, but I don't know enough about all the various ABIs to change the behaviour with any confidence. So this patch merely punts on dynamic objects in merge_private_bfd_data target functions, with a FIXME for maintainer attention. I haven't excluded shared libraries from being considered where the target merge_private_bfd_data (a) already has code dealing with shared libraries, or (b) where that function just sets the output to the most constraining arch/mach combination and other fairly trivial merges, or (c) when the target has no shared library linker support. In (a) are: arc, arm, aarch64, riscv, sparc. In (b) are: bpf, cris, csky, m32r, m68k, mn10300, nios2, tilegx, tilepro, vax, visium, xtensa. In (c) are: bpf, cr16, h8300, iq2000, m32c, m68hc11, m68hc12, mcore, mep, msp430, mt, rl78, rx, v850. PR 25882 * elf32-bfin.c (elf32_bfin_merge_private_bfd_data): Add FIXME. * elf32-frv.c (frv_elf_merge_private_bfd_data): Likewise. * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Likewise. * elf32-nds32.c (nds32_elf_merge_private_bfd_data): Likewise. * elf32-score.c (s3_elf32_score_merge_private_bfd_data): Likewise. * elf32-score7.c (s7_elf32_score_merge_private_bfd_data): Likewise. * elf32-sh.c (sh_elf_merge_private_data): Likewise. * elf32-tic6x.c (elf32_tic6x_merge_attributes): Likewise. * elf64-ia64-vms.c (elf64_ia64_merge_private_bfd_data): Likewise. * elfnn-ia64.c (elfNN_ia64_merge_private_bfd_data): Likewise.
2020-05-01ppc32 merging of e_flags from dynamic objectsAlan Modra1-0/+6
EF_PPC_RELOCATABLE and similar flags, if present in an input shared library, don't have any relevance as far as the output file is concerned. Currently, dynamic objects aren't seen in merge_private_bfd_data. This patch is in preparation for a change to that. PR 25882 * elf32-ppc.c (ppc_elf_merge_private_bfd_data): Ignore e_flags from shared libraries.
2020-04-29xtensa: fix XTENSA_NDIFF handling for PR ld/25861Max Filippov1-0/+7
Fields marked with XTENSA_NDIFF relocations are not negated, they only have sign bits removed. Don't negate their values when relaxation is performed. Don't add sign bits when the value is zero. Report overflow when the result has negative sign but all significant bits are zero. 2020-04-29 Max Filippov <jcmvbkbc@gmail.com> bfd/ * elf32-xtensa.c (relax_section): Don't negate diff_value for XTENSA_NDIFF relocations. Don't add sign bits whe diff_value equals 0. Report overflow when the result has negative sign but all significant bits are zero. ld/ * testsuite/ld-xtensa/relax-diff1.d: New test definition. * testsuite/ld-xtensa/relax-diff1.s: New test source. * testsuite/ld-xtensa/relax-ndiff.d: New test definition. * testsuite/ld-xtensa/relax-ndiff.s: New test source. * testsuite/ld-xtensa/xtensa.exp: (relax-diff1) (relax-ndiff): New tests.
2020-04-29bfd: Fix 64-bit relocation handling for a.outGunther Nikl1-0/+5
* aoutx.h (swap_std_reloc_out): Special case 64 bit relocations. (aout_link_reloc_link_order): Likewise. Make r_length an unsigned.
2020-04-28alpha-vms: divide by zeroAlan Modra1-0/+5
The zero check was on the wrong operand. And, yes, the second operand popped is supposed to be divided by the first operand popped. * vms-alpha.c (_bfd_vms_slurp_etir): Correct divide by zero check. Emit warning message.
2020-04-27x86: Add i386 PE big-object supportTamar Christina1-0/+16
The 64-bit version of binutils got support for the PE COFF BIG OBJ format a couple of years ago. The BIG OBJ format is a slightly different COFF format which extends the size of the number of section field in the header from a uint16_t to a uint32_t and so greatly increases the number of sections allowed. However the 32-bit version of bfd never got support for this. The GHC Haskell compiler generates a great deal of symbols due to it's use of -ffunction-sections and -fdata-sections. This meant that we could not build the 32-bit version of the GHC Compiler for many releases now as binutils didn't have this support. This patch adds the support to the 32-bit port of binutils as well and also does come cleanup in the code. bfd/ChangeLog: * coff-i386.c (COFF_WITH_PE_BIGOBJ): New. * coff-x86_64.c (COFF_WITH_PE_BIGOBJ): New. * config.bfd (targ_selvecs): Rename x86_64_pe_be_vec to x86_64_pe_big_vec as it not a big-endian format. (vec i386_pe_big_vec): New. * configure.ac: Likewise. * targets.c: Likewise. * configure: Regenerate. * pe-i386.c (TARGET_SYM_BIG, TARGET_NAME_BIG, COFF_WITH_PE_BIGOBJ): New. * pe-x86_64.c (TARGET_SYM_BIG, TARGET_NAME_BIG): New. (x86_64_pe_be_vec): Moved. gas/ChangeLog: * NEWS: Add news entry for big-obj. * config/tc-i386.c (i386_target_format): Support new format. * doc/c-i386.texi: Add i386 support. * testsuite/gas/pe/big-obj.d: Rename test to not be x64 specific. * testsuite/gas/pe/pe.exp (big-obj): Make test run on i386 as well. ld/ChangeLog: * pe-dll.c (pe_detail_list): Add pe-bigobj-i386.
2020-04-23arc: Add support for ARC HS extra registers in core filesAnton Kolesov1-0/+10
When a coredump is generated, there are a few registers in ARC HS that are put under a special section, namely ".reg-v2". It is for backward compatibility reasons with older tools that we have decided not to extend the generic ".reg" section. This patch makes it possible to display the information better regarding that section. Compare the output of "readelf" without and with these changes: $ readelf -n core # without the patch ... LINUX 0x0000000c Unknown note type: (0x00000600) description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69 $ readelf -n core # with the patch ... LINUX 0x0000000c NT_ARC_V2 (ARC HS accumulator/extra registers) description data: 78 08 00 00 2f 6c 64 2d 75 43 6c 69 In another commit (soon to be submitted), GDB will makes use of these changes to parse the extra section and its registers. bfd/ChangeLog 2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com> * elf-bfd.h (elfcore_write_arc_v2): Add prototype. * elf.c (elfcore_grok_arc_v2): New function. (elfcore_grok_note): Call the new function to handle the corresponding note. (elfcore_write_arc_v2): New function. (elfcore_write_register_note): Call the new function to handle the corresponding pseudo-sections. binutils/ChangeLog 2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com> * readelf.c (get_note_type): Handle NT_ARC_V2. include/elf/ChangeLog 2020-03-26 Anton Kolesov <anton.kolesov@synopsys.com> * common.h (NT_ARC_V2): New macro definitions.
2020-04-22xtensa: fix PR ld/25861Max Filippov1-0/+15
Introduce new relaxations XTENSA_PDIFF{8,16,32} for positive differences (subtracted symbol precedes diminished symbol) and XTENSA_NDIFF{8,16,32} for negative differences (subtracted symbol follows diminished symbol). Don't generate XTENSA_DIFF relocations in the assembler, generate XTENSA_PDIFF or XTENSA_NDIFF based on relative symbol position. Handle XTENSA_DIFF in BFD for compatibility with old object files. Handle XTENSA_PDIFF and XTENSA_NDIFF in BFD, treating difference value as unsigned. 2020-04-22 Max Filippov <jcmvbkbc@gmail.com> bfd/ * bfd-in2.h: Regenerated. * elf32-xtensa.c (elf_howto_table): New entries for R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}. (elf_xtensa_reloc_type_lookup, elf_xtensa_do_reloc) (relax_section): Add cases for R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}. * libbfd.h (bfd_reloc_code_real_names): Add names for BFD_RELOC_XTENSA_PDIFF{8,16,32} and BFD_RELOC_XTENSA_NDIFF{8,16,32}. * reloc.c: Add documentation for BFD_RELOC_XTENSA_PDIFF{8,16,32} and BFD_RELOC_XTENSA_NDIFF{8,16,32}. binutils/ * readelf.c (is_none_reloc): Recognize BFD_RELOC_XTENSA_PDIFF{8,16,32} and BFD_RELOC_XTENSA_NDIFF{8,16,32}. gas/ * config/tc-xtensa.c (md_apply_fix): Replace BFD_RELOC_XTENSA_DIFF{8,16,32} generation with BFD_RELOC_XTENSA_PDIFF{8,16,32} and BFD_RELOC_XTENSA_NDIFF{8,16,32} generation. * testsuite/gas/xtensa/loc.d: Replace BFD_RELOC_XTENSA_DIFF16 with BFD_RELOC_XTENSA_PDIFF16 in the expected output. include/ * elf/xtensa.h (elf_xtensa_reloc_type): New entries for R_XTENSA_PDIFF{8,16,32} and R_XTENSA_NDIFF{8,16,32}. ld/ * testsuite/ld-xtensa/relax-loc.d: New test definition. * testsuite/ld-xtensa/relax-loc.s: New test source. * testsuite/ld-xtensa/xtensa.exp (relax-loc): New test.
2020-04-21BFD: Exclude sections with no content from compress check.Tamar Christina1-0/+6
The check in bfd_get_full_section_contents is trying to check that we don't allocate more space for a section than the size of the section is on disk. Previously we excluded linker created sections since they didn't have a size on disk. However we also need to exclude sections with no content as well such as the BSS section. Space for these would not have been allocated by the assembler and so the check would incorrectly fail. bfd/ChangeLog: PR binutils/24753 * compress.c (bfd_get_full_section_contents): Exclude sections with no content. gas/ChangeLog: PR binutils/24753 * testsuite/gas/arm/pr24753.d: New test. * testsuite/gas/arm/pr24753.s: New test.
2020-04-21elf: Strip zero-sized dynamic sectionsH.J. Lu1-0/+14
ELF size_dynamic_sections is called by the ELF backend linker after all the linker input files have been seen but before the section sizes have been set. After the sections sizes have been set, target-specific, global optimizations may make some dynamic sections zero-sized if they are no longer needed. Add ELF strip_zero_sized_dynamic_sections so that ELF backend linker can strip zero-sized dynamic sections after the sections sizes have been set. bfd/ PR ld/25849 * elf-bfd.h (elf_backend_data): Add elf_backend_strip_zero_sized_dynamic_sections. (_bfd_elf_strip_zero_sized_dynamic_sections): New prototype. * elf64-alpha.c (elf_backend_strip_zero_sized_dynamic_sections): New macro. * elflink.c (_bfd_elf_strip_zero_sized_dynamic_sections): New function. * elfxx-target.h (elf_backend_strip_zero_sized_dynamic_sections): New macro. (elfNN_bed): Add elf_backend_strip_zero_sized_dynamic_sections. ld/ PR ld/25849 * ldelfgen.c (ldelf_map_segments): Call elf_backend_strip_zero_sized_dynamic_sections. * testsuite/ld-alpha/tlsbinr.rd: Updated.
2020-04-21alpha: Warn DT_TEXTREL with -MH.J. Lu1-0/+8
This fixes: FAIL: DT_TEXTREL map file warning * elf64-alpha.c (alpha_elf_reloc_entry): Replace reltext with sec. (elf64_alpha_check_relocs): Set sec instead of reltext. Warn DT_TEXTREL with -M. (elf64_alpha_calc_dynrel_sizes): Warn DT_TEXTREL with -M.
2020-04-21Updated Serbian translation for the BFD directory.Nick Clifton1-0/+4
2020-04-21Remove SH-5 remnantsAlan Modra1-0/+5
git commit 211dc24b87 removed most sh5 and sh64 SuperH support, after they were obsoleted by git commit 2b213129c5. This patch removes a few remaining pieces that should have gone with 211dc24b87. include/ * elf/sh.h (STO_SH5_ISA32, SHF_SH5_ISA32, SHF_SH5_ISA32_MIXED), (SHT_SH5_CR_SORTED, STT_DATALABEL): Delete. bfd/ * elf32-sh.c (sh_elf_relocate_section): Remove STO_SH5_ISA32 processing.
2020-04-20When bfd/pdp11.c was copied from bfd/aoutx.h, the #defines for external ↵Stephen Casner1-0/+7
symbol types N_TEXT etc. were #undef'd and then #define'd with new values. But N_STAB was not changed even though the new value for N_EXT overlapped with it. This caused aout_link_write_symbols() to treat global symbols referenced in the source but defined in a linker script as undefined. Separately, in translate_symbol_table() the 16-bit symbol values were sign extended to unsigned long (e.g., 64 bits) when they really should be treated as unsigned so the value remains 16 bits. PR 25828 * pdp11.c (N_STAB): Modify value to avoid conflict with N_EXT causing globals from linker script to be treated as debug symbols. (translate_symbol_table): Don't sign-extend symbol values from 16 to 64 bits in nm output.
2020-04-20PowerPC64: remove empty .rela.dyn (.rela.branch_lt)Alan Modra1-0/+4
Stripping .rela.branch_lt is easy enough but messes with the testsuite due to stub symbols (that use section id) changing. Tests that run on more than one target variant can be tricky to fix, this renaming happened to work. bfd/ * elf64-ppc.c (ppc64_elf_size_stubs): Strip relbrlt too. ld/ * testsuite/ld-powerpc/tlsopt5.s: Rename foo to aaaaa. * testsuite/ld-powerpc/tlsopt5.d: Adjust to suit. * testsuite/ld-powerpc/tlsopt6.d: Likewise.
2020-04-18bfd_is_const_section thinkoAlan Modra1-0/+6
* section.c (bfd_is_const_section): Correct test for special sections. * bfd-in2.h: Regenerate.
2020-04-17PR25842, Null pointer dereference in nm-newAlan Modra1-0/+6
PR 25842 * elf.c (_bfd_elf_get_symbol_version_string): Don't segfault on NULL nodename.
2020-04-16Stop the MIPS assembler from accepting ifunc symbols.Nick Clifton1-0/+6
PR 25803 gas * config/obj-elf.c (obj_elf_type): Reject ifunc symbols on MIPS targets. * testsuite/gas/elf/elf.exp: Add MIPS targets to the list to skip for the type-2 test. * testsuite/gas/elf/type-noifunc.e: Update to allow for MIPS targets running this test. bfd * elfxx-mips.c (_bfd_mips_elf_adjust_dynamic_symbol): Replace an abort with a more helpful error message.
2020-04-16PR25827, Null pointer dereferencing in scan_unit_for_symbolsAlan Modra1-0/+6
PR 25827 * dwarf2.c (scan_unit_for_symbols): Wrap overlong lines. Don't strdup(0).
2020-04-15Unify the behaviour of ld.bfd and ld.gold with respect to warning about ↵Fangrui Song1-0/+16
unresolved symbol references. (PR 24613) PR binutils/24613 include * bfdlink.h (enum report_method): Delete RM_GENERATE_WARNING and RM_GENERATE_ERROR. Add RM_DIAGNOSE. (struct bfd_link_info): Add warn_unresolved_syms. ld * lexsup.c (parse_args): Change RM_GENERATE_WARNING and RM_GENERATE_ERROR to RM_DIAGNOSE. * emultempl/aix.em (ld_${EMULATION_NAME}_emulation): Change RM_GENERATE_ERROR to RM_DIAGNOSE. * emultempl/elf.em (ld_${EMULATION_NAME}_emulation): Likewise. bfd * coff-rs6000.c (xcoff_ppc_relocate_section): Change RM_GENERATE_ERROR to RM_DIAGNOSE plus a check of warn_unresolved_syms. * coff64-rs6000.c (xcoff_ppc_relocate_section): Likewise. * elf-bfd.h (_bfd_elf_large_com_section): Likewise. * elf32-m32r.c (m32r_elf_relocate_section): Likewise. * elf32-score.c (s3_bfd_score_elf_relocate_section): Likewise. * elf32-score7.c (s7_bfd_score_elf_relocate_section): Likewise. * elf32-sh.c (sh_elf_relocate_section): Likewise. * elf32-spu.c (spu_elf_relocate_section): Likewise. * elf64-hppa.c (elf64_hppa_relocate_section): Likewise. * elflink.c (elf_link_output_extsym): Likewise. * elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
2020-04-15PR25823, Use after free in bfd_hash_lookupAlan Modra1-0/+7
PR 25823 * peXXigen.c (_bfd_XXi_swap_sym_in <C_SECTION>): Don't use a pointer into strings that may be freed for section name, always allocate a new string.
2020-04-14[PATCH v2 2/2] coff-go32: support extended relocationsJuan Manuel Guerrero1-0/+26
This patch extends the relocation and line number counters for coff-go32 and coff-go32-exe to 32 bits. As I understand it works the same as for PE-COFF: If the number of relocations in an object file exceeds 65534, the NRELOC field is set to 65535 and the actual number of relocations is stored in the VADDR field of the first relocation entry. Executable files have no relocations, and thus the NRELOC field is repurposed to extend NLNNO to 32-bits. bfd * coff-go32.c (COFF_GO32, IMAGE_SCN_LNK_NRELOC_OVFL) (coff_SWAP_scnhdr_in, coff_SWAP_scnhdr_out): Define. (_bfd_go32_swap_scnhdr_in, _bfd_go32_swap_scnhdr_out) (_bfd_go32_mkobject): New functions. * coff-stgo32.c (IMAGE_SCN_LNK_NRELOC_OVFL) (coff_SWAP_scnhdr_in, coff_SWAP_scnhdr_out): Define. (go32exe_mkobject): Call _bfd_go32_mkobject. * coffcode.h (COFF_WITH_EXTENDED_RELOC_COUNTER): Define. (coff_set_alignment_hook): Define function for COFF_GO32_EXE and COFF_GO32. (coff_write_relocs): Enable extended reloc counter code if COFF_WITH_EXTENDED_RELOC_COUNTER is defined. Test for obj_go32. (coff_write_object_contents): Likewise. Pad section headers for COFF_GO32 and COFF_GO32EXE. Use bfd_coff_swap_scnhdr_out instead of coff_swap_scnhdr_out. * cofflink.c (_bfd_coff_final_link): Test also for obj_go32 to enable extended reloc counter. * coffswap.h: (coff_swap_scnhdr_in, coff_swap_scnhdr_out): Declare with ATTRIBUTE_UNUSED. * libcoff-in.h: (struct coff_tdata): New field go32. (obj_go32): Define. * libcoff.h: Regenerate.
2020-04-14The assembler only supports 32-bit stabs. So set sh_entsize unconditionally ↵Fangrui Song1-0/+6
to 12. PR gas/25768 * elf.c (assign_section_numbers): Always set .stab sh_entsize to 12.
2020-04-14Fixes for the magic number used in PDP11 AOUT binaries.Stephen Casner1-0/+7
PR ld/25677 include * aout/aout64.h (N_DATADDR): Add IMAGIC case. bfd * pdp11.c: Add implementation of --imagic option. (adjust_o_magic): Fix objcopy --extract-symbol test. * libaout.h (enum aout_magic): Add i_magic. ld * emulparams/pdp11.sh (SCRIPT_NAME): Change to pdp11. (EXTRA_EM_FILE): New, add emulation file pdp11. * scripttempl/pdp11.sc: New, derived from aout.sc without irrelevant input sections. * emultempl/pdp11.em (_add_options, _handle_option) (_list_options): New. Add options -z, --imagic for pdp11-aout. (_before_parse): Make --omagic be default instead of --nmagic. (_get_script): Modify special-case linker script for --imagic. * lexsup.c (parse_args): Explictly set config.text_read_only for -n. * ld.texi (Options): Add documentation of PDP11-specific options. (Options): Fix unrelated typo to --no-compact-branches. * gen-doc.texi: @set PDP11. * testsuite/ld-pdp11/pdp11.exp: New, start pdp11 testing. * testsuite/ld-pdp11/sections.s: New, source for options tests. * testsuite/ld-pdp11/imagic.d: New, test --imagic format. * testsuite/ld-pdp11/imagicz.d: New, test -z (imagic) format. * testsuite/ld-pdp11/nmagic.d: New, test --nmagic format. * testsuite/ld-pdp11/omagic.d: New, test --omagic format.
2020-04-07ChangeLog entry for last change.Rainer Orth1-0/+7
2020-04-03elf: Remove zero-sized relocation section from section groupH.J. Lu1-0/+6
Remove zero-sized relocation section from a section group since it has been removed from the output. PR ld/25767 * elf.c (_bfd_elf_fixup_group_sections): Remove zero-sized relocation section from section group.
2020-04-02coff-go32-exe: support variable-length stubsJan W. Jagersma1-0/+39
The stub size in GO32 executables has historically been fixed at 2048 bytes, due to hardcoded limitations in bfd. Recent patches to djgpp by Stas Sergeev (CC'd) have pushed the stub right up to this limit, so if any further expansion is desired, this must first be patched in bfd. This series includes three patches: The first changes the meaning of the bfd->origin field slightly, so that target code can use this to specify an offset into the file where the actual bfd is located. The second patch then uses this to enable support for variable-sized stubs in the coff-go32-exe format. The final patch is only a cleanup, it normalizes function and variable names in coff-stgo32.c so that they all begin with the same prefix. bfd * bfdio.c (bfd_bread, bfd_tell, bfd_seek, bfd_mmap): Always add bfd->origin to file offset. * bfdwin.c (bfd_get_file_window): Likewise. * bfd.c: Clarify the use of the bfd->origin field. * bfd-in2.h: Regenerate. * coff-i386.c: Don't include go32exe.h. Allow overriding coff_write_object_contents via COFF_WRITE_CONTENTS. * coff-stgo32.c (go32exe_cleanup, go32exe_mkobject) (go32exe_write_object_contents): New functions. (go32exe_temp_stub, go32exe_temp_stub_size): New static globals. (COFF_WRITE_CONTENTS, GO32EXE_DEFAULT_STUB_SIZE): Define. (create_go32_stub): Remove check for 2k size limit. Read stub from go32exe_temp_stub if present. (go32_stubbed_coff_bfd_copy_private_bfd_data): Allocate and copy variable-length stub. (go32_check_format): Read stub to go32exe_temp_stub, set origin, return go32exe_cleanup. (adjust_filehdr_in_post, adjust_filehdr_out_pre) (adjust_filehdr_out_post, adjust_scnhdr_in_post) (adjust_scnhdr_out_pre, adjust_scnhdr_out_post) (adjust_aux_in_post, adjust_aux_out_pre, adjust_aux_out_post): Remove functions and their associated #defines. * coffcode.h (coff_mkobject_hook): Remove stub copying code. * libcoff-in.h: (struct coff_tdata): New field stub_size. Rename field go32stub to stub. * libcoff.h: Regenerate. * coff-stgo32.c (go32_check_format): Rename to... (go32exe_check_format): ...this. (go32_stubbed_coff_bfd_copy_private_bfd_data): Rename to... (go32exe_copy_private_bfd_data): ...this. (stub_bytes): Rename to... (go32exe_default_stub): ...this. (create_go32_stub): Rename to... (go32exe_create_stub): ...this. * coff-stgo32.c (go32exe_copy_private_bfd_data): Avoid realloc when possible. include * coff/go32exe.h: Remove file. * coff/internal.h (struct internal_filehdr): Remove field go32stub. Remove flag F_GO32STUB.
2020-04-01x86: Only allow S + A relocations against absolute symbolH.J. Lu1-0/+38
Since value of non-preemptible absolute symbol (SHN_ABS) won't change, only relocations, which can be resolved as absolute value + addend, and GOTPCREL relocations, where absolute value + addend is stored in the GOT slot, against non-preemptible absolute symbol are allowed in PIE and shared library. Also convert load relocation to R_386_32, R_X86_64_32S or R_X86_64_32 for relocation against non-preemptible absolute symbol. Don't convert to R_X86_64_32S nor R_X86_64_32 for non-preemptible absolute symbol if they overflow. bfd/ PR ld/25749 PR ld/25754 * elf32-i386.c (elf_i386_convert_load_reloc): Convert load relocation to R_386_32 for relocation against non-preemptible absolute symbol. (elf_i386_check_relocs): Call _bfd_elf_x86_valid_reloc_p. Don't allocate dynamic relocation for non-preemptible absolute symbol. (elf_i386_relocate_section): Pass sec to GENERATE_DYNAMIC_RELOCATION_P. * elf64-x86-64.c (R_X86_64_converted_reloc_bit): Moved. (elf_x86_64_convert_load_reloc): Covert load relocation to R_X86_64_32S or R_X86_64_32 for relocation against non-preemptible absolute symbol. Don't convert to R_X86_64_32S nor R_X86_64_32 for non-preemptible absolute symbol if they overflow. (elf_x86_64_check_relocs): Call _bfd_elf_x86_valid_reloc_p. Set tls_type for GOT slot to GOT_ABS for non-preemptible absolute symbol. Don't allocate dynamic relocation for non-preemptible absolute symbol. (elf_x86_64_relocate_section): Don't generate relative relocation for GOTPCREL relocations aganst local absolute symbol. Pass sec to GENERATE_DYNAMIC_RELOCATION_P. * elfxx-x86.c (elf_x86_allocate_dynrelocs): No dynamic relocation against non-preemptible absolute symbol. (_bfd_elf_x86_valid_reloc_p): New function. (_bfd_x86_elf_size_dynamic_sections): No dynamic relocation for GOT_ABS GOT slot. * elfxx-x86.h (GENERATE_DYNAMIC_RELOCATION_P): Add an SEC argument. Don't generate dynamic relocation against non-preemptible absolute symbol. (ABS_SYMBOL_P): New. (GENERATE_RELATIVE_RELOC_P): Don't generate relative relocation against non-preemptible absolute symbol. (GOT_ABS): New. (R_X86_64_converted_reloc_bit): New. Moved from elf64-x86-64.c. (_bfd_elf_x86_valid_reloc_p): New. ld/ PR ld/25749 PR ld/25754 * testsuite/ld-elf/linux-x86.exp: Run ld/25749 tests. * testsuite/ld-elf/pr25749-1.c: New file. * testsuite/ld-elf/pr25749-1a.c: Likewise. * testsuite/ld-elf/pr25749-1b.c: Likewise. * testsuite/ld-elf/pr25749-1b.err: Likewise. * testsuite/ld-elf/pr25749-1c.c: Likewise. * testsuite/ld-elf/pr25749-1d.c: Likewise. * testsuite/ld-elf/pr25749-2.c: Likewise. * testsuite/ld-elf/pr25749-2a.s: Likewise. * testsuite/ld-elf/pr25749-2b.s: Likewise. * testsuite/ld-elf/pr25749.rd: Likewise. * testsuite/ld-elf/pr25754-1a.c: Likewise. * testsuite/ld-elf/pr25754-1b.s: Likewise. * testsuite/ld-elf/pr25754-2a.c: Likewise. * testsuite/ld-elf/pr25754-2b.err: Likewise. * testsuite/ld-elf/pr25754-2b.s: Likewise. * testsuite/ld-elf/pr25754-3a.c: Likewise. * testsuite/ld-elf/pr25754-3b.s: Likewise. * testsuite/ld-elf/pr25754-4a.c: Likewise. * testsuite/ld-elf/pr25754-4b.s: Likewise. * testsuite/ld-elf/pr25754-4c.s: Likewise. * testsuite/ld-elf/pr25754-5a.c: Likewise. * testsuite/ld-elf/pr25754-5b.s: Likewise. * testsuite/ld-elf/pr25754-5c.s: Likewise. * testsuite/ld-elf/pr25754-6a.c: Likewise. * testsuite/ld-elf/pr25754-6b.s: Likewise. * testsuite/ld-x86-64/pr19609-6a.d: Don't expect linker error.
2020-04-01Arm: Fix LSB of GOT for Thumb2 only PLT.Tamar Christina1-0/+6
When you have a Thumb only PLT then the address in the GOT for PLT0 needs to have the Thumb bit set since the instruction used in PLTn to get there is `ldr.w pc` which is an inter-working instruction: the PLT sequence in question is 00000120 <foo@plt>: 120: f240 0c98 movw ip, #152 ; 0x98 124: f2c0 0c01 movt ip, #1 128: 44fc add ip, pc 12a: f8dc f000 ldr.w pc, [ip] 12e: e7fc b.n 12a <foo@plt+0xa> Disassembly of section .text: 00000130 <bar>: 130: b580 push {r7, lr} 132: af00 add r7, sp, #0 134: f7ff fff4 bl 120 <foo@plt> and previously the linker would generate Hex dump of section '.got': ... 0x000101b8 40010100 00000000 00000000 10010000 @............... Which would make it jump and transition out of thumb mode and crash since you only have thumb mode on such cores. Now it correctly generates Hex dump of section '.got': ... 0x000101b8 40010100 00000000 00000000 11010000 @............... Thanks to Amol for testing patch and to rgujju for reporting it. bfd/ChangeLog: PR ld/16017 * elf32-arm.c (elf32_arm_populate_plt_entry): Set LSB of the PLT0 address in the GOT if in thumb only mode. ld/ChangeLog: PR ld/16017 * testsuite/ld-arm/arm-elf.exp (thumb-plt-got): New. * testsuite/ld-arm/thumb-plt-got.d: New test.
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