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2016-01-21Fix compile time errors building ARC target on a 32-bit host.Nick Clifton1-0/+6
* elf32-arc.c (ADD_RELA): Fix compile time warning errors by changing the type of _loc to be bfd_byte *. (elf_arc_finish_dynamic_symbol): Likewise.
2016-01-21Fix unexpected failures in the linker testsuite for ARM VxWorks targets.Nick Clifton1-0/+10
PR ld/19455 * elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF class of the linker stub bfd. (elf32_arm_check_relocs): Skip check for pic format after processing a vxWorks R_ARM_ABS12 reloc. * elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when reporting a class mismatch. * testsuite/ld-arm/vxworks1-lib.dd: Update for current disassmebler output. * testsuite/ld-arm/vxworks1-lib.rd: Likewise. * testsuite/ld-arm/vxworks1.dd: Likewise. * testsuite/ld-arm/vxworks1.rd: Likewise. * testsuite/ld-arm/vxworks1.ld: Set the output format.
2016-01-21[AArch64] Relax long branch veneer insertion for non STT_FUNC symbolJiong Wang1-0/+8
As defined at AArch64 ELF Specification (4.6.7 Call and Jump relocations), symbol with type of non STT_FUNC but in different input section with relocation place should insert long branch veneer also. Meanwhile the current long branch veneer infrastructure havn't considered the situation where the branch destination is "sym_value + rela->addend". This was OK because we only insert veneer for long call destination is STT_FUNC symbol for which the addend is always zero. But as we relax the support to other situations by this patch, we need to handle addend be non-zero value. For example, for static function, relocation against "local symbol" are turned into relocation against "section symbol + offset" where there is a valid addend. bfd/ * elfnn-aarch64.c (aarch64_type_of_stub): Allow insert long branch veneer for sym_sec != input_sec. (elfNN_aarch64_size_stub): Support STT_SECTION symbol. (elfNN_aarch64_final_link_relocate): Take rela addend into account when calculation destination. ld/ * testsuite/ld-aarch64/farcall-section.d: Delete. * testsuite/ld-aarch64/farcall-section.s: Delete. * testsuite/ld-aarch64/farcall-b-section.d: New expectation file. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.s: New testcase. * testsuite/ld-aarch64/farcall-bl-section.s: Likewise. * testsuite/ld-aarch64/aarch64-elf.exp: Likewise.
2016-01-21Convert macros in elf-linux-core.h to inline functionsAlan Modra1-0/+12
Besides changing some macros into inline functions, this removes redundant memsets and uses bfd_put_* rather than H_PUT_*. * elf-linux-core.h (swap_linux_prpsinfo32_out): New function. (swap_linux_prpsinfo64_out): New function. (LINUX_PRPSINFO32_SWAP_FIELDS): Delete. (LINUX_PRPSINFO64_SWAP_FIELDS): Delete. * elf.c (elfcore_write_linux_prpsinfo32): Adjust. Don't memset. (elfcore_write_linux_prpsinfo64): Likewise. * elf32-ppc.c (swap_ppc_linux_prpsinfo32_out): New function. (PPC_LINUX_PRPSINFO32_SWAP_FIELDS): Delete. (elfcore_write_ppc_linux_prpsinfo32): Adjust. Don't memset.
2016-01-21Rename elf-linux-psinfo.h to elf-linux-core.hAlan Modra1-0/+9
Since it will sometime have more than just prpsinfo. Also, elf32-ppc.c needlessly includes this header. * elf-linux-core.h: Rename from elf-linux-psinfo.h. * elf.c: Adjust #include. * elf32-ppc.c: Don't #include elf-linux-psinfo.h * Makefile.am (SOURCE_HFILES): Update. * Makefile.in: Regenerate. * po/SRC-PORFILES.in: Regenerate.
2016-01-21bfd/configure reorganisationAlan Modra1-0/+6
Corefile code should be moved after running config.bfd, because it uses want64. * configure.ac: Move corefile selection later in file. Move tdefaults code immediately after other target vector code. * configure: Regenerate.
2016-01-20Add support for an ARM specific 'y' section attribute flag to mark the ↵Mickael Guene1-0/+5
section as NOREAD. bfd/ChangeLog: * elf32-arm.c ((elf32_arm_special_sections): Remove catch of noread section using '.text.noread' pattern. gas/ChangeLog: * config/obj-elf.c (obj_elf_change_section) : Allow arm section with SHF_ARM_NOREAD section flag. * config/tc-arm.h (md_elf_section_letter) : Implement this hook to handle letter 'y'. (arm_elf_section_letter) : Declare it. * config/tc-arm.c (arm_elf_section_letter): Handle letter 'y' to set SHF_ARM_NOREAD section flag. * doc/c-arm.texi (ARM section attribute 'y'): Document it. gas/testsuite/ChangeLog: * gas/arm/section-execute-only.s: New test case. * gas/arm/section-execute-only.d: Expected output. ld/testsuite/ChangeLog: * ld-arm/thumb1-noread-not-present-mixing-two-section.s: Add 'y' attribute usage. * ld-arm/thumb1-noread-present-one-section.s: Likewise. * ld-arm/thumb1-noread-present-two-section.s: Likewise. * ld-arm/thumb1-input-section-flag-match.s: Likewise. binutils/ChangeLog: * readelf.c (get_elf_section_flags): Display y letter for section with SHF_ARM_NOREAD section flag in readelf section output. (process_section_headers): Add y letter in readelf section output key mapping for ARM architecture.
2016-01-19Add a pseudosection for the NT_FREEBSD_THRMISC note.John Baldwin1-0/+4
bfd/ChangeLog: * elf.c (elfcore_grok_note): Recognize NT_FREEBSD_THRMISC notes.
2016-01-19Add PIC and TLS support to the ARC target.Miranda Cupertino1-0/+39
bfd/ChangeLog: * arc-plt.def: New file. * arc-plt.h: Likewise. * elf32-arc.c (elf_arc_abs_plt0_entry, elf_arc_abs_pltn_entry, elf_arcV2_abs_plt0_entry, elf_arcV2_abs_pltn_entry, elf_arc_pic_plt0_entry, elf_arc_pic_pltn_entry, elf_arcV2_pic_plt0_entry, elf_arcV2_pic_pltn_entry): Remove. (name_for_global_symbol): Added. (ADD_RELA): Helper to create dynamic relocs. (new_got_entry_to_list): Create a new got entry in linked list. (symbol_has_entry_of_type): Search for specific type of entry in list. (is_reloc_for_GOT): return FALSE for any TLS related relocs. (is_reloc_for_TLS, arc_elf_set_private_flags) (arc_elf_print_private_bfd_data, arc_elf_copy_private_bfd_data) (arc_elf_merge_private_bfd_data): New functions. (debug_arc_reloc): Cleaned debug info printing. (PDATA reloc): Changed not to perform address alignment. (reverse_me): Added. Fix for ARC_32 relocs. (arc_do_relocation): Return bfd_reloc_of when no relocation should occur. (arc_get_local_got_ents): Renamed from arc_get_local_got_offsets. Changed function to access an array of list of GOT entries instead of just an array of offsets. (elf_arc_relocate_section): Added support for PIC and TLS related relocations. (elf_arc_check_relocs): Likewise. (elf_arc_adjust_dynamic_symbol, elf_arc_finish_dynamic_symbol, (elf_arc_finish_dynamic_sections): Likewise (arc_create_dynamic_sections): Modified conditions to create dynamic sections. (ADD_SYMBOL_REF_SEC_AND_RELOC): New macro. (plt_do_relocs_for_symbol, relocate_plt_for_symbol) (relocate_plt_for_entry): Changed to support new way to define PLT related code. (add_symbol_to_plt): Likewise. (arc_elf_link_hash_table_create): New function. include/ChangeLog: * elf/arc-reloc.def (ARC_32, ARC_GOTPC, ARC_TLS_GD_GOT) (ARC_TLS_IE_GOT, ARC_TLS_DTPOFF, ARC_TLS_DTPOFF_S9, ARC_TLS_LE_S9) (ARC_TLS_LE_32): Fixed formula. (ARC_TLS_GD_LD): Use new special function. * opcode/arc-func.h: Changed all the replacement functions to clear the patching bits before doing an or it with the value argument.
2016-01-18Use a 32-bit value to hold the section number in the internal COFF symbol ↵Nick Clifton1-0/+11
structure. PR ld/19440 inc * coff/internal.h (internal_syment): Use int to hold section number. (N_UNDEF): Cast to int not short. (N_ABS): Likewise. (N_DEBUG): Likewise. (N_TV): Likewise. (P_TV): Likewise. bfd PR ld/19440 * coff-rs6000.c (_bfd_xcoff_swap_sym_in): Sign extend external section number into internal section number. * coff64-rs6000.c (_bfd_xcoff64_swap_sym_in): Likewise. * coffswap.h (coff_swap_sym_in): Likewise. * peXXigen.c (_bfd_XXi_swap_sym_in): Likewise. * coffcode.h (_coff_bigobj_swap_sym_in): Make sure that internal section number field is big enough to hold the external value.
2016-01-17Regen configureAlan Modra1-0/+4
Picks up 2016-01-12 libtool.m4 change. bfd/ * configure: Regenerate. binutils/ * configure: Regenerate. gas/ * configure: Regenerate. gprof/ * configure: Regenerate. ld/ * configure: Regenerate. opcodes/ * configure: Regenerate.
2016-01-12Add cantunwind when unwind info does not match start of section.Yury Usishchev1-0/+6
bfd * elf32-arm.c (elf32_arm_fix_exidx_coverage): Insert cantunwind when address in first unwind entry does not match start of section. tests * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-mix.d: New file. * ld-arm/unwind-mix1.s: New file. * ld-arm/unwind-mix2.s: New file.
2016-01-08[ARM] PR ld/19368: Add missing relocation type class for R_ARM_IRELATIVEJiong Wang1-0/+7
2016-01-08 Richard Sandiford <richard.sandiford@arm.com> Jiong Wang <jiong.wang@arm.com> PR ld/19368 bfd/ * elf32-arm.c (elf32_arm_reloc_type_class): Map R_ARM_IRELATIVE to reloc_class_ifunc. ld/ * testsuite/ld-arm/ifunc-3.rd: Update expected result. * testsuite/ld-arm/ifunc-4.rd: Likewise. * testsuite/ld-arm/ifunc-9.rd: Likewise. * testsuite/ld-arm/ifunc-10.rd: Likewise. * testsuite/ld-arm/ifunc-12.rd: Likewise. * testsuite/ld-arm/ifunc-13.rd: Likewise.
2016-01-06bfd/arc: Add R_ prefix to all relocation namesAndrew Burgess1-0/+7
The convention within for relocation names is that they start with the string "R_", however, this is not so for ARC for the display names of relocations, however, internally, the names for the relocations types do have the 'R_' prefix. I suspect that the missing 'R_' on the output strings was an oversight, as I can't see any comment to the contrary. To bring ARC into line with other targets, this commit adds the 'R_' prefix to the output strings used for relocation names, and updates all of the assembler tests where this was exposed. bfd/ChangeLog: * elf32-arc.c (reloc_type_to_name): Change ARC_RELOC_HOWTO to place 'R_' before the reloc name returned. (elf_arc_howto_table): Change ARC_RELOC_HOWTO to place 'R_' before the relocation string. gas/ChangeLog: * testsuite/gas/arc/adc.d: Add 'R_' prefix to relocation names. * testsuite/gas/arc/add.d: Likewise. * testsuite/gas/arc/and.d: Likewise. * testsuite/gas/arc/asl.d: Likewise. * testsuite/gas/arc/asr.d: Likewise. * testsuite/gas/arc/bic.d: Likewise. * testsuite/gas/arc/extb.d: Likewise. * testsuite/gas/arc/extw.d: Likewise. * testsuite/gas/arc/j.d: Likewise. * testsuite/gas/arc/jl.d: Likewise. * testsuite/gas/arc/ld2.d: Likewise. * testsuite/gas/arc/lsr.d: Likewise. * testsuite/gas/arc/mov.d: Likewise. * testsuite/gas/arc/or.d: Likewise. * testsuite/gas/arc/pcl-relocs.d: Likewise. * testsuite/gas/arc/pcrel-relocs.d: Likewise. * testsuite/gas/arc/pic-relocs.d: Likewise. * testsuite/gas/arc/plt-relocs.d: Likewise. * testsuite/gas/arc/rlc.d: Likewise. * testsuite/gas/arc/ror.d: Likewise. * testsuite/gas/arc/rrc.d: Likewise. * testsuite/gas/arc/sbc.d: Likewise. * testsuite/gas/arc/sda-relocs.d: Likewise. * testsuite/gas/arc/sda-relocs2.d: Likewise. * testsuite/gas/arc/sexb.d: Likewise. * testsuite/gas/arc/sexw.d: Likewise. * testsuite/gas/arc/st.d: Likewise. * testsuite/gas/arc/sub.d: Likewise. * testsuite/gas/arc/tls-relocs.d: Likewise. * testsuite/gas/arc/xor.d: Likewise.
2016-01-04MIPS/BFD: Factor out ABI flag mergingMaciej W. Rozycki1-0/+6
Factor out the parts of `_bfd_mips_elf_merge_private_bfd_data' responsible for ABI flag merging to `mips_elf_merge_obj_abiflags'. No functional change. bfd/ * elfxx-mips.c (mips_elf_merge_obj_abiflags): New function, factored out from... (_bfd_mips_elf_merge_private_bfd_data): ... here.
2016-01-04MIPS/BFD: Move attribute check after ELF file header flag checkMaciej W. Rozycki1-0/+5
We have a problem in that in making compatibility checks while merging private BFD data on the MIPS target we give priority to the attribute check, which may fail and cause the function to abort early on. The problem with this is the ABI compatibility aspect recorded in the attributes is relatively minor compared to aspects recorded in the ELF file header. However the premature exit causes any more important compatibility aspect violated to be masked and not reported to the user once a problem with attributes has been noticed. So move the attribute check after the ELF file header flag check in `_bfd_mips_elf_merge_private_bfd_data', and do not return prematurely there. Take advantage of the resulting grouping of ELF file header handling together and remove the premature success return point for the first input object being handled, letting the code later on figure out output ABI flags even for this object. Update LD test cases according to messages from ELF file header checks now preceding ones from attribute checks. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Move attribute check after ELF file header flag check. ld/ * testsuite/ld-mips-elf/attr-gnu-4-14.d: Update the order of messages expected according to MIPS BFD private data merge changes. * testsuite/ld-mips-elf/attr-gnu-4-24.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-34.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-41.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-42.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-43.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-45.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-46.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-47.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-48.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-49.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-54.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-64.d: Likewise. * testsuite/ld-mips-elf/attr-gnu-4-74.d: Likewise.
2016-01-04MIPS/BFD: Propagate the return status in attribute mergingMaciej W. Rozycki1-0/+5
Fix the issue of any failure from `_bfd_elf_merge_object_attributes' not being propagated by `mips_elf_merge_obj_attributes'. bfd/ * elfxx-mips.c (mips_elf_merge_obj_attributes): Propagate the return status from `_bfd_elf_merge_object_attributes'.
2016-01-04MIPS/BFD: Factor out ELF file header flag checksMaciej W. Rozycki1-0/+6
Factor out the parts of `_bfd_mips_elf_merge_private_bfd_data' responsible for ELF file header flag compatibility checks to `mips_elf_merge_obj_e_flags'. As a side effect remove a premature return point from `_bfd_mips_elf_merge_private_bfd_data'. No functional change otherwise. bfd/ * elfxx-mips.c (mips_elf_merge_obj_e_flags): New function, factored out from... (_bfd_mips_elf_merge_private_bfd_data): ... here.
2016-01-04MIPS/BFD: Fold the handling of input MIPS ABI flags togetherMaciej W. Rozycki1-0/+5
Fold the handling of input MIPS ABI flags in private BFD data merging together, moving the attribute check afterwards, and consequently making input vs output compatibility checks only start once all input ABI flag data has been gathered, checked for inconsistencies and put in order. Consequently also address the issue of input ABI flag inconsistencies being masked by a failing attribute check, which currently makes `_bfd_mips_elf_merge_private_bfd_data' exit prematurely and therefore prevent input ABI flag inconsistencies from being reported. Such inconsistencies need to be reported as they may be the very cause of an attribute check failure. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Fold the handling of input MIPS ABI flags together.
2016-01-04MIPS/BFD: Suppress attribute checks for null inputMaciej W. Rozycki1-0/+5
We currently special-case the handling of attribute checks on input objects and make them even before we check a given input object actually contains any sections. This does not add value as empty objects do not cause a compatibility concern and we already make this observation for other properties such as ELF file header flags. Moreover the attributes themselves are stored in a `.gnu.attributes' section so the absence of any section (except from a few special cases) implies there have been no attributes provided either. Therefore it is safe to move the attribute checks later on, after the null-section check has been made. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Suppress attribute checks for null input.
2016-01-04MIPS/BFD: Use local pointers to target data in private data mergeMaciej W. Rozycki1-0/+5
Use local pointers to target data to reduce the amount of indirection and improve the readability of `_bfd_mips_elf_merge_private_bfd_data'. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Use local pointers to target data.
2016-01-04MIPS/BFD: Correct an FP ABI warningMaciej W. Rozycki1-0/+5
Correct a warning produced on any FP ABI mismatch observed. Unlike the other settings, which in the presence of `.MIPS.abiflags' are duplicated in the `e_flags' member of the ELF file header, information on the FP ABI in use is duplicated in `.gnu.attributes' rather than in the former place. Update the warning message accordingly. bfd/ * elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Correct an FP ABI warning.
2016-01-01Copyright update for binutilsAlan Modra1-0/+4
2016-01-01New 2016 binutils ChangeLog filesAlan Modra1-0/+14
Note that this does not create bfd/doc/ChangeLog, */testsuite/ChangeLog and include/*/ChangeLog files.
2016-01-01binutils ChangeLog rotationAlan Modra1-4247/+0
2015-12-30Fix assorted ChangeLog errorsAlan Modra1-121/+120
2015-12-27Correct nios2 _gp address computation.Sandra Loosemore1-0/+7
2015-12-27 Sandra Loosemore <sandra@codesourcery.com> bfd/ * elf32-nios2.c (nios2_elf_assign_gp): Correct computation of _gp address. (nios2_elf32_relocate_section): Tidy code for R_NIOS2_GPREL error messages.
2015-12-24Add support for linking ARMv8-M object filesThomas Preud'homme1-0/+10
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Check that profile is 'M' and update logic around Tag_CPU_arch values to return TRUE for ARMv8-M architectures. (tag_cpu_arch_combine): Define v8m_baseline and v8m_mainline and update v4t_plus_v6_m and comb to deal with ARMv8-M Tag_CPU_arch merging logic. (elf32_arm_merge_eabi_attributes): Add Tag_CPU_name values for ARMv8-M. bfd/testsuite/ * ld-arm/arm-elf.exp (armeabitests_common): Run new tests "Thumb-Thumb farcall v8-M", "EABI attribute merging 8", "EABI attribute merging 9" and "EABI attribute merging 10". (Thumb-Thumb farcall v8-M): Renamed to ... (Thumb-Thumb farcall v8-M Mainline): This. (Thumb-Thumb farcall v8-M Baseline): New test. * ld-arm/attr-merge-8a.s: New file. * ld-arm/attr-merge-8b.s: Likewise. * ld-arm/attr-merge-8.attr: Likewise. * ld-arm/attr-merge-9a.s: Likewise. * ld-arm/attr-merge-9b.s: Likewise. * ld-arm/attr-merge-9.out: Likewise. * ld-arm/attr-merge-10a.s: Likewise. * ld-arm/attr-merge-10b.s: Likewise. * ld-arm/attr-merge-10.attr: Likewise.
2015-12-24Add assembler support for ARMv8-M BaselineThomas Preud'homme1-0/+5
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (tag_cpu_arch_combine): Adjust comment in v4t_plus_v6_m with regards to merging with ARMv8-M Baseline. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Baseline Tag_CPU_arch value. gas/ * config/tc-arm.c (arm_ext_v6t2_v8m): New feature for instructions shared between ARMv6T2 and ARMv8-M. (move_or_literal_pool): Check mov.w/mvn and movw availability against arm_ext_v6t2 and arm_ext_v6t2_v8m respectively instead of checking arm_arch_t2. (do_t_branch): Error out for wide conditional branch instructions if targetting ARMv8-M Baseline. (non_v6t2_wide_only_insn): Add the logic for new wide-only instructions in ARMv8-M Baseline. (wide_insn_ok): New function. (md_assemble): Use wide_insn_ok instead of non_v6t2_wide_only_insn and adapt error message for unsupported wide instruction to ARMv8-M Baseline. (insns): Reorganize instructions shared by ARMv8-M Baseline and ARMv6t2 architecture. (arm_cpus): Set feature bit ARM_EXT2_V6T2_V8M for marvell-pj4 and marvell-whitney cores. (arm_archs): Define armv8-m.base architecture. (cpu_arch_ver): Define ARM_ARCH_V8M_BASE architecture version. (aeabi_set_public_attributes): Add logic to set Tag_CPU_arch to 17 for ARMv8-M Mainline. Set Tag_DIV_use for ARMv8-M Baseline as well. gas/testsuite/ * gas/arm/archv8m-base.d: New file. * gas/arm/attr-march-armv8m.base.d: Likewise. * gas/arm/armv8m.base-idiv.d: Likewise. * gas/arm/any-armv8m.d: Adapt to deal with ARMv8-M Baseline. include/elf/ * arm.h (TAG_CPU_ARCH_V8M_BASE): Declare. include/opcode/ * arm.h (ARM_EXT2_V6T2_V8M): New extension bit. (ARM_AEXT2_V8A): New architecture extension bitfield. (ARM_AEXT2_V8_1A): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_AEXT_V8M_BASE): New architecture extension bitfield. (ARM_AEXT2_V8M): Add extension bit ARM_EXT2_V6T2_V8M. (ARM_ARCH_V6T2): Use ARM_EXT2_V6T2_V8M for the second extension bitfield. (ARM_ARCH_V6KT2): Likewise. (ARM_ARCH_V6ZT2): Likewise. (ARM_ARCH_V6KZT2): Likewise. (ARM_ARCH_V7): Likewise. (ARM_ARCH_V7A): Likewise. (ARM_ARCH_V7VE): Likewise. (ARM_ARCH_V7R): Likewise. (ARM_ARCH_V7M): Likewise. (ARM_ARCH_V7EM): Likewise. (ARM_ARCH_V8A): Likewise. (ARM_ARCH_V8M_BASE): New architecture bitfield. (ARM_ARCH_THUMB2): Include instructions shared by ARMv6t2 and ARMv8-M. (ARM_ARCH_V7A_SEC): Use ARM_EXT2_V6T2_V8M for the second extension bitfield and reindent. (ARM_ARCH_V7A_MP_SEC): Likewise. (ARM_ARCH_V7R_IDIV): Likewise. (ARM_ARCH_V8A_FP): Use ARM_AEXT2_V8A instead of ARM_EXT2_ATOMICS. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. opcodes/ * arm-dis.c (arm_opcodes): Guard movw, movt cbz, cbnz, clrex, ldrex, ldrexb, ldrexh, strex, strexb, strexh shared by ARMv6T2 and ARMv8-M by ARM_EXT2_V6T2_V8M instead of ARM_EXT_V6T2.
2015-12-24Add assembler support for ARMv8-M MainlineThomas Preud'homme1-0/+6
2015-12-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ (tag_cpu_arch_combine): Adjust v4t_plus_v6_m and comb array to account for new TAG_CPU_ARCH_V4T_PLUS_V6_M value. Deal with NULL values in comb array. binutils/ * readelf.c (arm_attr_tag_CPU_arch): Add ARMv8-M Mainline Tag_CPU_arch value. (arm_attr_tag_THUMB_ISA_use): Add ARMv8-M Mainline Tag_THUMB_ISA_use value. gas/ * config/tc-arm.c (arm_ext_m): Include ARMv8-M. (arm_ext_v8m): New feature for ARMv8-M. (arm_ext_atomics): New feature for ARMv8 atomics. (do_tt): New encoding function for TT* instructions. (insns): Add new entries for ARMv8-M specific instructions and reorganize the ones shared by ARMv8-M Mainline and ARMv8-A. (arm_archs): Define armv8-m.main architecture. (cpu_arch_ver): Define ARM_ARCH_V8M_MAIN architecture version and clarify the ordering rule. (aeabi_set_public_attributes): Use TAG_CPU_ARCH_* macro to refer to Tag_CPU_arch values for ARMv7e-M detection. Add logic to keep setting Tag_CPU_arch to ARMv8-A for -march=all. Also set Tag_CPU_arch_profile to 'A' if extension bit for atomic instructions is set, unless it is ARMv8-M. Set Tag_THUMB_ISA_use to 3 for ARMv8-M. Set Tag_DIV_use to 0 for ARMv8-M Mainline. gas/testsuite/ * gas/arm/archv8m.s: New file. * gas/arm/archv8m-main.d: Likewise. * gas/arm/attr-march-armv8m.main.d: Likewise. * gas/arm/any-armv8m.s: Likewise. * gas/arm/any-armv8m.d: Likewise. include/elf/ * arm.h (TAG_CPU_ARCH_V8M_MAIN): Declare. (MAX_TAG_CPU_ARCH): Define to TAG_CPU_ARCH_V8M_MAIN. (TAG_CPU_ARCH_V4T_PLUS_V6_M): Define to unused value 15. include/opcode/ * arm.h (ARM_EXT2_ATOMICS): New extension bit. (ARM_EXT2_V8M): Likewise. (ARM_EXT_V8): Adjust comment with regards to atomics and remove mention of legacy use for that bit. (ARM_AEXT2_V8_1A): New architecture extension bitfield. (ARM_AEXT2_V8_2A): Likewise. (ARM_AEXT_V8M_MAIN): Likewise. (ARM_AEXT2_V8M): Likewise. (ARM_ARCH_V8A): Use ARM_EXT2_ATOMICS for features in second bitfield. (ARM_ARCH_V8_1A): Likewise with ARM_AEXT2_V8_1A. (ARM_ARCH_V8_2A): Likewise with ARM_AEXT2_V8_2A. (ARM_ARCH_V8M_MAIN): New architecture feature bitfield. (ARM_ARCH_V8A_FP): Use ARM_EXT2_ATOMICS for features in second bitfield and reindent. (ARM_ARCH_V8A_SIMD): Likewise. (ARM_ARCH_V8A_CRYPTOV1): Likewise. (ARM_ARCH_V8_1A_FP): Use ARM_AEXT2_V8_1A to set second bitfield of feature bits. (ARM_ARCH_V8_1A_SIMD): Likewise. (ARM_ARCH_V8_1A_CRYPTOV1): Likewise. opcodes/ * arm-dis.c (arm_opcodes): Guard lda, ldab, ldaex, ldaexb, ldaexh, stl, stlb, stlh, stlex, stlexb and stlexh by ARM_EXT2_ATOMICS instead of ARM_EXT_V8. (thumb32_opcodes): Add entries for wide ARMv8-M instructions.
2015-12-22ARM: Fix exidx coverage for relocatable builds.Yury Usishchev1-0/+15
bfd * elf-bfd.h: Add callback to count additional relocations. * elf32-arm.c (_arm_elf_section_data): Add new counter. (insert_cantunwind_after): Increment relocations counter. (elf32_arm_fix_exidx_coverage): Remove exidx entries and add terminating CANTUNWIND entry only in final builds. (elf32_arm_add_relocation): New function. (elf32_arm_write_section): Add relocations in relocatable builds. (elf32_arm_count_additional_relocs): New function. (elf_backend_count_additional_relocs): New define. * bfd/elflink.c (bfd_elf_final_link): Use callback and adjust size of .rel section. * bfd/elfxx-target.h (elf_backend_count_additional_relocs): New define. ld * emultempl/armelf.em (gld${EMULATION_NAME}_after_allocation): Call elf32_arm_fix_exidx_coverage for relocatable builds. ld/testsuite * ld-arm/arm-elf.exp: New test. * ld-arm/unwind-rel.d: New file. * ld-arm/unwind-rel1.s: New file. * ld-arm/unwind-rel2.s: New file. * ld-arm/unwind-rel3.s: New file.
2015-12-22RXv2 support updateYoshinori Sato1-0/+7
2015-12-22 Yoshinori Sato <ysato@users.sourceforge.jp> opcodes/ * rx-decode.opc (movco): Use uniqe id. (movli): Likewise. (stnz): Condition fix. (mvtacgu): Destination fix. * rx-decode.c: Regenerate. bfd/ * archures.c: Add bfd_mach_rx_v2. * bfd-in2.h: Regenerate. * cpu-rx.c (arch_info_struct): Add v2 information. * elf32-rx.c (elf32_rx_machine): Add v2 support.
2015-12-22Add support for ARM's NOREAD section flag.Mickael Guene1-0/+15
include/elf * arm.h: Add arm SHF_ARM_NOREAD section flag. bfd * bfd-in2.h: Regenerate. * section.c: Add SEC_ELF_NOREAD. * elf32-arm.c (elf32_arm_post_process_headers): Only set PF_X attribute if a segment only contains section with SHF_ARM_NOREAD flag. (elf32_arm_fake_sections): Add SEC_ELF_NOREAD conversion. (elf32_arm_section_flags): New function to convert SHF_ARM_NOREAD to bfd flag. (elf32_arm_lookup_section_flags): New function to allow INPUT_SECTION_FLAGS directive with SHF_ARM_NOREAD flag. (elf32_arm_special_sections): Add special sections array to catch section prefix by '.text.noread' pattern. ld/testsuite * ld-arm/arm-elf.exp: New tests. * ld-arm/thumb1-input-section-flag-match.d: New * ld-arm/thumb1-input-section-flag-match.s: New * ld-arm/thumb1-noread-not-present-mixing-two-section.d: New * ld-arm/thumb1-noread-not-present-mixing-two-section.s: New * ld-arm/thumb1-noread-present-one-section.d: New * ld-arm/thumb1-noread-present-one-section.s: New * ld-arm/thumb1-noread-present-two-section.d: New * ld-arm/thumb1-noread-present-two-section.s: New binutils * readelf.c (get_elf_section_flags): Add support for ARM specific section flags.
2015-12-18Fix formatting in coff-x86_64.cH.J. Lu1-0/+4
* coff-x86_64.c (coff_amd64_reloc): Fix formatting.
2015-12-18Fix formatting of coff-i386.cNick Clifton1-0/+4
* coff-i386.c (coff_i386_reloc): Fix formatting.
2015-12-17Add forgotten ChangeLog updates for 72d98d16ed09584660d0cbb759d90f8dfeef2343:Christophe Lyon1-0/+12
2015-12-16 Mickael Guene <mickael.guene@st.com> bfd/ * bfd-in2.h: Regenerate. * reloc.c: Add new relocations. * libbfd.h (bfd_reloc_code_real_names): Add new relocations display names. * elf32-arm.c (elf32_arm_howto_table_1): Add HOWTO for new relocations. (elf32_arm_reloc_map): Add bfd/arm mapping for new relocations. (elf32_arm_final_link_relocate): Implement new relocations resolution. gas/ * doc/c-arm.texi: Add documentation about new directives * config/tc-arm.c (group_reloc_table): Add mapping between gas syntax and new relocations. (do_t_add_sub): Keep new relocations for add operand. (do_t_mov_cmp): Keep new relocations for mov operand. (insns): Use 'shifter operand with possible group relocation' operand parse code for movs operand. (md_apply_fix): Implement mov and add encoding when new relocations on them. (tc_gen_reloc): Add new relocations. (arm_fix_adjustable): Since offset has a limited range ([0:255]) we disable adjust_reloc_syms() for new relocations. gas/testsuite/ * gas/arm/adds-thumb1-reloc-local.d: New * gas/arm/adds-thumb1-reloc-local.s: New * gas/arm/movs-thumb1-reloc-local.d: New * gas/arm/movs-thumb1-reloc-local.s: New include/ * elf/arm.h: Add new arm relocations. ld/testsuite/ * ld-arm/arm-elf.exp (armelftests_common): Add new relocations tests. * ld-arm/thumb1-adds.d: New * ld-arm/thumb1-adds.s: New * ld-arm/thumb1-movs.d: New * ld-arm/thumb1-movs.s: New
2015-12-15bfd: don't produce corrupt COFF symbol table due to long ELF file name symbolsJan Beulich1-0/+14
The re-writing logic in _bfd_coff_final_link() overwrote the ".file" part of the symbol table entry, due to not coping with the auxiliary entry generated in all cases. Note that while I would have wanted to add a test case, (a) I didn't spot any one testing the base functionality here, and (b) I wasn't able to figure out proper conditionals to use in e.g. ld-elf/elf.exp to check for the necessary PE/PE+ support (which varies by target).
2015-12-15Update the copyright notices in the affected files.Nick Clifton1-0/+8
PR 19339 * elf-vxworks.h: Update copyright notice. * elf-vxworks.c: Update copyright notice. * elf-nacl.h: Update copyright notice. * elf-nacl.c: Update copyright notice.
2015-12-10ld -r doesn't need plugin for slim lto objectH.J. Lu1-0/+6
Plugin isn't required on slim lto object for relocatable link. bfd/ PR ld/19317 * linker.c (_bfd_generic_link_add_one_symbol): Don't complain plugin needed to handle slim lto object for relocatable link. ld/testsuite/ PR ld/19317 * ld-plugin/lto.exp (lto_no_fat): New. (lto_link_tests): Add a test for PR ld/19317. (lto_run_tests): Likewise. (run_ld_link_tests): Likewise.
2015-12-09Fix GOT address computations in initial PLT entries for nios2.Sandra Loosemore1-0/+6
2015-12-09 Sandra Loosemore <sandra@codesourcery.com> bfd/ * elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Correct %hiadj/%lo computations for _GLOBAL_OFFSET_TABLE_ in initial PLT entries. Assert alignment requirements.
2015-12-08rl78: relaxation fixesDJ Delorie1-0/+4
Various fixes to linker relaxation. In general, we need to support relaxing every branch, even if we don't relax it in the assembler, so we can optionally defer relaxation to the linker. * elf32-rl78.c (rl78_offset_for_reloc): Add more relocs. (rl78_elf_relax_section): Add bc/bz/bnc/bnz/bh/bnh. Fix reloc choices. * config/rl78-parse.y: Make all branches relaxable via rl78_linkrelax_branch(). * config/tc-rl78.c (rl78_linkrelax_branch): Mark all relaxable branches with relocs. (options): Add OPTION_NORELAX. (md_longopts): Add -mnorelax. (md_parse_option): Support OPTION_NORELAX. (op_type_T): Add bh, sk, call, and br. (rl78_opcode_type): Likewise. (rl78_relax_frag): Fix not-relaxing logic. Add sk. (md_convert_frag): Fix relocation handling. (tc_gen_reloc): Strip relax relocs when not linker relaxing. (md_apply_fix): Defer overflow handling for anything that needs a PLT, to the linker. * config/tc-rl78.h (TC_FORCE_RELOCATION): Force all relocations to the linker when linker relaxing. * doc/c-rl78.texi (norelax): Add.
2015-12-08rx: Fix p_vaddr reconstruction logic.DJ Delorie1-0/+4
* elf32-rx.c (rx_elf_object_p): Ignore empty and nobits sections.
2015-12-07oops - accidentally omittde from previous delta.Nick Clifton1-0/+7
2015-12-07PowerPC ifunc with local symbolsAlan Modra1-0/+12
This fixes some cases where the linker would incorrectly error on plt relocs to local ifunc symbols. I've also tidied plt and ifunc handling for ppc64, where check_relocs was allowing for the possibility of plt calls via addr14/addr24 relocs but relocate_section was not. * elf32-ppc.c (ppc_elf_check_relocs): Don't error on local ifunc plt call. Wrap long lines. (ppc_elf_relocate_section): Wrap long lines. * elf64-ppc.c (ppc64_elf_check_relocs): Don't error on local ifunc plt calls. Move __tls_get_addr checks later. Don't create plt for addr14/addr24 relocs. (ppc64_elf_gc_sweep_hook): Adjust to suit check_relocs changes. (ppc64_elf_relocate_section): Correct local ifunc handling for PLT64, PLT32 and PLT16 relocs.
2015-12-07PR19323 memory allocation greater than 4GAlan Modra1-0/+6
On 32-bit targets, memory requested for program/section headers on a fuzzed binary can wrap to 0. A bfd_alloc of zero bytes actually returns a one byte allocation rather than a NULL pointer. This then leads to buffer overflows. Making this check unconditional triggers an extremely annoying gcc-5 warning. PR19323 * elfcode.h (elf_object_p): Check for ridiculous e_shnum and e_phnum values.
2015-12-07R_PPC64_ENTRYAlan Modra1-0/+12
Add a new relocation that marks large-model entry code, for edit back to medium-model. include/elf/ * ppc64.h (R_PPC64_ENTRY): Define. bfd/ * reloc.c (BFD_RELOC_PPC64_ENTRY): New. * elf64-ppc.c (reloc_howto_type ppc64_elf_howto_raw): Add entry for R_PPC64_ENTRY. (LD_R2_0R12, ADD_R2_R2_R12, LIS_R2, ADDIS_R2_R12): Define. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_ENTRY. (ppc64_elf_relocate_section): Edit code at R_PPC64_ENTTY. Use new insn defines. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate.
2015-12-07bfd: Mark sh5*-*-* and sh64*-*-* targets as obsolete.Kaz Kojima1-0/+4
2015-12-04Optimize R_386_GOT32/R_386_GOT32X only if addend is 0H.J. Lu1-0/+6
Linker can't optimize R_386_GOT32 and R_386_GOT32X relocations if addend isn't 0. It isn't valid to convert movl foo@GOT+1(%ecx), %eax to leal foo@GOTOFF+1(%ecx), %eax nor to convert movq foo@GOTPCREL+1(%rip), %rax to leaq foo(%rip), %rax for x86-64. We should check if addend is 0 before optimizing R_386_GOT32 and R_386_GOT32X relocations. Testcases are added for i386 and x86-64. bfd/ * elf32-i386.c (elf_i386_convert_load): Skip if addend isn't 0. (elf_i386_relocate_section): Skip R_386_GOT32X optimization if addend isn't 0. ld/testsuite/ * ld-i386/i386.exp: Run mov2a, mov2b and mov3. * ld-i386/mov2.s: New file. * ld-i386/mov2a.d: Likewise. * ld-i386/mov2b.d: Likewise. * ld-i386/mov3.d: Likewise. * ld-i386/mov3.s: Likewise. * ld-x86-64/mov2.s: Likewise. * ld-x86-64/mov2a.d: Likewise. * ld-x86-64/mov2b.d: Likewise. * ld-x86-64/mov2c.d: Likewise. * ld-x86-64/mov2d.d: Likewise. * ld-x86-64/x86-64.exp: Run mov2a, mov2b, mov2c and mov2d.
2015-12-04Remove useless loop in elf.cTristan Gingold1-0/+4
2015-12-02addr2line vs. inlined C functions called from C++Alan Modra1-0/+8
In this case the inlined function doesn't have DW_AT_linkage_name in .debug_info, but the language is C++ so find_nearest_line goes looking in the symbol table. Since the function is inlined the enclosing non-inline function symbol is returned from _bfd_elf_find_function, which is wrong. This patch only uses a symbol if its address matches. PR binutils/19315 * dwarf2.c (_bfd_elf_find_function): Return symbol matched. (_bfd_dwarf2_find_nearest_line): Check symbol returned above against dwarf range. * elf-bfd.h (_bfd_elf_find_function): Update prototype.
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