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2015-10-02[LD][AARCH64]Add TLSIE relaxation support under large memory model.Renlin Li1-0/+12
2015-10-02[LD][AARCH64]Add TLSDESC support for large memory model.Renlin Li1-0/+15
2015-10-02[GAS][AARCH64]Add TLSDESC large memory model support.Renlin Li1-0/+5
2015-10-02[BFD][AARCH64]Add TLSGD relaxation support under large memory model.Renlin Li1-0/+7
2015-10-02[BFD][AARCH64]Create GOT section for TLSLE_MOVW_TPREL_G(1, 1_NC, 2).Renlin Li1-0/+5
2015-10-02[Binutils][AARCH64]Add TLS IE large memory support.Renlin Li1-0/+17
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li1-0/+11
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G0_NC support.Renlin Li1-0/+8
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li1-0/+11
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_TLSGD_MOVW_G1 support.Renlin Li1-0/+8
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li1-0/+10
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G0_NC Support.Renlin Li1-0/+8
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li1-0/+10
2015-10-02[GAS][AARCH64]Add BFD_RELOC_AARCH64_MOVW_GOTOFF_G1 Support.Renlin Li1-0/+8
2015-10-02[LD][AARCH64]Add BFD_RELOC_AARCH64_LD64_GOTOFF_LO15 Support.Renlin Li1-0/+10
2015-10-02[BFD][AARCH64]Refactor to facilitate further large memory model support patches.Renlin Li1-0/+5
2015-10-01Create a PLT entry for R_X86_64_PC32 in non-code sectionsH.J. Lu1-0/+7
2015-10-01[BFD][AARCH64]Emit single AARCH64_MAP_INSN symbol for the whole plt.Renlin Li1-0/+5
2015-10-01bfd/config.bfd: Drop non-linux non-fdpic stuff from the last change of targ_s...Kaz Kojima1-0/+5
2015-10-01Revert "Also check e_machine when merging sections"Alan Modra1-0/+5
2015-09-30Create a PLT entry for R_386_PC32 in non-code sectionsH.J. Lu1-0/+7
2015-09-30Also check e_machine when merging sectionsH.J. Lu1-0/+6
2015-09-30Consistency check for merge sectionsAlan Modra1-0/+6
2015-09-30Add fdpic and misc targets to config.bfd for sh*-*-linux*Rich Felker1-0/+5
2015-09-29Don't use the output section size to copy input sectionH.J. Lu1-0/+7
2015-09-25Correct the generation of OR1K pc-relative relocations.Peter Zotov1-0/+7
2015-09-23Fix compile time warnings generated when compiling with clang.Nick Clifton1-0/+22
2015-09-23Add support for files that contain multiple symbol index tables. Fixes PR 15835Nick Clifton1-0/+25
2015-09-21Use bfd_get_32 and bfd_put_32 to access ch_typeH.J. Lu1-0/+8
2015-09-20Add --no-dynamic-linker option to ld, for static PIE useRich Felker1-0/+42
2015-09-18default_read_var_value <LOC_UNRESOLVED>: Include minsym kind in error message.Doug Evans1-0/+6
2015-09-18Add PowerPC64 ld --tls-get-addr-optimize.Alan Modra1-0/+8
2015-09-18Remove one unnecessary iteration in insertion sortAlan Modra1-0/+6
2015-09-16Fix slowdown in ld -r for most common case of out-of-order relocsAlan Modra1-0/+7
2015-09-15xtensa: generate PLT entries for call0 ABIMax Filippov1-0/+8
2015-09-15Fix the SH behavior for EF_SH_PIC flag in FDPIC ABIRich Felker1-0/+6
2015-09-12Set .plt entry size to 0 in elf32-hppa.cJohn David Anglin1-0/+6
2015-09-09[AArch64] Sort IS_AARCH64_TLS_RELAX_RELOC in alphabetic orderJiong Wang1-0/+4
2015-09-09[AArch64] Relax TLS local dynamic traditional into local executableJiong Wang1-0/+7
2015-09-03Remove convert_mov_to_leaH.J. Lu1-0/+5
2015-09-02Rename R_386_irelative to R_386_ext2H.J. Lu1-0/+8
2015-09-01Skip PLT for function pointer initializationH.J. Lu1-0/+32
2015-09-01Wrong function reported for linker error messageAlan Modra1-0/+5
2015-09-01ppc64 out-of-line register save/restore functionsAlan Modra1-0/+21
2015-08-31Optimise PowerPC64 r2 adjusting stubsAlan Modra1-0/+8
2015-08-31ppc64 section group handlingAlan Modra1-0/+24
2015-08-31More "Make asection->id and asection->index unsigned"Alan Modra1-0/+8
2015-08-31NDS32 build fixesAlan Modra1-0/+7
2015-08-31Make asection->id and asection->index unsignedAlan Modra1-0/+18
2015-08-27Add missing pr referenceAlan Modra1-0/+1