riscv-gnu-toolchain/gdb.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-12-22	Automatic date update in version.in	GDB Administrator	1	-1/+1
2022-12-22	PR29925, Memory leak in find_abstract_instance	Alan Modra	1	-12/+19
2022-12-21	Fix compiling of top.c	Andrew Pinski	1	-1/+0
2022-12-21	Use toplevel configure for GMP and MPFR for gdb	Andrew Pinski	12	-1094/+142
2022-12-21	gdb/c++: validate 'using' directives based on the current line	Bruno Larsen	6	-9/+95
2022-12-21	Updated Romanian translation for the BFD sub-directory.	Nick Clifton	2	-1970/+2073
2022-12-21	Fix an attempt to allocate an unreasonably large amount of memory when parsin...	Nick Clifton	2	-1/+9
2022-12-21	Keep the .drectve section when performing a relocateable link.	Nick Clifton	3	-2/+9
2022-12-21	x86: rename CheckRegSize to CheckOperandSize	Jan Beulich	4	-513/+513
2022-12-21	gprofng/testsuite: restrict testing to native configurations	Jan Beulich	1	-0/+7
2022-12-21	enable-non-contiguous-regions warnings	Alan Modra	18	-66/+59
2022-12-21	PR29922, SHT_NOBITS section avoids section size sanity check	Alan Modra	1	-3/+9
2022-12-21	sim: fully merge sim_cpu_base into sim_cpu	Mike Frysinger	1	-26/+19
2022-12-21	sim: enable common sim_cpu usage everywhere	Mike Frysinger	29	-66/+1
2022-12-21	sim: or1k: invert sim_cpu storage	Mike Frysinger	5	-30/+43
2022-12-21	sim: m32r: invert sim_cpu storage	Mike Frysinger	5	-14/+10
2022-12-21	sim: lm32: invert sim_cpu storage	Mike Frysinger	3	-12/+7
2022-12-21	sim: iq2000: invert sim_cpu storage	Mike Frysinger	3	-11/+7
2022-12-21	sim: frv: invert sim_cpu storage	Mike Frysinger	3	-23/+18
2022-12-21	sim: cris: invert sim_cpu storage	Mike Frysinger	6	-239/+244
2022-12-21	sim: bpf: invert sim_cpu storage	Mike Frysinger	3	-7/+13
2022-12-21	sim: cgen: prep for inverting sim_cpu storage	Mike Frysinger	2	-0/+15
2022-12-21	sim: riscv: invert sim_cpu storage	Mike Frysinger	3	-191/+258
2022-12-21	sim: pru: invert sim_cpu storage	Mike Frysinger	3	-8/+31
2022-12-21	sim: example-synacor: invert sim_cpu storage	Mike Frysinger	3	-37/+47
2022-12-21	sim: h8300: invert sim_cpu storage	Mike Frysinger	2	-34/+36
2022-12-21	sim: m68hc11: invert sim_cpu storage	Mike Frysinger	10	-354/+446
2022-12-21	sim: mips: invert sim_cpu storage	Mike Frysinger	2	-73/+90
2022-12-21	sim: v850: invert sim_cpu storage	Mike Frysinger	3	-20/+23
2022-12-21	sim: mcore: invert sim_cpu storage	Mike Frysinger	2	-27/+41
2022-12-21	sim: aarch64: invert sim_cpu storage	Mike Frysinger	5	-108/+152
2022-12-21	sim: microblaze: invert sim_cpu storage	Mike Frysinger	3	-8/+8
2022-12-21	sim: avr: invert sim_cpu storage	Mike Frysinger	2	-99/+108
2022-12-21	sim: moxie: invert sim_cpu storage	Mike Frysinger	2	-14/+13
2022-12-21	sim: msp430: invert sim_cpu storage	Mike Frysinger	3	-120/+106
2022-12-21	sim: ft32: invert sim_cpu storage	Mike Frysinger	3	-95/+99
2022-12-21	sim: bfin: invert sim_cpu storage	Mike Frysinger	2	-10/+5
2022-12-20	sim: sim_cpu: invert sim_cpu storage	Mike Frysinger	7	-39/+45
2022-12-20	sim: move register headers into sim/ namespace [PR sim/29869]	Mike Frysinger	39	-24/+24
2022-12-20	sim: ppc: drop old dgen.c generator	Mike Frysinger	3	-363/+6
2022-12-20	sim: ppc: move spreg.[ch] files to the source tree	Mike Frysinger	5	-0/+1608
2022-12-21	Automatic date update in version.in	GDB Administrator	1	-1/+1
2022-12-20	Fix install-strip target	Hannes Domani	1	-2/+2
2022-12-20	bfd: Discard symbol regardless of warning flag	Torbjörn SVENSSON	5	-5/+58
2022-12-20	PR29915, bfdio.c does not compile with mingw.org's MinGW	Alan Modra	4	-6/+22
2022-12-20	Re: x86: remove i386-opc.c	Alan Modra	1	-1/+0
2022-12-19	sim: ppc: change spreg switch table generation to compile-time	Mike Frysinger	4	-15/+16
2022-12-19	sim: dv-core: add hw_detach_address method [PR sim/25211]	Mike Frysinger	2	-13/+18
2022-12-19	gprofng: PR29646 Various warnings	Vladimir Mezentsev	10	-13/+22
2022-12-20	Automatic date update in version.in	GDB Administrator	1	-1/+1