aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2016-08-08Automatic date update in version.inGDB Administrator1-1/+1
2016-08-07Automatic date update in version.inGDB Administrator1-1/+1
2016-08-06Automatic date update in version.inGDB Administrator1-1/+1
2016-08-05Remove unused cli_command_loop declarationSimon Marchi2-2/+4
This declaration is not used anymore. gdb/ChangeLog: * event-top.h (cli_command_loop): Remove.
2016-08-05Add missing ChangLog enrtryH.J. Lu1-0/+7
2016-08-05Fix PR remote/20398: File-IO write always outputs "Quit"Pedro Alves2-1/+8
Commit bb7c96deb1a1 ("gdb/remote-fileio.c: Eliminate custom SIGINT signal handler") regressed the File-IO support. Failed output: (gdb) target remote :8888 Remote debugging using :8888 0x00008098 in _start () (gdb) c Continuing. Quit Quit Quit Quit Quit Quit Quit Quit Quit Quit Quit [Inferior 1 (Remote target) exited normally] Expected output: (gdb) target remote :8888 Remote debugging using :8888 0x00008098 in _start () (gdb) c Continuing. i: 0 i: 1 i: 2 i: 3 i: 4 i: 5 i: 6 i: 7 i: 8 i: 9 [Inferior 1 (Remote target) exited normally] The problem that the new File-IO quit handler forgets to check the quit flag before calling throwing a quit. gdb/ChangeLog: 2016-08-05 Pedro Alves <palves@redhat.com> PR remote/20398 * remote-fileio.c (remote_fileio_quit_handler): Check the quit flag before calling quit.
2016-08-05gdb/NEWS: Mention that C++ is now the defaultPedro Alves2-0/+12
gdb/ChangeLog: 2016-08-05 Pedro Alves <palves@redhat.com> * NEWS: Mention that GDB and GDBserver build with a C++ compiler by default.
2016-08-05gdb/configure --help: suggest --disable-build-with-cxx instead of --enable...Pedro Alves5-3/+15
We build by default with a C++ compiler, but "configure --help" still says "--enable-build-with-cxx", which hints that it is by default disabled. Update the --help text. gdb/ChangeLog: 2016-08-05 Pedro Alves <palves@redhat.com> * build-with-cxx.m4: Change help string to be in terms of --disable-build-with-cxx. * configure: Regenerate. gdb/gdbserver/ChangeLog: 2016-08-05 Pedro Alves <palves@redhat.com> * configure: Regenerate.
2016-08-05Ensure ARM VPUSH and VPOP instructions do not affect more than 16 registers.Nick Clifton6-37/+89
PR gas/20429 * config/tc-arm.c (do_vfp_nsyn_push): Check that no more than 16 registers are pushed. (do_vfp_nsyn_pop): Check that no more than 16 registers are popped. * testsuite/gas/arm/pr20429.s: New test. * testsuite/gas/arm/pr20429.d: New test driver. * testsuite/gas/arm/pr20429.1: Expected error output.
2016-08-05Fix the generation of alignment frags in code sections for AArch64.Nick Clifton4-3/+58
PR gas/20364 * config/tc-aarch64.c (s_ltorg): Change the mapping state after aligning the frag. (aarch64_init): Treat rs_align frags in code sections as containing code, not data. * testsuite/gas/aarch64/pr20364.s: New test. * testsuite/gas/aarch64/pr20364.d: New test driver.
2016-08-05Automatic date update in version.inGDB Administrator1-1/+1
2016-08-042016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme11-4/+236
bfd/ * bfd-in.h (bfd_elf32_arm_set_target_relocs): Add one parameter. * bfd-in2.h: Regenerate. * elf32-arm.c (struct elf32_arm_link_hash_table): Declare new cmse_implib field. (bfd_elf32_arm_set_target_relocs): Add new parameter to initialize cmse_implib field in struct elf32_arm_link_hash_table. (elf32_arm_filter_cmse_symbols): New function. (elf32_arm_filter_implib_symbols): Likewise. (elf_backend_filter_implib_symbols): Define to elf32_arm_filter_implib_symbols. ld/ * emultempl/armelf.em (cmse_implib): Declare and define this new static variable. (arm_elf_create_output_section_statements): Add new cmse_implib parameter. (OPTION_CMSE_IMPLIB): Define macro. (PARSE_AND_LIST_LONGOPTS): Add entry for new --cmse-implib switch. (PARSE_AND_LIST_OPTIONS): Likewise. (PARSE_AND_LIST_ARGS_CASES): Handle OPTION_CMSE_IMPLIB case. * ld.texinfo (--cmse-implib): Document new option. * testsuite/ld-arm/arm-elf.exp (Secure gateway import library generation): New test. (Secure gateway import library generation: errors): Likewise. * testsuite/ld-arm/cmse-implib.s: New file. * testsuite/ld-arm/cmse-implib-errors.out: Likewise. * testsuite/ld-arm/cmse-implib.rd: Likewise.
2016-08-042016-08-04 Thomas Preud'homme <thomas.preudhomme@arm.com>Thomas Preud'homme13-20/+608
bfd/ * elf32-arm.c (CMSE_PREFIX): Define macro. (elf32_arm_stub_cmse_branch_thumb_only): Define stub sequence. (cmse_branch_thumb_only): Declare stub. (struct elf32_arm_link_hash_table): Define cmse_stub_sec field. (elf32_arm_get_plt_info): Add globals parameter. Use it to return FALSE if there is no PLT. (arm_type_of_stub): Adapt to new elf32_arm_get_plt_info signature. (elf32_arm_final_link_relocate): Likewise. (elf32_arm_gc_sweep_hook): Likewise. (elf32_arm_gc_mark_extra_sections): Mark sections holding ARMv8-M secure entry functions. (arm_stub_is_thumb): Add case for arm_stub_cmse_branch_thumb_only. (arm_dedicated_stub_output_section_required): Change to a switch case and add a case for arm_stub_cmse_branch_thumb_only. (arm_dedicated_stub_output_section_required_alignment): Likewise. (arm_stub_dedicated_output_section_name): Likewise. (arm_stub_dedicated_input_section_ptr): Likewise and remove ATTRIBUTE_UNUSED for htab parameter. (arm_stub_required_alignment): Likewise. (arm_stub_sym_claimed): Likewise. (arm_dedicated_stub_section_padding): Likewise. (cmse_scan): New function. (elf32_arm_size_stubs): Call cmse_scan for ARM M profile targets. Set stub_changed to TRUE if such veneers were created. (elf32_arm_swap_symbol_in): Add detection code for CMSE special symbols. include/ * arm.h (ARM_GET_SYM_CMSE_SPCL): Define macro. (ARM_SET_SYM_CMSE_SPCL): Likewise. ld/ * ld.texinfo (Placement of SG veneers): New concept entry. * testsuite/ld-arm/arm-elf.exp (Secure gateway veneers: no .gnu.sgstubs section): New test. (Secure gateway veneers: wrong entry functions): Likewise. (Secure gateway veneers (ARMv8-M Baseline)): Likewise. (Secure gateway veneers (ARMv8-M Mainline)): Likewise. * testsuite/ld-arm/cmse-veneers.s: New file. * testsuite/ld-arm/cmse-veneers.d: Likewise. * testsuite/ld-arm/cmse-veneers.rd: Likewise. * testsuite/ld-arm/cmse-veneers.sd: Likewise. * testsuite/ld-arm/cmse-veneers-no-gnu_sgstubs.out: Likewise. * testsuite/ld-arm/cmse-veneers-wrong-entryfct.out: Likewise.
2016-08-04Fix generation of relocs for 32-bit Sparc Solaris targets.Stefan Trleman2-0/+23
PR gas/20427 * config/tc-sparc.c (cons_fix_new_sparc): Prevent the generation of 64-bit relocation types when assembling for a 32-bit Solaris target.
2016-08-04Determine target description for native aarch64Yao Qi2-39/+19
I find the following test fail when I test native aarch64 gdb with arm program, (gdb) PASS: gdb.base/attach-pie-noexec.exp: attach set architecture arm^M warning: Selected architecture arm is not compatible with reported target architecture aarch64^M Architecture `arm' not recognized.^M The target architecture is set automatically (currently aarch64)^M (gdb) FAIL: gdb.base/attach-pie-noexec.exp: set architecture arm GDB thinks the target is aarch64, but it isn't. Nowadays, we are using some entries AT_PHENT and AT_HWCAP in auxv to determine whether the process is a 32-bit arm one or 64-bit aarch64 one, and get the right gdbarch. However, in the process of parsing auxv (in inf_ptrace_auxv_parse), the size of int and data pointer of target_gdbarch is used. If debug program exists (in most of cases), target_gdbarch is already set according to the debug program, which is arm in my case. Then, GDB can parse auxv successfully. However, in gdb.base/attach-pie-noexec.exp, the debug program is removed, target_gdbarch is aarch64 when GDB parse auxv, so GDB can't parse it successfully. Instead of using auxv, we check the return value of ptrace NT_ARM_VFP. If the program is an arm process, NT_ARM_VFP is OK, otherwise, error is returned. Additionally, we only return tdesc_arm_with_neon for arm process, because neon is mandatory on ARMv8. gdb: 2016-08-04 Yao Qi <yao.qi@linaro.org> * aarch64-linux-nat.c (tdesc_arm_with_vfpv3): Remove the declaration. (aarch64_linux_read_description): Remove code on getting auxv and select target description on it. Select target description by the result of NT_ARM_VFP ptrace request.
2016-08-04Quiet ptrace error ESRCH in regsets_fetch_inferior_registersYao Qi2-0/+11
When I run process-dies-while-detaching.exp with GDBserver, I see many warnings printed by GDBserver, ptrace(regsets_fetch_inferior_registers) PID=26183: No such process ptrace(regsets_fetch_inferior_registers) PID=26183: No such process ptrace(regsets_fetch_inferior_registers) PID=26184: No such process ptrace(regsets_fetch_inferior_registers) PID=26184: No such process regsets_fetch_inferior_registers is called when GDBserver resumes each lwp. #2 0x0000000000428260 in regsets_fetch_inferior_registers (regsets_info=0x4690d0 <aarch64_regsets_info>, regcache=0x31832020) at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/linux-low.c:5412 #3 0x00000000004070e8 in get_thread_regcache (thread=0x31832940, fetch=fetch@entry=1) at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/regcache.c:58 #4 0x0000000000429c40 in linux_resume_one_lwp_throw (info=<optimized out>, signal=0, step=0, lwp=0x31832830) at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/linux-low.c:4463 #5 linux_resume_one_lwp (lwp=0x31832830, step=<optimized out>, signal=<optimized out>, info=<optimized out>) at /home/yao/SourceCode/gnu/gdb/git/gdb/gdbserver/linux-low.c:4573 The is the case that threads are disappeared when GDB/GDBserver resumes them. We check errno for ESRCH, and don't print error messages, like what we are doing in regsets_store_inferior_registers. gdb/gdbserver: 2016-08-04 Yao Qi <yao.qi@linaro.org> * linux-low.c (regsets_fetch_inferior_registers): Check errno is ESRCH or not.
2016-08-04Automatic date update in version.inGDB Administrator1-1/+1
2016-08-03PR python/18565 - make Frame.function work for inline framesTom Tromey4-1/+19
PR python/18565 notes that calling frame filters don't work properly for inlined functions. This happens because Frame.function on an inline frame will yield the wrong result. This patch changes this code to use find_frame_funname instead, which handles inline frames properly. Built and regtested on x86-64 Fedora 24. 2016-08-03 Tom Tromey <tom@tromey.com> PR python/18565: * python/py-frame.c (frapy_function): Use find_frame_funname. 2016-08-03 Tom Tromey <tom@tromey.com> PR python/18565: * gdb.python/py-frame-inline.exp: Add Frame.function test.
2016-08-03Avoid potential memory leak in find_frame_funnameTom Tromey2-6/+15
The PR 18565 thread pointed out that, if cp_remove_params can throw (we aren't quite sure), then find_frame_funname could leak some memory. This patch avoids any potential issue by rearranging some code in find_frame_funname. Built and regtested on x86-64 Fedora 24. 2016-08-03 Tom Tromey <tom@tromey.com> * stack.c (find_frame_funname): Avoid any possible leak in case cp_remove_params can throw.
2016-08-03Update NEWS to mention Python breakpoint eventsTom Tromey2-0/+7
An earlier patch added three new breakpoint-related events to the Python API. However, at that time, I forgot to update NEWS. This patch supplies the missing entry. 2016-08-03 Tom Tromey <tom@tromey.com> * NEWS: Mention new Python breakpoint events.
2016-08-03Automatic date update in version.inGDB Administrator1-1/+1
2016-08-02Add myself as Rust maintainerTom Tromey2-0/+5
A while ago, Pedro announced that I would be the Rust maintainer for gdb. However, I neglected to update the MAINTAINERS file until now. 2016-08-02 Tom Tromey <tom@tromey.com> * MAINTAINERS (Core): Add self as Rust maintainer.
2016-08-02[GDBserver] Remove td_ta_event_addr td_ta_set_event and td_ta_event_getmsgYao Qi2-9/+8
As a result of this commit, 9b4c5f878ff39e04127a1ad95f6b3832afe6d278 (Remove support for thread events without PTRACE_EVENT_CLONE in GDBServer.) the last usage of td_ta_event_addr td_ta_set_event and td_ta_event_getmsg were removed. They are no longer used. This patch is to remove them. gdb/gdbserver: 2016-08-02 Yao Qi <yao.qi@linaro.org> * thread-db.c (struct thread_db) <td_ta_event_getmsg_p>: Remove. <td_ta_set_event_p, td_ta_event_addr_p>: Remove. (thread_db_load_search): Update. (try_thread_db_load_1): Don't look for td_ta_event_addr, td_ta_set_event and td_ta_event_getmsg.
2016-08-02PowerPC64 ld segfault with code in non-executable sectionsAlan Modra2-0/+7
PR ld/20428 * elf64-ppc.c (ppc_get_stub_entry): Don't segfault on NULL group.
2016-08-02Synchronize libiberty sources with FSF GCC mainline version.Nick Clifton8-42/+503
include * libiberty.h (MAX_ALLOCA_SIZE): New macro. libiberty * make-relative-prefix.c (make_relative_prefix_1): Fall back to malloc if alloca argument is greater than MAX_ALLOCA_SIZE. * cp-demangle.c (cplus_demangle_operators): Add f[lrLR]. (d_expression_1): Handle them. (d_maybe_print_fold_expression): New. (d_print_comp_inner): Use it. (d_index_template_argument): Handle negative index. * cp-demangle.c (cplus_demangle_operators): Add sP and sZ. (d_print_comp_inner): Handle them. (d_template_args_1): Split out from d_template_args. (d_args_length): New. PR c++/70926 * cplus-dem.c: Handle large values and overflow when demangling length variables. (demangle_template_value_parm): Read only until end of mangled string. (do_hpacc_template_literal): Likewise. (do_type): Handle overflow when demangling array indices. * cp-demangle.c (cplus_demangle_print_callback): Avoid zero-length VLAs. PR c++/70498 * cp-demangle.c (d_expression_1): Formatting fix. * cplus-dem.c (enum type_kind_t): Add tk_rvalue_reference constant. (demangle_template_value_parm): Handle tk_rvalue_reference type kind. (do_type): Support 'O' type id (rvalue references). * testsuite/demangle-expected: Add tests. PR c++/70498 * cp-demangle.c: Parse numbers as integer instead of long to avoid overflow after sanity checks. Include <limits.h> if available. (INT_MAX): Define if necessary. (d_make_template_param): Takes integer argument instead of long. (d_make_function_param): Likewise. (d_append_num): Likewise. (d_identifier): Likewise. (d_number): Parse as and return integer. (d_compact_number): Handle overflow. (d_source_name): Change variable type to integer for parsed number. (d_java_resource): Likewise. (d_special_name): Likewise. (d_discriminator): Likewise. (d_unnamed_type): Likewise. * testsuite/demangle-expected: Add regression test cases. * configure: Remove SH5 support. PR c++/69687 * cplus-dem.c: Include <limits.h> if available. (INT_MAX): Define if necessary. (remember_type, remember_Ktype, register_Btype, string_need): Abort if we detect cases where we the size of the allocation would overflow. PR c++/70492 * cplus-dem.c (gnu_special): Handle case where consume_count returns -1. PR c++/67394 PR c++/70481 * cplus-dem.c (squangle_mop_up): Zero bsize/ksize after freeing btypevec/ktypevec. * testsuite/demangle-expected: Add coverage tests.
2016-08-02Fix SH GOT allocation in the presence of linker garbage collection.Nick Clifton10-216/+46
PR ld/17739 ld * emulparams/shelf.sh (CHECK_RELOCS_AFTER_OPEN_INPUT): Define with valye 'yes'. * emulparams/shelf32.sh: Likewise. * emulparams/shelf32.sh: Likewise. * emulparams/shelf_nto.sh: Likewise. * emulparams/shelf_nto.sh: Likewise. * emulparams/shelf_vxworks.sh: Likewise. * emulparams/shelf_vxworks.sh: Likewise. * emulparams/shlelf32_linux.sh: Likewise. * emulparams/shlelf32_linux.sh: Likewise. * emulparams/shlelf_linux.sh: Likewise. * emulparams/shlelf_linux.sh: Likewise. * emulparams/shlelf_nto.sh: Likewise. * emulparams/shlelf_nto.sh: Likewise. bfd * elf32-sh.c (sh_elf_gc_sweep_hook): Delete. (elf_backend_sweep_hook): Delete.
2016-08-02Avoid compile time warning when building on 32-bit host.Nick Clifton2-1/+7
PR binutils/17512 * resbin.c (bin_to_res_version): Cast variables to correct type for printing in error message.
2016-08-02Automatic date update in version.inGDB Administrator1-1/+1
2016-08-01 Fix some PowerPC VLE BFD issues and add some PowerPC VLE instructions.Andrew Jenner7-4/+58
bfd/ * elf32-ppc.c (is_branch_reloc): Recognise VLE branch relocations. (ppc_elf_howto_raw): Fix dst_mask of R_PPC_VLE_REL15. (ppc_elf_vle_split16): Clear field before inserting. opcodes/ * ppc-opc.c (vle_opcodes): Alias 'e_cmpwi' to 'e_cmpi' and 'e_cmplwi' to 'e_cmpli' instead. (OPVUPRT, OPVUPRT_MASK): Define. (powerpc_opcodes): Add E200Z4 insns. (vle_opcodes): Add context save/restore insns. include/ * opcode/ppc.h (PPC_OPCODE_E200Z4): New define.
2016-08-01Update NEWS post GDB 7.12 branch creation.Joel Brobecker2-1/+9
gdb/ChangeLog: * NEWS: Create a new section for the next release branch. Rename the section of the current branch, now that it has been cut.
2016-08-01Bump version to 7.12.50.DATE-git.Joel Brobecker2-1/+6
Now that the GDB 7.12 branch has been created, we can bump the version number. gdb/ChangeLog: GDB 7.12 branch created (41bfcd638a4e0e48b96ce4de2845372dea481322): * version.in: Bump version to 7.12.50.DATE-git.
2016-08-01Swap "single-process" and "multi-process" in process-dies-while-detaching.expgdb-7.12-branchpointYao Qi2-1/+7
"single-process" and "multi-process" are used in the test message of process-dies-while-detaching.exp, but they are misplaced due to set mode [expr {$multi_process ? "single-process" : "multi-process"}] This patch is to swap them. gdb/testsuite: 2016-08-01 Yao Qi <yao.qi@linaro.org> * gdb.threads/process-dies-while-detaching.exp (do_test): Set variable mode to "multi-process" if $multi_process is 1, otherwise set it to "single-process".
2016-08-01Update Swedish translation in bfd directory.Nick Clifton2-66/+70
2016-08-01Tweak gdb.cp tests for aarch32Yao Qi4-5/+11
There are some gdb.cp/ tests fails if the program is compiled for arm 32-bit but GDB/GDBserver is aarch64 64-bit program, because target triplet doesn't match "arm*-*-*". Instead, we can use is_aarch32_target. gdb/testsuite: 2016-08-01 Yao Qi <yao.qi@linaro.org> * gdb.cp/anon-struct.exp: Check is_aarch32_target. * gdb.cp/cpexprs.exp: Likewise. * gdb.cp/m-static.exp: Likewise.
2016-08-01Automatic date update in version.inGDB Administrator1-1/+1
2016-07-31Automatic date update in version.inGDB Administrator1-1/+1
2016-07-30Automatic date update in version.inGDB Administrator1-1/+1
2016-07-29gas: avoid spurious failures in non-ELF targets in the SPARC testsuite.Jose E. Marchesi3-48/+56
Many of the existing sparc tests fail in non-ELF targets (coff and a.out) due to spurious differences in the expected results: - Unlike ELF, a.out text sections are aligned to 2**3 and padded accordingly. The padding instruction is a `nop' (01 00 00 00). - Likewise, coff text sections are also aligned to 2**3 and padded accordingly. However, the padding instruction in these targets is an `illtrap 0' (00 00 00 00). - Unlike ELF, a.out and coff binaries don't contain hardware capabilities bits that could be used by BFD to determine the opcodes architecture corresponding to the instructions encoded in the objects (v9, v9a, v9b, v9c, etc). Consequently, in both a.out and coff tests we would need to pass proper `-m sparc:vXXX' options when invoking objdump before comparing results. In order to fix these issues, the most obvious solution would be to have three variants of .d files per impacted test. For example, for save.d we would have: save-elf.d, save-aout.d and save-coff.d. Using the `#source' directive, a single save.s file would provide the input for all of them. However, this approach has the following problems: - The #target and #notarget .d directives are very limited: they use globs instead of regular expressions, and thus it is not possible (or too messy) to use them to discriminate between elf, coff and a.out sparc targets. - It adds little or no value to have variants of all these tests for all the target types, and it would be a burden to maintain them. Actually the features tested in the spuriously failing tests (relatively modern sparc instructions, registers and asis) are not really found in running coff or a.out sparc systems. This patch changes sparc.exp so it will run these tests only in ELF-targets, using the more standard `is_elf_format' from binutils-common.exp instead of the ad-hoc (and less convenient, as it must be called before _every_ single elf-only test) sparc_elf_setup. Incidentally, the patch also fixes the #name entry for save-args.d. Tested in sparc*-*-linux-gnu, sparc-aout and sparc-coff targets. gas/ChangeLog: 2016-07-27 Jose E. Marchesi <jose.marchesi@oracle.com> * testsuite/gas/sparc/sparc.exp: Use is_elf_format to discriminate ELF targets. Run natural, natural-32, pr4587, ticc-imm-reg, v8-movwr-imm, pause, save-args, cbcond, cfr, crypto edge, flush, hpcvis3, ima, ld_st_fsr, ldtw_sttw, ldd_std, ldx_stx, ldx_efsr, mwait, mcdper, sparc5vis4, xcrypto, v9branch1 and imm-plus-rreg only in ELF targets. (sparc_elf_setup): Delete. * testsuite/gas/sparc/save-args.d: Fix a copy-paste typo in the test's #name entry.
2016-07-29Automatic date update in version.inGDB Administrator1-1/+1
2016-07-28Fix decoding of Windows resources.Nick Clifton3-5/+21
PR binutils/17512 * rescoff.c (read_coff_res_dir): Fix detection of buffer overrun. * resbin.c (bin_to_res_version): Allow for the padded length of a version block to be longer than the recorded length. Skip padding bytes.
2016-07-28Automatic date update in version.inGDB Administrator1-1/+1
2016-07-27MIPS/GAS: Implement microMIPS branch/jump compactionMaciej W. Rozycki50-663/+8579
Convert microMIPS branches and jumps whose delay slot would be filled by a generated NOP instruction to the corresponding compact form where one exists, in a manner similar to MIPS16 JR->JRC and JALR->JALRC swap. Do so even where the transformation switches from a 16-bit to a 32-bit branch encoding for no benefit in code size reduction, as this is still advantageous. This is because a branch/NOP pair takes 2 pipeline slots or a 2-cycle completion latency except in superscalar implementations. Whereas a compact branch may or may not stall on its target fetch, so it will at most have a 2-cycle completion latency and may have only 1 even in scalar implementations, and in superscalar implementations it is expected to have no worse latency as a branch/NOP pair has. Also it won't stall and therefore take the extra latency cycle in the not-taken case. Technically this is the same as MIPS16 compaction: for the qualifying instruction encodings the APPEND_ADD_COMPACT machine code generation method is selected where APPEND_ADD_WITH_NOP otherwise would and tells the code generator in `append_insn' to convert the regular form of an instruction to its corresponding compact form. For this the opcode is tweaked as necessary and the microMIPS opcode table is scanned for the matching updated instruction. A non-$0 `rt' operand to BEQ and BNE instructions is moved to the `rs' operand field of BEQZC and BNEZC encodings as required. Unlike with MIPS16 compaction however we need to handle out-of-distance branch relaxation as well. We do this by deferring the generation of any delay-slot NOP required to relaxation made in `md_convert_frag', by converting the APPEND_ADD_WITH_NOP machine code generation to APPEND_ADD where a relaxed instruction is recorded. Relaxation then, depending on actual code produced, chooses between either using a compact branch or jump encoding and emitting the NOP outstanding if no compact encoding is possible. For code simplicity's sake the relaxation pass is retained even if the principle of preferring a compact encoding to a 16-bit branch/NOP pair means, in the absence of out-of-range branch relaxation, that a single compact branch machine code instruction will eventually be produced from a given assembly source instruction. gas/ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag. (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16) (RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16) (RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32) (RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits. (get_append_method): Also return APPEND_ADD_COMPACT for microMIPS instructions. (find_altered_mips16_opcode): Exclude macros from matching. Factor code out... (find_altered_opcode): ... to this new function. (find_altered_micromips_opcode): New function. (frag_branch_delay_slot_size): Likewise. (append_insn): Handle microMIPS branch/jump compaction. (macro_start): Likewise. (relaxed_micromips_32bit_branch_length): Likewise. (md_convert_frag): Likewise. * testsuite/gas/mips/micromips.s: Add conditional explicit NOPs for delay slot filling. * testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for delay slot filling. * testsuite/gas/mips/micromips-size-1.s: Likewise. * testsuite/gas/mips/micromips.l: Adjust line numbers. * testsuite/gas/mips/micromips-warn.l: Likewise. * testsuite/gas/mips/micromips-size-1.l: Likewise. * testsuite/gas/mips/micromips.d: Adjust padding. * testsuite/gas/mips/micromips-trap.d: Likewise. * testsuite/gas/mips/micromips-insn32.d: Likewise. * testsuite/gas/mips/micromips-noinsn32.d: Likewise. * testsuite/gas/mips/micromips@beq.d: Update patterns for branch/jump compaction. * testsuite/gas/mips/micromips@bge.d: Likewise. * testsuite/gas/mips/micromips@bgeu.d: Likewise. * testsuite/gas/mips/micromips@blt.d: Likewise. * testsuite/gas/mips/micromips@bltu.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-4.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise. * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d: Likewise. * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d: Likewise. * testsuite/gas/mips/micromips@loc-swap.d: Likewise. * testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise. * testsuite/gas/mips/micromips@relax.d: Likewise. * testsuite/gas/mips/micromips@relax-at.d: Likewise. * testsuite/gas/mips/micromips@relax-swap3.d: Likewise. * testsuite/gas/mips/branch-extern-2.d: Likewise. * testsuite/gas/mips/branch-extern-4.d: Likewise. * testsuite/gas/mips/branch-section-2.d: Likewise. * testsuite/gas/mips/branch-section-4.d: Likewise. * testsuite/gas/mips/branch-weak-2.d: Likewise. * testsuite/gas/mips/branch-weak-5.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d: Likewise. * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d: Likewise. * testsuite/gas/mips/micromips-compact.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. ld/ * testsuite/ld-mips-elf/micromips-branch-absolute.d: Update patterns for branch compaction. * testsuite/ld-mips-elf/micromips-branch-absolute-addend.d: Likewise. opcodes/ * micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b", "beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to "j".
2016-07-27Begin implementing ARC NPS-400 Accelerator instructionsGraham Markall11-126/+724
opcodes * arc-nps400-tbl.h: Change block comments to GNU format. * arc-dis.c: Add new globals addrtypenames, addrtypenames_max, and addtypeunknown. (get_addrtype): New function. (print_insn_arc): Print colons and address types when required. * arc-opc.c: Add MAKE_INSERT_NPS_ADDRTYPE macro and use to define insert and extract functions for all address types. (arc_operands): Add operands for colon and all address types. * arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table. * arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands, insert_nps_bd_num_buff and extract_nps_bd_num_buff functions. * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table. * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands, insert_nps_pmu_num_job and extract_nps_pmu_num_job functions. include * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE, ARC_OPERAND_COLON. Add the arc_nps_address_type enum and ARC_NUM_ADDRTYPES. * opcode/arc.h: Add BMU to insn_class_t enum. * opcode/arc.h: Add PMU to insn_class_t enum. gas * config/tc-arc.c: Add new global arc_addrtype_hash. Define O_colon and O_addrtype. (debug_exp): Add O_colon and O_addrtype. (tokenize_arguments): Handle colon and address type tokens. (declare_addrtype): New function. (md_begin): Initialise arc_addrtype_hash. (arc_parse_name): Add lookup of address types. (assemble_insn): Handle colons and address types by ignoring them. * testsuite/gas/arc/nps400-8.s: New file. * testsuite/gas/arc/nps400-8.d: New file. * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests. * testsuite/gas/arc/nps400-8.d: Add expected PMU instruction output.
2016-07-27Restrict linker garbage collection personality test to cfi enabled targets.Nick Clifton2-2/+6
* testsuite/ld-gc/personality.d: Use "target cfi" to restrict the test to targets which support cfi.
2016-07-27Fix seg-fault when running garbage collection on coff binaries.Nick Clifton2-1/+14
PR ld/20401 * coffgen.c (fini_reloc_cookie_rels): Check for the extistence of the coff_section_data before using it.
2016-07-27Fix warning in ldbuildid.c mingw32 codeIgor Kudrin2-1/+6
* ldbuildid.c (generate_build_id): Warning fix.
2016-07-27Fix aarch64_relocs.sh file modeAlan Modra1-0/+0
2016-07-27Automatic date update in version.inGDB Administrator1-1/+1
2016-07-27Wean gdb and sim off private libbfd.h headerAlan Modra11-11/+25
The major reason this header was needed, bfd_default_set_arch_mach, has now moved to bfd.h. gdb/ * amd64-darwin-tdep.c: Don't include libbfd.h. * i386-darwin-tdep.c: Likewise. * rs6000-nat.c: Likewise. * rs6000-tdep.c: Likewise. sim/aarch64/ * memory.c: Don't include libbfd.h. sim/rl78/ * load.c: Don't include libbfd.h. (rl78_load): Don't use private iovec seek or read. sim/rx/ * load.c: Don't include libbfd.h. (rx_load): Don't use private iovec seek or read.
2016-07-26Fix PR server/20414 - x32 gdbserver always crashes inferiorPedro Alves2-4/+15
Debugging an x32 process with an x32 gdbserver always results in: (gdb) c Continuing. Program received signal SIGSEGV, Segmentation fault. 0xf7de9600 in _dl_debug_state () from target:/libx32/ld-linux-x32.so.2 (gdb) Looking at the remote debug logs reveals the problem, here: Packet received: T05swbreak:;06:a0d4ffff00000000;07:b8d3ffff00000000;10:0096def701000000;thread:p7d7a.7d7a;core:1; ^^^^^^^^^^^^^^^^ The underlined value is the expedited value of RIP (in little endian). But notice that 01 in 0x01f7de9600, while gdb says the program stopped at 0xf7de9600. 0x01ffffffff is over 32 bits, which indicates that something wen't wrong somewhere in gdbserver. The problem turns out to be in gdbserver's x86_get_pc / x86_set_pc routines, where "unsigned long" is used assuming that it can fit a 64-bit value, while unsigned long is actually 32-bit on x32. The result is that collect_register_by_name / supply_register_by_name end up reading/writing random bytes off the stack. Fix this by using explicit uint64_t instead of unsigned long. For consistency, use uint32_t instead of unsigned int in the 32-bit paths. gdb/gdbserver/ChangeLog: 2016-07-26 Pedro Alves <palves@redhat.com> PR server/20414 * linux-x86-low.c (x86_get_pc, x86_set_pc): Use uint64_t instead of unsigned long for 64-bit registers and use uint32_t instead of unsigned int for 32-bit registers.
generated by cgit v1.1 at 2024-11-19 22:26:55 +0000