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2017-07-05X86: Disassemble primary opcode map's group 2 ModRM.reg == 6 aliases correctlyBorislav Petkov7-6/+47
The instructions are not documented in the Intel SDM but are documented in the AMD APM as an alias to the group 2, ModRM.reg == 4 variant. Both AMD and Intel CPUs execute the C[0-1] and D[0-3] instructions as expected, i.e., like the /4 aliases: #include <stdio.h> int main(void) { int a = 2; printf ("a before: %d\n", a); asm volatile(".byte 0xd0,0xf0" /* SHL %al */ : "+a" (a)); printf("a after : %d\n", a); return 0; } $ ./a.out a before: 2 a after : 4
2017-07-05Fixup changelog entries for previous commitRamana Radhakrishnan2-0/+16
40c7d50720e04c3d1ef1695a8097f735bafbe54f
2017-07-05Automatic date update in version.inGDB Administrator1-1/+1
2017-07-04Garbage collect TYPE_STATIC and several TYPE_FN_FIELD_xPedro Alves3-24/+12
Nothing uses these. Most of the TYPE_FN_FIELD_ ones were probably used by the gcj support. gdb/ChangeLog: 2017-07-04 Pedro Alves <palves@redhat.com> * gdbtypes.c (recursive_dump_type): Don't reference TYPE_STATIC. * gdbtypes.h (TYPE_STATIC): Delete. (struct fn_field) <is_public, is_abstract, is_static, is_final, is_synchronized, is_native>: Delete. <dummy>: Bump. (TYPE_FN_FIELD_PUBLIC, TYPE_FN_FIELD_STATIC, TYPE_FN_FIELD_FINAL) (TYPE_FN_FIELD_SYNCHRONIZED, TYPE_FN_FIELD_NATIVE) (TYPE_FN_FIELD_ABSTRACT): Delete.
2017-07-04[Patch ARM] Support MVFR2 VFP Coprocessor register for ARMv8-ARamana Radhakrishnan7-0/+32
This patch adds support mvfr2 control registers for armv8-a as this was missed from the original port to armv8-a (documented at G6.2.109 in (Issue B.a) of the ARM-ARM. This was discovered by an internal user of the GNU toolchain. I'd like to backport this to the binutils 2.28 and binutils 2.29 release branch if possible (with suitable testing and basically checking removing the armv8-r parts). Tristan - are you ok with the backports ? Applied to trunk. regards Ramana 2017-07-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> * gas/config/tc-arm.c (arm_regs): Add MVFR2. (do_vmrs): Constraint for MVFR2 and armv8. (do_vmsr): Likewise. * gas/testsuite/gas/arm/armv8-a+fp.d: Update. * gas/testsuite/gas/arm/armv8-ar+fp.s: Likewise. * gas/testsuite/gas/arm/armv8-r+fp.d: Likewise. * gas/testsuite/gas/arm/vfp-bad.s: Likewise. * gas/testsuite/gas/arm/vfp-bad.l: Likewise. * opcodes/arm-dis.c: Support MVFR2 in disassembly with vmrs and vmsr.
2017-07-04Regenerate configure.Tristan Gingold13-61/+86
bfd/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * version.m4: Bump version to 2.29.51 * configure: Regenerate. binutils/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gas/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. gprof/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. ld/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * configure: Regenerate. opcodes/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * configure: Regenerate.
2017-07-04Add markers.Tristan Gingold7-0/+19
binutils/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.29. gas/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.29. ld/ 2017-07-04 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.29.
2017-07-04[AArch64] Remove useless and incorrect assertionJiong Wang2-7/+5
The outer caller elf_link_output_extsym in elflink.c is a traverse function on all external symbol, and it will only call *finish_dynamic_symbol if some conditions is meet. It is executed conditionally. If the condition to trigger that assertion is satisified, it then won't satify the outer check in finish_dynamic_symbol, so *finish_dynamic_symbol won't be called that the assertion is expected to be dead code. If elf_link_output_extsym is a traverse function that unconditionally called on external symbols decided to be exported, then an assertion to make sure these symbols are in sane status might make sense. bfd/ * elfnn-aarch64.c (elfNN_aarch64_finish_dynamic_symbol): Remove the sanity check at the head of this function.
2017-07-04[binutils patch] DWARF-5: Extend bfd/dwarf2.c parse_comp_unit()Jan Kratochvil2-71/+399
bfd/ 2017-07-04 Jan Kratochvil <jan.kratochvil@redhat.com> * dwarf2.c (struct dwarf2_debug): Add fields dwarf_line_str_buffer and dwarf_line_str_size. (struct attr_abbrev): Add field implicit_const. (dwarf_debug_sections): Add .debug_line_str. (enum dwarf_debug_section_enum): Add debug_line_str and debug_max. (dwarf_debug_section_assert): Add static assertion. (read_indirect_line_string): New. (read_abbrevs): Support DW_FORM_implicit_const. (is_str_attr): Support DW_FORM_line_strp. (read_attribute_value): Support DW_FORM_line_strp and DW_FORM_implicit_const. (read_attribute): Support DW_FORM_implicit_const. (line_info_add_include_dir, line_info_add_include_dir_stub): (line_info_add_file_name, read_formatted_entries): New. (decode_line_info, parse_comp_unit): Support DWARF 5. (_bfd_dwarf2_cleanup_debug_info): Free dwarf_line_str_buffer.
2017-07-04Automatic date update in version.inGDB Administrator1-1/+1
2017-07-03bfd: partial revert commit EC1ACAB (prevent all but undef weak symbols to ↵Egeyar Bagcioglu2-7/+5
become dynamic in sparc). bfd/ChangeLog: 2017-07-03 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com> * elfxx-sparc.c (_bfd_sparc_elf_finish_dynamic_symbol): Remove the abort statement that was put for symbols that are not dynamic.
2017-07-03Regenerate pot files.Tristan Gingold10-3402/+4257
2017-07-03strings: remove section/file size checkAlan Modra2-57/+28
This reverts most of 06803313754, 2005-07-05 Dmitry V. Levin change adding a check that section size doesn't exceed file size. As we've seen recently with mmo tests, decoded section size can easily exceed file size with formats that encode section data. I've also changed "strings" to use bfd_malloc_and_get_section, so that "strings" won't die on a malloc failure. I think it's better to continue on looking at other sections after failing to dump a section with fuzzed size. The testcases at https://bugzilla.altlinux.org/show_bug.cgi?id=5871 on a 32-bit host now produce $ strings -d --target=a.out-i386 /tmp/bfdkiller.dat strings: error: /tmp/bfdkiller.dat(.text) is too large (0xffffffff bytes) strings: /tmp/bfdkiller.dat: Reading section .text failed: Memory exhausted strings: /tmp/bfdkiller.dat: Reading section .data failed: File truncated org.ec $ strings -d --target=a.out-i386 /tmp/eclipse-state strings: /tmp/eclipse-state: Reading section .text failed: File truncated org.eclipse.osgi System Bundle [snip] * strings.c (filename_and_size_t): Delete. (strings_a_section): Don't check section size against file size. Use bdf_malloc_and_get_section. Report an error on failures. Replace arg param with filename and got_a_section param. (got_a_section): Move to.. (strings_object_file): ..an auto var here. Iterate over sections rather than calling bfd_map_over_sections. Adjust strings_a_section call.
2017-07-03Support %Lx, %Lu, %Ld in _bfd_error_handler formatAlan Modra5-46/+82
One way to print 64-bit bfd_vma or bfd_size_type values on 32-bit hosts is to cast the value to long long and use the 'll' modifier in printf format strings. However, that's awkward because we also support the Microsoft C library printf that uses 'I64' as a modifier instead, and having variants of translated strings would not endear us to the translation project. So, rewrite the 'll' modifier in _doprint for Microsoft. Even with that capability it's not so nice for 32-bit code to need casts to long long, so this patch makes 'L' a modifier for bfd_vma rather than an alias for 'll'. I've then used the new 'L' modifier to fix selected format strings. * bfd.c (_doprnt): Rewrite "ll" and "L" modifiers to "I64" for __MSVCRT__. Support "L" modifier for bfd_vma. Formatting. * elf.c (setup_group): Use "Lx" to print sh_size. (_bfd_elf_setup_sections): Remove unnecessary cast and print unknown section type in hex. (copy_special_section_fields): Style fix. (bfd_section_from_shdr): Correct format for sh_link. Use a common error message for all the variants of unrecognized section types. (assign_file_positions_for_load_sections): Use "Lx" for lma adjust error message. (assign_file_positions_for_non_load_sections): Formatting. (rewrite_elf_program_header): Formatting. Use "Lx" for bfd_vma values in error messages. * elfcode.h (elf_slurp_reloc_table_from_section): Cast ELF_R_SYM value to type expected by format. * elflink.c (elf_link_read_relocs_from_section): Use "Lx" in error messages. (elf_link_add_object_symbols): Use "Lu" for symbol sizes. (elf_link_input_bfd): Use "Lx" for r_info. (bfd_elf_gc_record_vtinherit): Use "Lx" for offset.
2017-07-03BFD long long cleanupAlan Modra7-25/+35
long long isn't supposed to be used without a configure test, to support ancient compilers. Probably not terribly important nowadays. * bfd.c (bfd_scan_vma): Don't use long long unless HAVE_LONG_LONG. * coff-rs6000.c (FMT20): Handle hosts with 64-bit long and Microsoft C library variant of long long format specifier. (PRINT20): Cast value to bfd_uint64_t not long long. * coffcode.h (coff_print_aux): Use BFD_VMA_FMT. * coff-x86_64.c (coff_amd64_reloc): Use bfd_uint64_t rather than long long. Don't cast to bfd_vma. * elf32-score.c (score3_bfd_getl48): Likewise. * vms-alpha.c (_bfd_vms_slurp_eisd): Likewise.
2017-07-03Miscellaneous format string fixesAlan Modra3-8/+18
* elf.c (_bfd_elf_print_private_bfd_data): Use BFD_VMA_FMT to print d_tag. (bfd_elf_print_symbol): Don't cast symbol->flags. (_bfd_elf_symbol_from_bfd_symbol): Likewise. * elf32-ppc.c (ppc_elf_begin_write_processing): Correct _bfd_error_handler argument order. (ppc_elf_merge_private_bfd_data): Don't cast flags.
2017-07-03Missing config for bfd.c:_doprntAlan Modra4-55/+119
This function uses HAVE_LONG_LONG and HAVE_LONG_DOUBLE * configure.ac: Invoke AC_CHECK_TYPES for long long. Invoke AC_TYPE_LONG_DOUBLE. * configure: Regenerate. * config.in: Regenerate.
2017-07-03Disable symver test on hppa64-hpuxAlan Modra2-0/+5
The syntax for common symbols is different on that target. * testsuite/gas/elf/symver.d: Don't run on hppa64-hpux.
2017-07-03[GOLD] undef after using DW_IDX and friendsAlan Modra2-1/+7
* dwarf.h (DW_FIRST_IDX, DW_IDX, DW_IDX_DUP, DW_END_IDX): Undef after using.
2017-07-03Repair include/dwarf2.def breakageAlan Modra2-0/+10
* dwarf.h (DW_FIRST_IDX, DW_IDX, DW_IDX_DUP, DW_END_IDX): Define.
2017-07-03buffer.h: Fix spelling mistakesSimon Marchi2-1/+5
gdb/ChangeLog: * buffer.h (buffer_finish): Fix spelling mistakes.
2017-07-03Automatic date update in version.inGDB Administrator1-1/+1
2017-07-02DWARF-5: readelf: .debug_namesJan Kratochvil4-1/+376
Display DWARF-5 .debug_names (standardized .gdb_index). binutils/ChangeLog 2017-07-02 Jan Kratochvil <jan.kratochvil@redhat.com> * dwarf.c: Include assert.h. (MAX, MIN, get_IDX_name, display_debug_names): New. (debug_displays): Add .debug_names. * dwarf.h: (enum dwarf_section_display_enum): Add debug_names. * readelf.c (process_section_headers): Add ".debug_names".
2017-07-02Import include/+libiberty/ r249883 from upstream GCC.Jan Kratochvil5-12/+49
include/ChangeLog 2017-07-02 Jan Kratochvil <jan.kratochvil@redhat.com> * dwarf2.def (DW_IDX_compile_unit, DW_IDX_type_unit, DW_IDX_die_offset) (DW_IDX_parent, DW_IDX_type_hash, DW_IDX_lo_user, DW_IDX_hi_user) (DW_IDX_GNU_internal, DW_IDX_GNU_external): New. * dwarf2.h (DW_IDX, DW_IDX_DUP, DW_FIRST_IDX, DW_END_IDX): New. (enum dwarf_name_index_attribute): Remove. (get_DW_IDX_name): New declaration. libiberty/ChangeLog 2017-07-02 Jan Kratochvil <jan.kratochvil@redhat.com> * dwarfnames.c (DW_FIRST_IDX, DW_END_IDX, DW_IDX, DW_IDX_DUP): New.
2017-07-02Automatic date update in version.inGDB Administrator1-1/+1
2017-07-02Use bfd_malloc_and_get_sectionAlan Modra4-43/+25
It's nicer than xmalloc followed by bfd_get_section_contents, since xmalloc exits on failure and needs a check that its size_t arg doesn't lose high bits when converted from bfd_size_type. PR binutils/21665 * objdump.c (strtab): Make var a bfd_byte*. (disassemble_section): Don't limit malloc size. Instead, use bfd_malloc_and_get_section. (read_section_stabs): Use bfd_malloc_and_get_section. Return bfd_byte*. (find_stabs_section): Remove now unnecessary cast. * objcopy.c (copy_object): Use bfd_malloc_and_get_section. Free contents on error return. * nlmconv.c (copy_sections): Use bfd_malloc_and_get_section.
2017-07-01Setup .dir-locals.el to use C-style comments by defaultEli Zaretskii2-0/+7
gdb/ChangeLog: 2017-07-01 Eli Zaretskii <eliz@gnu.org> * .dir-locals.el: Automatically switch to C-style comments in versions of Emacs that support the feature.
2017-07-01Automatic date update in version.inGDB Administrator1-1/+1
2017-07-01MIPS/GAS: Use a switch on relaxation type in microMIPS fixup creationMaciej W. Rozycki2-10/+20
Use a switch on the relaxation type rather than a chain of conditionals in microMIPS fixup creation, improving source code structure and aiding the compiler with code generation. gas/ * config/tc-mips.c (md_convert_frag): Use a switch on the microMIPS relaxation type rather than a chain of conditionals.
2017-07-01MIPS/GAS: Use frag symbol/offset directly in fixup creationMaciej W. Rozycki2-44/+38
There is no need to use a helper expression in the creation of fixups made from a frag's symbol and offset, because a simple `symbol+offset' expression can be handled directly, with the use of a `fix_new' rather than a `fix_new_exp' call. Rewrite `md_convert_frag' using `fix_new' then and remove all the unneeded helper expressions, simplifying code. gas/ * config/tc-mips.c (md_convert_frag): Rewrite `fix_new_exp' calls in terms of `fix_new'.
2017-07-01MIPS/GAS: Use non-zero frag offset directly in PIC branch relaxationMaciej W. Rozycki17-12/+253
Use frag symbols with a non-zero offset directly in `fix_new_exp' calls made in PIC branch relaxation. There is no need here to make a helper symbol to hold the result of a `symbol+offset' calculation requested as only branches to local symbols are relaxed and in this case the LO16 part of the PIC address load sequence will have the offset accounted for in calculation against the local GOT entry retrieved as the GOT16 high part. Consequently actual code produed is identical whether a helper symbol is used or the original `symbol+offset' expression used directly. Verify that this is indeed the case with GAS and LD tests. gas/ * config/tc-mips.c (md_convert_frag): Don't make a helper expression symbol for `fix_new_exp' called with a non-zero offset. * testsuite/gas/mips/relax-offset.d: New test. * testsuite/gas/mips/mips1@relax-offset.d: New test. * testsuite/gas/mips/r3000@relax-offset.d: New test. * testsuite/gas/mips/r3900@relax-offset.d: New test. * testsuite/gas/mips/micromips@relax-offset.d: New test. * testsuite/gas/mips/relax-offset.l: New stderr output. * testsuite/gas/mips/relax-offset.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. ld/ * testsuite/ld-mips-elf/relax-offset.dd: New test. * testsuite/ld-mips-elf/relax-offset.gd: New test. * testsuite/ld-mips-elf/relax-offset-umips.dd: New test. * testsuite/ld-mips-elf/relax-offset-umips.gd: New test. * testsuite/ld-mips-elf/relax-offset.ld: New test linker script. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests. (prune_warnings): New temporary procedure.
2017-06-30Add support for a __gcc_isr pseudo isntruction to the AVR assembler.Georg-Johann Lay12-7/+1060
PR gas/21683 include * opcode/avr.h (AVR_INSN): Add one for __gcc_isr. gas * doc/c-avr.texi (AVR Options) <-mgcc-isr>: Document it. (AVR Pseudo Instructions): New node. * config/tc-avr.h (md_pre_output_hook): Define to avr_pre_output_hook. (md_undefined_symbol): Define to avr_undefined_symbol. (avr_pre_output_hook, avr_undefined_symbol): New protos. * config/tc-avr.c (struc-symbol.h): Include it. (ISR_CHUNK_Done, ISR_CHUNK_Prologue, ISR_CHUNK_Epilogue): New enums. (avr_isr, avr_gccisr_opcode) (avr_no_sreg_hash, avr_no_sreg): New static variables. (avr_opt_s) <have_gccisr>: Add field. (avr_opt): Add initializer for have_gccisr. (enum options) <OPTION_HAVE_GCCISR>: Add enum. (md_longopts) <"mgcc-isr">: Add entry. (md_show_usage): Document -mgcc-isr. (md_parse_option) [OPTION_HAVE_GCCISR]: Handle it. (md_undefined_symbol): Remove. (avr_undefined_symbol, avr_pre_output_hook): New fuctions. (md_begin) <avr_no_sreg_hash, avr_gccisr_opcode>: Initialize them. (avr_operand) <pregno>: Add argument and set *pregno if function is called for a register constraint. [N]: Handle constraint. (avr_operands) <avr_operand>: Pass 5th parameter to calls. [avr_opt.have_gccisr]: Call avr_update_gccisr. Call avr_gccisr_operands instead of avr_operands. (avr_update_gccisr, avr_emit_insn, avr_patch_gccisr_frag) (avr_gccisr_operands, avr_check_gccisr_done): New static functions. * testsuite/gas/avr/gccisr-01.d: New test. * testsuite/gas/avr/gccisr-01.s: New test. * testsuite/gas/avr/gccisr-02.d: New test. * testsuite/gas/avr/gccisr-02.s: New test. * testsuite/gas/avr/gccisr-03.d: New test. * testsuite/gas/avr/gccisr-03.s: New test.
2017-06-30MIPS/GAS: Update `match_float_constant' and `match_operand' descriptionsMaciej W. Rozycki2-5/+10
Complement commit a92713e60ef4 ("Preparse MIPS instructions into tokens"), <https://sourceware.org/ml/binutils/2013-07/msg00143.html>, and update `match_float_constant' and `match_operand' function descriptions according to semantics changes. gas/ * config/tc-mips.c (match_float_constant): Update description. (match_operand): Likewise.
2017-06-30MIPS/opcodes: Reorder LSA and DLSA instructionsMaciej W. Rozycki2-3/+8
Correct an issue introduced with commit 7361da2c952e ("Add support for MIPS R6.") and move the LSA and DLSA instructions back to the MSA ASE instruction block in the regular MIPS opcode table. Adjust formatting around the "MIPS r6" heading. opcodes/ * mips-opc.c (mips_builtin_opcodes): Move "lsa" and "dlsa" entries to the MSA ASE instruction block.
2017-06-30PR cli/21688: Detect aliases when issuing python/compile/guile commands (and ↵Sergio Durigan Junior4-18/+54
fix last commit) My last commit fixed a regression that happened when using inline/multi-line commands for Python/Compile/Guile, but introduced another regression: it is now not possible to use aliases for the commands mentioned above. The fix is to almost revert the change I've made and go back to using the 'struct cmd_list_element *', but at the same time make sure that we advance the 'cmd_name' variable past all the whitespace characters after the command name. If, after skipping the whitespace, we encounter a '\0', it means that the command is not inline. Otherwise, it is. This patch also expands the testcase in order to check for aliases and for trailing whitespace after the command name. gdb/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> Pedro Alves <palves@redhat.com> PR cli/21688 * cli/cli-script.c (command_name_equals_not_inline): Remove function. (process_next_line): New variable 'inline_cmd'. Adjust 'if' clauses for "python", "compile" and "guile" to use 'command_name_equals' and check for '!inline_cmd'. gdb/testsuite/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> PR cli/21688 * gdb.python/py-cmd.exp (test_python_inline_or_multiline): Add new tests for alias commands and trailing whitespace.
2017-06-30PR cli/21688: Fix multi-line/inline command differentiationSergio Durigan Junior4-4/+62
This bug is a regression caused by the following commit: 604c4576fdcfc4e7c28f569b3748a1b6b4e0dbd4 is the first bad commit commit 604c4576fdcfc4e7c28f569b3748a1b6b4e0dbd4 Author: Jerome Guitton <guitton@adacore.com> Date: Tue Jan 10 15:15:53 2017 +0100 The problem happens because, on cli/cli-script.c:process_next_line, GDB is not using the command line string to identify which command to run, but it instead using the 'struct cmd_list_element *' that is obtained by using the mentioned string. The problem with that is that the 'struct cmd_list_element *' doesn't have any information on whether the command issued by the user is a multi-line or inline one. A multi-line command is a command that will necessarily be composed of more than 1 line. For example: (gdb) if 1 >python >print ('hello') >end >end As can be seen in the example above, the 'python' command actually "opens" a new command line (represented by the change in the indentation) that will then be used to enter Python code. OTOH, an inline command is a command that is "self-contained" in a single line, for example: (gdb) if 1 >python print ('hello') >end This Python command is a one-liner, and therefore there is no other Python code that can be entered for this same block. There is also no change in the indentation. So, the fix is somewhat simple: we have to revert the change and use the full command line string passed to process_next_line in order to identify whether we're dealing with a multi-line or an inline command. This commit does just that. As can be seen, this regression also affects other languages, like guile or the compile framework. To make things clearer, I decided to create a new helper function responsible for identifying a non-inline command. Testcase is attached. gdb/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> PR cli/21688 * cli/cli-script.c (command_name_equals_not_inline): New function. (process_next_line): Adjust 'if' clauses for "python", "compile" and "guile" to use command_name_equals_not_inline. gdb/testsuite/ChangeLog: 2017-06-30 Sergio Durigan Junior <sergiodj@redhat.com> PR cli/21688 * gdb.python/py-cmd.exp (test_python_inline_or_multiline): New procedure. Call it.
2017-06-30Fix failures in MMIX linker tests introduced by fix for PR 21665.Nick Clifton2-1/+32
PR binutils/21665 * objdump.c (disassemble_section): Move check for an overlarge section to just before the allocation of memory. Do not check section size against file size, but instead use an arbitrary 2Gb limit. Issue a warning message if the section is too big.
2017-06-30MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support (ChangeLog)Maciej W. Rozycki1-1/+1
Correct ChangeLog entry for commit 38bf472a1521 ("MIPS: Add Imagination interAptiv MR2 MIPS32r3 processor support").
2017-06-30MIPS: Add microMIPS XPA supportMaciej W. Rozycki8-5/+63
Add support for the base and Virtualization ASE microMIPS instructions as per the architecture specifications[1][2][3][4]. Most of this change by Andrew Bennett. [1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", p. 340 [2] "microMIPS32 Architecture for Programmers Volume IV-i: Virtualization Module of the microMIPS32 Architecture", MIPS Technologies, Inc., Document Number: MD00848, Revision 1.06, December 10, 2013, Section 6.1 "Overview", pp. 133, 136 [3] "MIPS Architecture for Programmers Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", pp. 415, 444 [4] "microMIPS64 Architecture for Programmers Volume IV-i: Virtualization Module of the microMIPS64 Architecture", MIPS Technologies, Inc., Document Number: MD00849, Revision 1.06, December 10, 2013, Section 6.1 "Overview", pp. 134-135, 139-140 binutils/ * NEWS: Mention microMIPS XPA support. opcodes/ * micromips-opc.c (XPA, XPAVZ): New macros. (micromips_opcodes): Add "mfhc0", "mfhgc0", "mthc0" and "mthgc0". gas/ * config/tc-mips.c (mips_ases): Add microMIPS XPA support. * testsuite/gas/mips/micromips@xpa.d: New test. * testsuite/gas/mips/mips.exp: Run the new test. Enable `xpa-virt-err' test for `micromips'.
2017-06-30MIPS: Add microMIPS R5 supportMaciej W. Rozycki7-1/+31
Add base microMIPS Release 5 ISA support and the ERETNC instruction in particular, as per the architecture specifications[1][2]. Most of this change by Andrew Bennett. References: [1] "MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set", MIPS Technologies, Inc., Document Number: MD00582, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", pp. 266-267 [2] "MIPS Architecture for Programmers Volume II-B: The microMIPS64 Instruction Set", MIPS Technologies, Inc., Document Number: MD00594, Revision 5.04, January 15, 2014, Section 5.5 "Recoded 32-Bit Instructions", pp. 326-327 binutils/ * NEWS: Mention microMIPS Release 5 ISA support. opcodes/ * micromips-opc.c (I36): New macro. (micromips_opcodes): Add "eretnc". gas/ * testsuite/gas/mips/micromips@r5.d: New test. * testsuite/gas/mips/mips.exp: Run the new test.
2017-06-30MIPS: Fix XPA base and Virtualization ASE instruction handlingMaciej W. Rozycki22-27/+202
Correct a commit 7d64c587c15f ("Add support for the MIPS eXtended Physical Address (XPA) ASE.") bug, causing XPA base and Virtualization ASE instructions to be wrongly always enabled with the selection of the MIPS32r2 or higher ISA. For example this source assembles successfully as shown below: $ cat xpa.s mfhc0 $2, $1 $ as -32 -mips32 -o xpa.o xpa.s xpa.s: Assembler messages: xpa.s:1: Error: opcode not supported on this processor: mips32 (mips32) `mfhc0 $2,$1' $ as -32 -mips32r2 -o xpa.o xpa.s $ objdump -d xpa.o xpa.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: 40420800 mfhc0 v0,c0_random ... $ To address this issue remove the I33 (INSN_ISA32R2) marking from all XPA instructions in the opcode table. Additionally, for XPA Virtualization ASE instructions implement an XPAVZ (ASE_XPA_VIRT) combination ASE flag and use it in place of IVIRT|XPA (ASE_VIRT|ASE_XPA). Now the same source is correctly rejected unless the `-mxpa' option is also used: $ as -32 -mips32r2 -o xpa.o xpa.s xpa.s: Assembler messages: xpa.s:1: Error: opcode not supported on this processor: mips32r2 (mips32r2) `mfhc0 $2,$1' $ as -32 -mips32r2 -mxpa -o xpa.o xpa.s $ Add test cases for XPA base and XPA Virtualization ASE instructions. Parts of this change by Andrew Bennett. include/ * opcode/mips.h (ASE_XPA_VIRT): New macro. opcodes/ * mips-dis.c (mips_calculate_combination_ases): Handle the ASE_XPA_VIRT flag. (parse_mips_ase_option): New function. (parse_mips_dis_option): Factor out ASE option handling to the new function. Call `mips_calculate_combination_ases'. * mips-opc.c (XPAVZ): New macro. (mips_builtin_opcodes): Correct ISA and ASE flags for "mfhc0", "mfhgc0", "mthc0" and "mthgc0". gas/ * config/tc-mips.c (mips_set_ase): Handle the ASE_XPA_VIRT flag. * testsuite/gas/mips/xpa.d: Remove `xpa' from `-M' in `objdump' flags. Add `-mvirt' to `as' flags. * testsuite/gas/mips/xpa-err.d: New test. * testsuite/gas/mips/xpa-virt-err.d: New test. * testsuite/gas/mips/xpa-err.l: New stderr output. * testsuite/gas/mips/xpa-virt-err.l: New stderr output. * testsuite/gas/mips/xpa-err.s: New test source. * testsuite/gas/mips/xpa-virt-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests. binutils/ * testsuite/binutils-all/mips/mips-xpa-virt-1.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-2.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-3.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt-4.d: New test. * testsuite/binutils-all/mips/mips-xpa-virt.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new tests.
2017-06-30Automatic date update in version.inGDB Administrator1-1/+1
2017-06-30MIPS/opcodes: Correctly combine ASE flags for ASE_MIPS16E2_MT calculationMaciej W. Rozycki5-45/+40
Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support") disassembler bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, where the calculation uses MIPS ABI Flags directly rather than calculated internal ASE flags. Consequently code does not correctly set the ASE_MIPS16E2_MT flag when the MIPS16e2 ASE flag and the MT ASE flag come from different sources, i.e. one from the BFD chosen and the other one from MIPS ABI Flags. Fix this by using internal ASE_MT and ASE_MIPS16E2 flags in a separate subsequent step, factored out to a dedicated function for use with future combination ASE flags. Adjust the `mips16e2@mips16e2-mt-sub.d' test case accordingly, where the MT flag comes from the BFD selected for the disassembler and the MIPS16e2 flag comes from the ELF binary itself. opcodes/ * mips-dis.c (mips_calculate_combination_ases): New function. (mips_convert_abiflags_ases): Factor out ASE_MIPS16E2_MT calculation to the new function. (set_default_mips_dis_options): Call the new function. gas/ * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: Adjust for the ASE_MIPS16E2_MT flag disassembler fix. * testsuite/gas/mips/mips16e2-interaptiv-mr2@mips16e2-mt-sub.d: Likewise.
2017-06-30MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculationMaciej W. Rozycki6-0/+35
Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support") GAS bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which is not correctly calculated as `.set nomips16e2' and `.set nomt' pseudo-ops are processed. This leads to code like: $ cat foo.s .set nomt evpe .align 4, 0 $ cat bar.s .set nomips16e2 dvpe .align 4, 0 $ to successfully assemble where it should not: $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s $ objdump -m mips:16 -d foo.o foo.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: f027 6700 evpe ... bar.o: file format elf32-tradbigmips Disassembly of section .text: 00000000 <.text>: 0: f026 6700 dvpe ... $ This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never cleared. Fix the problem by clearing it there before it is calculated based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as expected: $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s foo.s: Assembler messages: foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe' $ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s bar.s: Assembler messages: bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe' $ gas/ * config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT flag before recalculating. * testsuite/gas/mips/mips16e2-mt-err.d: New test. * testsuite/gas/mips/mips16e2-mt-err.l: New stderr output. * testsuite/gas/mips/mips16e2-mt-err.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-06-29RISC-V: Fix TLS copy relocsAndrew Waterman2-4/+11
The dynrelro introduction wasn't implemented quite right for RISC-V, as it didn't consider TLS copy relocs. bfd/ChangeLog 2017-06-29 Andrew Waterman <andrew@sifive.com> * elfnn-riscv.c (riscv_elf_adjust_dynamic_symbol): Fix TLS copy relocs.
2017-06-29Expression completer should not match explicit location optionsPedro Alves4-1/+16
This commit fixes a mismatch between what "print" command completer thinks the command understands, and what the command actually understands. The explicit location options are understood by commands that take (linespecs and) explicit locations as argument. I.e, breakpoint commands, and "list". For example: (gdb) b -source file.c -function my_func So for those commands, it makes sense that the completer completes: "b -sour[TAB]" -> "b -source " "b -functi[TAB]" -> "b -function " etc. However, completion for commands that take expressions (not linespecs/locations) as arguments, such as the "print" command, also completes the explicit location options, even though those switches aren't really understood by these commands. Instead, "-foo" is understood as an expression applying unary minus on a symbol named "foo" (think "print -1"): (gdb) p -func[TAB] (gdb) p -function [RET] No symbol "function" in current context. The patch fixes this by having the expression_completer function bypass the function that completes explicit locations. New regression tests included. gdb/ChangeLog: 2017-06-29 Pedro Alves <palves@redhat.com> * completer.c (expression_completer): Call linespec_location_completer instead of location_completer. gdb/testsuite/ChangeLog: 2017-06-29 Pedro Alves <palves@redhat.com> * gdb.base/printcmds.exp: Add tests.
2017-06-29Remove old stale expression_completer hackPedro Alves2-9/+6
The code in question was introduced by: https://sourceware.com/ml/gdb-patches/2008-06/msg00143.html "The fix is to make sure that the entire expression is passed to expression_completer, then duplicate some logic there in the case where location_completer is called." The logic that was duplicated was much later on removed by the original explicit locations patch: commit 87f0e7204722a986f79f245eee716f0870832d47 Author: Keith Seitz <keiths@redhat.com> AuthorDate: Tue Aug 11 17:09:36 2015 -0700 Commit: Keith Seitz <keiths@redhat.com> CommitDate: Tue Aug 11 17:09:36 2015 -0700 Explicit locations: add UI features for CLI @@ -688,16 +880,6 @@ complete_line_internal (const char *text, rl_completer_word_break_characters = gdb_completer_file_name_break_characters; } - else if (c->completer == location_completer) - { - /* Commands which complete on locations want to - see the entire argument. */ - for (p = word; - p > tmp_command - && p[-1] != ' ' && p[-1] != '\t'; - p--) - ; - } However this case in expression_completer was left behind. I couldn't come up with a test where this currently makes any difference. gdb/ChangeLog: 2017-06-29 Pedro Alves <palves@redhat.com> * completer.c (expression_completer): Remove code that recomputes 'text' from 'word'.
2017-06-29[ARC] Use FOR_EACH_DISASSEMBLER_OPTION to iterate over optionsAnton Kolesov2-14/+11
This patch updates arc-dis.c:parse_disassembler_options to use a macro FOR_EACH_DISASSEMBLER_OPTION, which has been introduced in [1], instead of a homegrown solution to split option string. [1] https://sourceware.org/git/?p=binutils-gdb.git;a=commit;h=65b48a81 opcodes/ChangeLog: yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com> * arc-dis.c (parse_disassembler_options): Use FOR_EACH_DISASSEMBLER_OPTION.
2017-06-29[ARC] Fix handling of cpu=... disassembler option valueAnton Kolesov5-25/+84
There is a bug in handling of cpu=... disassembler option in case there are other options after it, for example, `cpu=EM,dsp'. In this case `EM,dsp' is treated as an option value, and strcasecmp reports is as non-equal to "EM". This is fixed by using disassembler_options_cmp function, which compares string treating `,' the same way as `\0'. This function also solves a problem with option order in parse_option. Previously, if several option had same prefix (e.g. fpud, fpuda), then the longer one should have been compared first, otherwise when longer option is passed it would be treated as a short one, because CONST_STRNEQ ("fpud", "fpuda") would be true. The order of options was correct for ARC, so there were no bugs per se, but with disassembler_option_cmp there is no risk of such a bug being introduced in the future. opcodes/ChangeLog: yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com> * arc-dis.c (parse_option): Use disassembler_options_cmp to compare disassembler option strings. (parse_cpu_option): Likewise. binutils/ChangeLog yyyy-mm-dd Anton Kolesov <Anton.Kolesov@synopsys.com> * testsuite/binutils-all/arc/double_store.s: New file. * testsuite/binutils-all/arc/objdump.exp: Tests for disassembler options. (do_objfile): New function. (check_assembly): Likewise.
2017-06-29Use target_desc fields expedite_regs and xmltarget ifndef IN_PROCESS_AGENTYao Qi4-0/+16
struct target_desc is used by both GDBserver and IPA, but fields expedite_regs and xmltarget are only used in GDBserver, so this patch wraps these two fields by ifndef IN_PROCESS_AGENT. This patch also changes regformats/regdat.sh to generate .c files in this way too. gdb/gdbserver: 2017-06-29 Yao Qi <yao.qi@linaro.org> * tdesc.h (struct target_desc) [IN_PROCESS_AGENT] <expedite_regs>: Remove. [IN_PROCESS_AGENT] <xmltarget>: Likewise. gdb: 2017-06-29 Yao Qi <yao.qi@linaro.org> * regformats/regdat.sh: Generate code with "ifndef IN_PROCESS_AGENT".
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