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AgeCommit message (Expand)AuthorFilesLines
2016-11-04Commit missing ChangeLog entry for Cortex-M33 supportThomas Preud'homme1-0/+6
2016-11-04Add support for ARM Cortex-M33 processorThomas Preud'homme5-1/+15
2016-11-04Add support for ARM Cortex-M23 processorThomas Preud'homme4-0/+12
2016-11-04Add maintainers for RISC-V target.Palmer Dabbelt2-0/+7
2016-11-04Update RISC-V documentation and make sure that it is included in the gas info...Palmer Dabbelt6-4/+32
2016-11-04Remove support for $PLATFORM in rpath search paths.Nick Clifton5-35/+18
2016-11-04Fix building binutils for all 32-bit targets by moving riscv32 target into 64...Nick Clifton2-1/+6
2016-11-04ld: Allow EXCLUDE_FILE to be used outside of the section listAndrew Burgess20-21/+231
2016-11-04ld: Create test object files based on source file nameAndrew Burgess6-7/+34
2016-11-04ld/xc16x: This target does not support -sharedAndrew Burgess2-0/+6
2016-11-04ld: Rename pattern within yacc grammar fileAndrew Burgess2-7/+12
2016-11-04Automatic date update in version.inGDB Administrator1-1/+1
2016-11-03Add support for the sizeof function in RustManish Goregaokar4-3/+17
2016-11-03Add support for untagged unions in RustManish Goregaokar2-118/+201
2016-11-03Fix handling of discriminantless univariant enums in Rust; fix bug with encod...Manish Goregaokar5-1/+70
2016-11-03[ARC] Fix ldbit test on 32-bit systemsGraham Markall3-7/+13
2016-11-03arc: Implement NPS-400 dcmac instructionGraham Markall9-1/+204
2016-11-03arc: Change max instruction length to 64-bitsAndrew Burgess11-1116/+804
2016-11-03arc: Swap highbyte and lowbyte in print_insn_arcGraham Markall2-4/+8
2016-11-03opcodes/arc: Make some macros 64-bit safeGraham Markall2-26/+32
2016-11-03arc: Replace ARC_SHORT macro with arc_opcode_len functionGraham Markall7-10/+38
2016-11-03gas/arc: Replace short_insn flag with insn length fieldGraham Markall2-45/+27
2016-11-03arc/opcodes/nps400: Fix some instruction masksAndrew Burgess2-3/+7
2016-11-04New option falkor for Qualcomm server partSiddhesh Poyarekar5-0/+15
2016-11-03X86: Reuse opcode 0x80 decoder for opcode 0x82H.J. Lu2-58/+24
2016-11-03X86: Decode opcode 0x82 as opcode 0x80 in 32-bit modeH.J. Lu6-1/+111
2016-11-03Replace YY_NULL with YY_NULLPTR in LANG-exp.cYao Qi2-0/+5
2016-11-03Deprecate old platformsTristan Gingold2-0/+71
2016-11-03X86: Rename REG_82 to REG_83H.J. Lu2-3/+10
2016-11-03Remove GDBARCH_BREAKPOINT_MANIPULATION and SET_GDBARCH_BREAKPOINT_MANIPULATIONYao Qi45-141/+384
2016-11-03Remove arm_override_modeYao Qi2-14/+6
2016-11-03Determine the kind of single step breakpointYao Qi8-2/+135
2016-11-03Add default_breakpoint_from_pcYao Qi20-82/+35
2016-11-03Remove gdbarch_remote_breakpoint_from_pcYao Qi8-66/+13
2016-11-03Rename placed_size to kindYao Qi5-15/+17
2016-11-03New gdbarch methods breakpoint_kind_from_pc and sw_breakpoint_from_kindYao Qi22-52/+238
2016-11-03Split breakpoint_from_pc to breakpoint_kind_from_pc and sw_breakpoint_from_kindYao Qi18-386/+522
2016-11-03Add enum for mips breakpoint kindsYao Qi2-15/+31
2016-11-03GDBARCH_BREAKPOINT_MANIPULATION and SET_GDBARCH_BREAKPOINT_MANIPULATIONYao Qi30-272/+147
2016-11-03gdbarch_breakpoint_from_pc doesn't return NULLYao Qi4-6/+8
2016-11-03[ARM] Allow MOV/MOV.W to accept all possible immediatesJiong Wang10-17/+108
2016-11-03Updated Danish translation for the BFD library.Nick Clifton2-262/+14
2016-11-03Automatic date update in version.inGDB Administrator1-1/+1
2016-11-02Fix dwarf_expr_context method regressionsTom Tromey4-31/+38
2016-11-02Enable Intel AVX512_4VNNIW instructionsIgor Tsimbalist24-5342/+6279
2016-11-02Enable Intel AVX512_4FMAPS instructionsIgor Tsimbalist31-10564/+11903
2016-11-02Automatic date update in version.inGDB Administrator1-1/+1
2016-11-01BFD: Fix double BFD_FAIL calls in `bfd_default_reloc_type_lookup'Maciej W. Rozycki2-0/+6
2016-11-01Add support for RISC-V architecture.Nick Clifton56-20/+9982
2016-11-01Automatic date update in version.inGDB Administrator1-1/+1
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