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2017-06-26RISC-V: Use pc-relative relocation for FDE initial locationKuan-Lin Chen10-1/+61
The symbol address in .eh_frame may be adjusted in _bfd_elf_discard_section_eh_frame, and the content of .eh_frame will be adjusted in _bfd_elf_write_section_eh_frame. Therefore, we cannot insert a relocation whose addend symbol is in .eh_frame. Othrewise, the value may be adjusted twice. bfd/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * elfnn-riscv.c (perform_relocation): Support the new R_RISCV_32_PCREL relocation. (riscv_elf_relocate_section): Likewise. * elfxx-riscv.c (howto_table): Likewise. (riscv_reloc_map): Likewise. * bfd-in2.h (BFD_RELOC_RISCV_32_PCREL): New relocation. * libbfd.h: Regenerate. gas/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * config/tc-riscv.c (md_apply_fix) [BFD_RELOC_32]: Convert to a R_RISCV_32_PCREL relocation. include/ChangeLog 2017-06-26 Kuan-Lin Chen <rufus@andestech.com> * elf/riscv.h (R_RISCV_32_PCREL): New.
2017-06-27More fixes for bfd_get_section_contents changeAlan Modra2-14/+12
PR binutils/21665 * libbfd.c (_bfd_generic_get_section_contents): Delete abort. Use unsigned file pointer type, and remove cast. * libbfd.c (_bfd_generic_get_section_contents_in_window): Likewise. Add "count", not "sz".
2017-06-27Automatic date update in version.inGDB Administrator1-1/+1
2017-06-27Fix GDB regressions caused by previous bfd_get_section_contents changesPedro Alves2-1/+7
Ref: https://sourceware.org/ml/binutils/2017-06/msg00343.html bfd/ChangeLog: 2017-06-26 Pedro Alves <palves@redhat.com> PR binutils/21665 * libbfd.c (_bfd_generic_get_section_contents): Add "count", not "sz".
2017-06-26Add a missing line to _bfd_generic_get_section_contents_in_windowH.J. Lu2-0/+7
PR binutils/21665 * libbfd.c (_bfd_generic_get_section_contents_in_window): Add a missing line.
2017-06-26MIPS/BFD: Consistently mark the LSI CW4010 as a MIPS II processorMaciej W. Rozycki6-6/+45
Make BFD agree with GAS and mark the LSI MiniRISC CW4010 processor core (for an odd reason referred to as LSI R4010 across our code base) as a MIPS II processor in BFD as well, fixing a bug that has been there since forever and addressing linker warnings like: $ as -m4010 empty.s -o 4010.o $ ld -r 4010.o -o 4010-r.o ld: 4010.o: warning: Inconsistent ISA between e_flags and .MIPS.abiflags $ due to the ISA level being recorded as MIPS III in ELF file header's `e_flags' vs MIPS II in the MIPS ABI Flags section: $ readelf -Ah 4010.o ELF Header: Magic: 7f 45 4c 46 01 02 01 00 00 00 00 00 00 00 00 00 Class: ELF32 Data: 2's complement, big endian Version: 1 (current) OS/ABI: UNIX - System V ABI Version: 0 Type: REL (Relocatable file) Machine: MIPS R3000 Version: 0x1 Entry point address: 0x0 Start of program headers: 0 (bytes into file) Start of section headers: 348 (bytes into file) Flags: 0x20821000, 4010, o32, mips3 Size of this header: 52 (bytes) Size of program headers: 0 (bytes) Number of program headers: 0 Size of section headers: 40 (bytes) Number of section headers: 11 Section header string table index: 10 Attribute Section: gnu File Attributes Tag_GNU_MIPS_ABI_FP: Hard float (double precision) MIPS ABI Flags Version: 0 ISA: MIPS2 GPR size: 32 CPR1 size: 32 CPR2 size: 0 FP ABI: Hard float (double precision) ISA Extension: LSI R4010 ASEs: None FLAGS 1: 00000000 FLAGS 2: 00000000 $ Available documentation[1][2] clearly indicates the LSI CW4010 processor is only backwards compatible with the MIPS R4000 processor as far as the latter's 32-bit instructions are concerned and consequently can only be considered a MIPS II ISA implementation (with vendor extensions). This fixes an LD testsuite failure: FAIL: MIPS incompatible objects: "-march=r4010 -32" "-march=r4650 -32" triggered for the `mips-sgi-irix5' and `mips-sgi-irix6' targets. References: [1] Paul Cobb, Bob Caulk, Joe Cesana, "The MiniRISC CW4010: A Superscalar MIPS Processor ASIC Core", LSI Logic, July 1995, presented at Hot Chips VII, Stanford University, Stanford, California, August 1995 [2] "MiniRISC MR4010 Superscalar Microprocessor Reference Device", LSI Logic, November 1996, Doc. No. DB09-000028-00, Order No. C15017 bfd/ * cpu-mips.c (arch_info_struct): Mark the 4010 32-bit. * elfxx-mips.c (mips_set_isa_flags) <bfd_mach_mips4010>: Set E_MIPS_ARCH_2 rather than E_MIPS_ARCH_3 in `e_flags'. (mips_mach_extensions): Mark `bfd_mach_mips4010' as extending `bfd_mach_mips6000' rather than `bfd_mach_mips4000'. ld/ * testsuite/ld-mips-elf/lsi-4010-isa.d: New test. * ld/testsuite/ld-mips-elf/mips-elf.exp: Run the new test.
2017-06-26Check file size before getting section contentsH.J. Lu3-9/+26
Don't check the section size in bfd_get_full_section_contents since the size of a decompressed section may be larger than the file size. Instead, check file size in _bfd_generic_get_section_contents. PR binutils/21665 * compress.c (bfd_get_full_section_contents): Don't check the file size here. * libbfd.c (_bfd_generic_get_section_contents): Check for and reject a section whoes size + offset is greater than the size of the entire file. (_bfd_generic_get_section_contents_in_window): Likewise.
2017-06-26LD: Fix .startof.SECNAME/.sizeof.SECNAME tests for MIPS/IRIXMaciej W. Rozycki6-8/+18
Correct .startof.SECNAME/.sizeof.SECNAME tests for MIPS/IRIX targets, complementing commit dc74becf498f ("ld: Add tests for -Ur") and commit da614360f520 ("ld: Add tests for .startof.SECNAME/.sizeof.SECNAME") with subsequent updates, and in reference to commit cbd0eecf261c ("Always define referenced __start_SECNAME/__stop_SECNAME") and commit 7dba9362c172 ("Rewrite __start and __stop symbol handling"). These targets set the STT_OBJECT type for non-function symbol references, according to `elf_frob_symbol' code in gas/config/obj-elf.c: /* The Irix 5 and 6 assemblers set the type of any common symbol and any undefined non-function symbol to STT_OBJECT. We try to be compatible, since newer Irix 5 and 6 linkers care. However, we only set undefined symbols to be STT_OBJECT if we are on Irix, because that is the only time gcc will generate the necessary .global directives to mark functions. */ if (S_IS_COMMON (symp)) symbol_get_bfdsym (symp)->flags |= BSF_OBJECT; if (strstr (TARGET_OS, "irix") != NULL && ! S_IS_DEFINED (symp) && (symbol_get_bfdsym (symp)->flags & BSF_FUNCTION) == 0) symbol_get_bfdsym (symp)->flags |= BSF_OBJECT; and consequently entries in the symbol table listing from `readelf' produced with these tests do not match the NOTYPE pattern expected, causing test suite failures: FAIL: ld-elf/sizeofa FAIL: ld-elf/sizeofc FAIL: ld-elf/startofa FAIL: ld-elf/startofc specifically with the `mips-sgi-irix5' and `mips-sgi-irix6' targets. Given that it does not matter for the feature covered by these tests whether the type of the symbols produced is STT_NOTYPE or STT_OBJECT adjust the problematic cases to accept either type, removing the failures observed. ld/ * testsuite/ld-elf/sizeofa.d: Also accept the OBJECT type for the symbols examined. * testsuite/ld-elf/sizeofc.d: Likewise. * testsuite/ld-elf/startofa.d: Likewise. * testsuite/ld-elf/startofc.d: Likewise.
2017-06-26record-full: Remove unused function netorder16Simon Marchi2-10/+4
clang shows this warning: /home/emaisin/src/binutils-gdb/gdb/record-full.c:2344:1: error: unused function 'netorder16' [-Werror,-Wunused-function] netorder16 (uint16_t input) ^ Remove this function, which, AFAIK, has never been used. Note that GCC doesn't warn about this, because the function is marked as inline. According to gcc's man page, it should ideed not warn: -Wunused-function Warn whenever a static function is declared but not defined or a non-inline static function is unused. This warning is enabled by -Wall. So it's probably not a GCC bug that it doesn't find this unused function, but a different definition of "unused". gdb/ChangeLog: * record-full.c (netorder16): Remove.
2017-06-26vec: Silence -Wunused-function warnings on clangSimon Marchi3-2/+49
clang has a too aggressive (or broken, depends on how you want to see it) -Wunused-function warning, which is triggered by the functions defined by DEF_VEC_* but not used in the current source file. Normally, it won't warn about unused static inline functions defined in header files, because it's expected that a source file won't use all functions defined in a header file it includes. However, if the DEF_VEC_* macro is used in a source file, it considers those functions as defined in the source file, which leads it to think that we should remove those functions. It is therefore missing a check to see whether those functions are resulting from macro expansion. A bug already exists for that: https://bugs.llvm.org//show_bug.cgi?id=22712 It's quite easy to silence this warning in a localized way, that is in the DEF_VEC_* macros. gdb/ChangeLog: * common/diagnostics.h: Define macros for GCC. (DIAGNOSTIC_IGNORE_UNUSED_FUNCTION): New macro. * common/vec.h: Include diagnostics.h. (DIAGNOSTIC_IGNORE_UNUSED_VEC_FUNCTION): New macro. (DEF_VEC_I, DEF_VEC_P, DEF_VEC_O): Ignore -Wunused-function warning.
2017-06-26ada-lex: Ignore warnings about register keywordSimon Marchi3-0/+19
Some older versions of flex (such as the one shipped with macOS) generate code that use the register keyword, which clang warns about. This patch makes the compiler ignore those warnings for the portion of the code generated by flex. gdb/ChangeLog: * common/diagnostics.h (DIAGNOSTIC_IGNORE_DEPRECATED_REGISTER): New macro. * ada-lex.l: Ignore deprecated register warnings.
2017-06-26Fix address violation parsing a corrupt texhex format file.Nick Clifton2-1/+11
PR binutils/21670 * tekhex.c (getvalue): Check for the source pointer exceeding the end pointer before the first byte is read.
2017-06-26Fix address violations when atempting to parse fuzzed binaries.Nick Clifton6-5/+43
PR binutils/21665 bfd * opncls.c (get_build_id): Check that the section is beig enough to contain the whole note. * compress.c (bfd_get_full_section_contents): Check for and reject a section whoes size is greater than the size of the entire file. * elf32-v850.c (v850_elf_copy_notes): Allow for the ouput to not contain a notes section. binutils* objdump.c (disassemble_section): Skip any section that is bigger than the entire file.
2017-06-26Produce a consistent warning message when attempting to run a tool on a ↵Nick Clifton2-0/+8
directory. PR binutils/21659 * bucomm.c (get_file_size): Explicitly warn if the file is a directory.
2017-06-26Check unsupported .symver with common symbolH.J. Lu6-0/+35
The .symver directive on common symbol creates a new common symbol, which shouldn't be allowed, similar to alias on common symbol: $ cat y.S .comm bar,8,8 .set bar1,bar $ as -o y.o y.S y.S: Assembler messages: y.S:2: Error: `bar1' can't be equated to common symbol 'bar' $ PR gas/21661 * config/obj-elf.c (obj_elf_symver): Don't allow .symver with common symbol. (elf_frob_symbol): Likewise. * testsuite/gas/elf/elf.exp: Run pr21661. * testsuite/gas/elf/pr21661.d: New file. * testsuite/gas/elf/pr21661.s: Likewise.
2017-06-26Add pgste marker changelogAndreas Krebbel5-0/+33
2017-06-26S/390: Fix testsuite segfault added with recent pgste patch.Andreas Krebbel2-7/+25
The recent pgste patch caused several testcases to fail with a segfault. Fixed with this patch by adding NULL pointer checks. regression-tested on s390x. bfd/ChangeLog: 2017-06-26 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elf64-s390.c (elf_s390_additional_program_headers): Add NULL pointer checks. (elf_s390_modify_segment_map): Likewise. (bfd_elf_s390_set_options): Lisewise.
2017-06-26Fix compile time warning building gas for arm-wince target.Nick Clifton2-0/+6
* config/tc-arm.c (fpu_any): Only define for ELF based targets.
2017-06-26Update check conditions for illegal placed instructions.claziss5-2/+50
ARC cpus do not accept any jump or instructions with long immediate into the delay slots. gas/ 2017-06-07 Claudiu Zissulescu <claziss@synopsys.com> * /config/tc-arc.c (is_br_jmp_insn_p): Update macro with known instructions to be accounted as jumps. (assemble_insn): Check for limms into the delay slots. Emit an error if so. * testsuite/gas/arc/asm-errors-3.d: New file. * testsuite/gas/arc/asm-errors-3.err: Likewise. * testsuite/gas/arc/asm-errors-3.s: Likewise.
2017-06-26Automatic date update in version.inGDB Administrator1-1/+1
2017-06-26Don't attach linker created section to --just-syms bfdAlan Modra4-8/+59
All sections on a --just-syms bfd are discarded from the output, so attaching linker created sections to such a bfd results in errors. In other cases, like the .note.GNU-stack check, it's wrong to have a --just-syms object potentially affect the output. bfd/ * elflink.c (_bfd_elf_link_create_dynstrtab): Don't make dynobj a --just-syms bfd. (_bfd_elf_size_group_sections): Skip --just-syms bfds. (bfd_elf_size_dynamic_sections): Ignore .note.GNU-stack and .preinit_array on --just-syms bfds. (_bfd_elf_gc_mark_extra_sections): Skip --just-syms bfds. (elf_gc_sweep, bfd_elf_parse_eh_frame_entries): Likewise. (bfd_elf_gc_sections, bfd_elf_discard_info): Likewise. ld/ * emultempl/elf32.em (gld${EMULATION_NAME}_after_open): Skip --just-syms bfds when looking for a place to attach .note.gnu.build-id and .eh_frame_hdr sections. Delete dead code.
2017-06-25main: Don't add int to stringSimon Marchi2-1/+6
clang shows this warning: /home/emaisin/src/binutils-gdb/gdb/main.c:227:56: error: adding 'int' to a string does not append to the string [-Werror,-Wstring-plus-int] char *tmp_sys_gdbinit = xstrdup (SYSTEM_GDBINIT + datadir_len); ~~~~~~~~~~~~~~~^~~~~~~~~~~~~ /home/emaisin/src/binutils-gdb/gdb/main.c:227:56: note: use array indexing to silence this warning char *tmp_sys_gdbinit = xstrdup (SYSTEM_GDBINIT + datadir_len); ^ & [ ] It's quite easy to get rid of it by using &foo[len] instead of foo + len. I think this warning is relevant to keep enabled, because it can be an easy mistake to do. This warning is already discussed here in GCC bugzilla: https://gcc.gnu.org/ml/gcc-patches/2017-06/msg00729.html and a patch series for it was submitted very recently. gdb/ChangeLog: * main.c (get_init_files): Replace "SYSTEM_GDBINIT + datadir_len" with "&SYSTEM_GDBINIT[datadir_len]".
2017-06-25dtrace-probe: Put semicolon after while on its own lineSimon Marchi2-1/+7
clang shows this warning. /home/emaisin/src/binutils-gdb/gdb/dtrace-probe.c:424:52: error: while loop has empty body [-Werror,-Wempty-body] while (*p++ != '\0' && p - strtab < strtab_size); ^ /home/emaisin/src/binutils-gdb/gdb/dtrace-probe.c:424:52: note: put the semicolon on a separate line to silence this warning Putting the semicolon on its own line is not a big sacrifice to get rid of this warning. I think it's also useful to keep this, because it can catch errors like this: while (something); { ... } although gcc would warn about it in a different way (misleading indentation). This warning is already discussed here in the GCC bugzilla: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62184 gdb/ChangeLog: * dtrace-probe.c (dtrace_process_dof_probe): Put semi-colon on its own line.
2017-06-25x86-dregs: Print debug registers one per lineSimon Marchi2-10/+10
This get around this warning given by clang... /home/emaisin/src/binutils-gdb/gdb/nat/x86-dregs.c:209:7: error: variable 'i' is incremented both in the loop header and in the loop body [-Werror,-Wfor-loop-analysis] i++; ^ /home/emaisin/src/binutils-gdb/gdb/nat/x86-dregs.c:199:32: note: incremented here ALL_DEBUG_ADDRESS_REGISTERS (i) ^ ... I decided in the end to simply print the debug registers one per line. I don't think it particularly helps readability to have them two per line anyway. gdb/ChangeLog: * nat/x86-dregs.c (x86_show_dr): Print registers one per line.
2017-06-25Sync libiberty with upstream GCC.Iain Buclaw3-255/+586
libiberty/ChangeLog: * d-demangle.c (dlang_identifier): Prefix mangled init symbols with `initializer for'. * testsuite/demangle-expected: Update tests. * d-demangle.c (dlang_call_convention_p): Move declaration before dlang_type. (dlang_type): Handle function types. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (dlang_parse_real): Remove stack buffer, write the demangled hexadecimal directly to string. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (dlang_hexdigit): New function. (ascii2hex): Remove function. (dlang_parse_string): Update to call dlang_hexdigit. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (strtol): Remove declaration. Updated all callers to use dlang_number. (dlang_number): New function. (dlang_value): Moved check for ISDIGIT into dlang_parse_integer. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (dlang_parse_symbol): Remove function. (dlang_parse_qualified): New function. (dlang_parse_mangle): New function. (dlang_type): Update to call dlang_parse_qualified. (dlang_identifier): Update to call either dlang_parse_qualified or dlang_parse_mangle. (dlang_type_modifier_p): Remove function. (dlang_call_convention_p): Don't allow type modifiers in mangle. (dlang_template_args): Update to call dlang_identifier. (dlang_demangle): Update to call dlang_parse_mangle. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (dlang_value): Add comment explaining why cases for digits are required. * testsuite/d-demangle-expected: Update integer value tests. * d-demangle.c (dlang_parse_symbol): Skip over anonymous symbols. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (dlang_identifier): Handle template constraint symbols. (dlang_parse_template): Only advance if template symbol prefix is followed by a digit. * testsuite/d-demangle-expected: Add tests. * d-demangle.c (dlang_attributes): Handle scope attributes. * testsuite/d-demangle-expected: Add tests.
2017-06-25Sync libiberty with upstream GCC.Iain Buclaw5-25/+69
libiberty/ChangeLog: PR demangler/80513 * cp-demangle.c (d_number): Check for overflow. * cplus-dem.c (consume_count): Fix overflow check. (gnu_special): Check for underscore after thunk delta. * testsuite/demangle-expected: Add tests for overflows and invalid characters in thunks. * cp-demangle.c (MAX_RECURSION_COUNT): New constant. (struct d_print_info): Add recursion field. (d_print_init): Initialize recursion. (d_print_comp): Check and update d_print_info recursion depth. * cp-demangle.c (d_substitution): Return NULL if d_add_substitution fails. * cp-demangle.h (struct d_info): Remove did_subs field. * cp-demangle.c (struct d_info_checkpoint): Likewise. (d_template_param): Don't update did_subs. (d_substitution): Likewise. (d_checkpoint): Don't assign did_subs. (d_backtrack): Likewise. (cplus_demangle_init_info): Don't initialize did_subs.
2017-06-25fix out-of-bounds access in elf.c:find_linkSergei Trofimovich2-2/+8
The out-of-bounds access is reproducible on 'ia64-strip' command (see sample from https://bugs.gentoo.org/show_bug.cgi?id=622500) The output file contains less section than original one. This tricks 'hint' access to go out-of-bounds: * elf.c (find_link): Bounds check "hint".
2017-06-25Automatic date update in version.inGDB Administrator1-1/+1
2017-06-24[ARM] Add support for ARM Cortex-R52 processorThomas Preud'homme4-1/+12
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to add support for ARM Cortex-R52 processor. === Patch description === This patch adds support for Cortex-R52 as an ARMv8-R processor with CRC extensions. 2017-06-26 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * NEWS: Mention support of ARM Cortex-R52 processor. * config/tc-arm.c (arm_cpus): Add entry for ARM Cortex-R52 processor. * doc/c-arm.texi: Mention support for -mcpu=cortex-r52.
2017-06-24[ARM] Add linker support for ARMv8-RThomas Preud'homme10-17/+97
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to add support for ARMv8-R in the linker. === Patch description === This patch is composed of 3 changes: 1) The main change is the addition of the logic for merging a file whose Tag_CPU_arch build attribute is 15 (ARMv8-R). Namely, all pre-ARMv8 are merged into ARMv8-R as well as ARMv8-R itself. ARMv8-A (14) merges into ARMv8-A. ARMv8-M Baseline (16) and Mainline (17) are not allowed to merge merge with ARMv8-R. Note that merging only occurs if the two profiles are identical or one is S (Application or Realtime) and the other is R. 2) using_thumb_only, using_thumb2_bl, using_thumb2 and arch_has_arm_nop are updated according to capabilities of ARMv8-R and their BFD_ASSERT updated to reflect that the logic is valid for ARMv8-R. 3) 2 build attribute merging tests are added to test the first change. 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb_only): Update list of architectures in BFD_ASSERT for which the logic is valid. (using_thumb2_bl): Likewise. (using_thumb2): Likewise and return true for ARMv8-R. (arch_has_arm_nop): Likewise. (tag_cpu_arch_combine): New v8r table for ARMv8-R Tag_CPU_arch merging logic. Update commentis for value 15 of v8m_baseline, v8m_mainline and v4t_plus_v6_m arrays. Use v8r array to decide merging of value 15 of Tag_CPU_arch. ld/ * testsuite/ld-arm/arm-elf.exp (EABI attribute merging 11): New test. (EABI attribute merging 12): Likewise. * testsuite/ld-arm/attr-merge-11a.s: New file. * testsuite/ld-arm/attr-merge-11b.s: New file. * testsuite/ld-arm/attr-merge-11.attr: New file. * testsuite/ld-arm/attr-merge-12a.s: New file. * testsuite/ld-arm/attr-merge-12b.s: New file. * testsuite/ld-arm/attr-merge-12.attr: New file.
2017-06-24[ARM] Add support for ARMv8-R in assembler and readelfThomas Preud'homme46-134/+737
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to add support for ARMv8-R in GAS: instructions, build attributes and readelf. === Patch description === Although some differences exist for system registers, from GAS point of view ARMv8-R supports the same instructions as ARMv8-A Aarch32 state and a subset of its extensions. This patch therefore introduce a new feature bit to distinguish the availability of the pan, ras and rdma extensions between ARMv8-A and ARMv8-R and allow crypto, fp and simd extensions to be used by ARMv8-R. Most of the changes are then in the testsuite to (i) rename source files and error output to be shared between ARMv8-A and ARMv8-R, (ii) rename files with expected output for ARMv8-A build attributes and (iii) add new files with expected output for ARMv8-R build attributes. 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> binutils/ * readelf.c (arm_attr_tag_CPU_arch): Fill value for ARMv8-R. gas/ * NEWS: Mention support for ARMv8-R architecture. * config/tc-arm.c (arm_archs): Add entry for ARMv8-R. (arm_extensions): Restrict pan, ras and rdma extension to ARMv8-A and make crypto, fp and simd extensions available to ARMv8-R. (cpu_arch_ver): Add entry for ARMv8-R. (aeabi_set_public_attributes): Update gas_assert for Tag_DIV_use logic. * testsuite/gas/arm/armv8-a+fp.s: Rename into ... * testsuite/gas/arm/armv8-ar+fp.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a+fp.d: Specify source to assemble and architecture to assemble for. * testsuite/gas/arm/armv8-r+fp.d: New. * testsuite/gas/arm/armv8-a+simd.s: Rename into ... * testsuite/gas/arm/armv8-ar+simd.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a+simd.d: Specify source to assemble and architecture to assemble for. * testsuite/gas/arm/armv8-r+simd.d: New. * testsuite/gas/arm/armv8-a-bad.s: Rename into ... * testsuite/gas/arm/armv8-ar-bad.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a-bad.l: Rename into ... * testsuite/gas/arm/armv8-ar-bad.l: This. Decrement line number by 1. * testsuite/gas/arm/armv8-a-bad.d: Specify source to assemble, architecture to assemble for and adjust error output file. * testsuite/gas/arm/armv8-r-bad.d: New. * testsuite/gas/arm/armv8-a-barrier.s: Rename into ... * testsuite/gas/arm/armv8-ar-barrier.s: This. * testsuite/gas/arm/armv8-a-barrier-arm.d: Adjust source. * testsuite/gas/arm/armv8-a-barrier-thumb.d: Likewise. * testsuite/gas/arm/armv8-r-barrier-arm.d: New. * testsuite/gas/arm/armv8-r-barrier-thumb.d: New. * testsuite/gas/arm/armv8-a-it-bad.s: Rename into ... * testsuite/gas/arm/armv8-ar-it-bad.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a-it-bad.l: Rename into ... * testsuite/gas/arm/armv8-ar-it-bad.l: This. Decrement line number by 1. * testsuite/gas/arm/armv8-a-it-bad.d: Specify source to assemble, architecture to assemble for and adjust error output file. * testsuite/gas/arm/armv8-r-it-bad.d: New. * testsuite/gas/arm/armv8-a.s: Rename into ... * testsuite/gas/arm/armv8-ar.s: This. Remove .arch directive. * testsuite/gas/arm/armv8-a.d: Specify source to assemble and architecture to assemble for. * testsuite/gas/arm/armv8-r.d: New. * testsuite/gas/arm/attr-march-armv8-r+crypto.d: New. * testsuite/gas/arm/attr-march-armv8-r+fp.d: New. * testsuite/gas/arm/attr-march-armv8-r+simd.d: New. * testsuite/gas/arm/attr-march-armv8-r.d: New. * testsuite/gas/arm/crc32.s: Rename into ... * testsuite/gas/arm/crc32-armv8-ar.s: This. * testsuite/gas/arm/crc32.d: Rename into ... * testsuite/gas/arm/crc32-armv8-a.d: This. Specify source to assemble. * testsuite/gas/arm/crc32-armv8-r.d: New. * testsuite/gas/arm/crc32-bad.s: Rename into ... * testsuite/gas/arm/crc32-armv8-ar-bad.s: This. * testsuite/gas/arm/crc32-bad.d: Rename into ... * testsuite/gas/arm/crc32-armv8-a-bad.d: This. Specify source to assemble. * testsuite/gas/arm/crc32-armv8-r-bad.d: New. * testsuite/gas/arm/mask_1.s: Rename into ... * testsuite/gas/arm/mask_1-armv8-ar.s: This. * testsuite/gas/arm/mask_1.d: Rename into ... * testsuite/gas/arm/mask_1-armv8-a.d: This. Specify source to assemble. * testsuite/gas/arm/mask_1-armv8-r.d: new. include/ * elf/arm.h (TAG_CPU_ARCH_V8R): New macro. * opcode/arm.h (ARM_EXT2_V8A): New macro. (ARM_AEXT2_V8A): Rename into ... (ARM_AEXT2_V8AR): This. (ARM_AEXT2_V8A): New macro. (ARM_AEXT_V8R): New macro. (ARM_AEXT2_V8R): New macro. (ARM_ARCH_V8R): New macro.
2017-06-24[ARM] Remove ARMv6S-M special casingThomas Preud'homme4-31/+39
=== Context === This patch is part of a patch series to add support for ARMv8-R architecture. Its purpose is to remove special casing for ARMv6S-M autodetection. === Motivation === Currently, SWI and SVC mnemonics are enabled for ARMv4T and successor architectures with extra checks in the handler function (do_t_swi) to give an error message when ARMv6-M is targeted and some more special casing in aeabi_set_public_attributes. This was made to exclude these mnemonics for ARMv6-M unless the OS extension is in use. However this logic is superfluous: there is already code to check whether an instruction is available based on the feature bit it is part of and whether the targeted architecture has that feature bit. This patch aims at removing that unneeded complexity. === Patch description === The OS extension is already limited to the ARMv6-M architecture so all this patch does is redefined availability of the ARM_EXT_OS feature bit to not be present for ARM_ARCH_V6M. ARM_ARCH_V6SM does not need any change either because it already includes ARM_EXT_OS. The patch also make sure that the error message that was given by do_t_swi when SWI/SVC is unavailable is still the same by detecting the situation in md_assemble. 2017-06-24 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * config/tc-arm.c (arm_ext_v6m): Delete. (arm_ext_v7m): Delete. (arm_ext_m): Remove ARM_EXT_OS from the set of feature defined M profile. (arm_arch_v6m_only): Delete. (do_t_swi): Remove special case for ARMv6S-M. (md_assemble): Display error message previously in do_t_swi when SVC is not available. (insns): Guard swi and svc by arm_ext_os for Thumb mode. (aeabi_set_public_attributes): Remove special case for ARMv6S-M. include/ * opcode/arm.h (ARM_AEXT_V4TxM): Add ARM_EXT_OS bit to the set. (ARM_AEXT_V4T): Likewise. (ARM_AEXT_V5TxM): Likewise. (ARM_AEXT_V5T): Likewise. (ARM_AEXT_V6M): Mask off ARM_EXT_OS bit.
2017-06-24Automatic date update in version.inGDB Administrator1-1/+1
2017-06-23RISC-V: Fix SLTI disassemblyAndrew Waterman2-2/+7
2017-06-23 Andrew Waterman <andrew@sifive.com> * riscv-opc.c (riscv_opcodes): Mark I-type SLT instruction as an alias; do not mark SLTI instruction as an alias.
2017-06-23RISC-V: Error, don't warn, for shfit amounts/CSRsAndrew Waterman2-8/+13
gas/ChangeLog 2017-05-11 Andrew Waterman <andrew@sifive.com> * config/tc-riscv.c (riscv_ip): Changes as_warn to as_bad for improper shift amounts.
2017-06-23[AArch64] Fix typo in comments on relocation nameJiong Wang3-4/+10
BFD_RELOC_AARCH64_ADR_GOTPAGE should be BFD_RELOC_AARCH64_ADR_GOT_PAGE. bfd/ * reloc.c (BFD_RELOC_AARCH64_ADR_GOTPAGE): Rename to BFD_RELOC_AARCH64_ADR_GOT_PAGE * bfd-in2.h: Regenerated.
2017-06-23[GOLD] PowerPC64 localentry:0 plt call optimizationAlan Modra6-11/+149
elfcpp/ * elfcpp.h (DT_PPC64_OPT): Define. * powerpc.h (PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC, PPC64_OPT_LOCALENTRY): Define. gold/ * options.h (General_options): Add plt_localentry. * powerpc.cc (Target_powerpc::st_other): New function. (Target_powerpc::plt_localentry0_, plt_localentry0_init_, has_localentry0_): New vars. (Target_powerpc::plt_localentry0, set_has_localentry0, is_elfv2_localentry0): New functions. (Target_powerpc::Branch_info::mark_pltcall): Don't set tocsave or return true for localentry:0 calls. (Stub_table::Plt_stub_ent::localentry0_): New var. (Stub_table::add_plt_call_entry): Set localentry0_ and has_localentry0_. Don't set r2save_ for localentry:0 calls. (Output_data_glink::do_write): Save r2 in __glink_PLTresolve for elfv2. (Target_powerpc::scan_relocs): Default plt_localentry0_. (Target_powerpc::do_finalize_sections): Set DT_PPC64_OPT. (Target_powerpc::Relocate::relocate): Don't require nop following calls for localentry:0 plt calls, and don't change nop.
2017-06-23[GOLD] PowerPC64 tocsaveAlan Modra3-65/+254
This adds support to gold for the tocsave relocs already supported by ld.bfd. R_PPC64_TOCSAVE relocs are part of a scheme to move r2 saves to the prologue of a function rather than in each plt call stub. We don't want a compiler to always emit the r2 save, as this would be wasted if the calls turned out to be local. See the tocsave*.s in ld/testsuite/ld-powerpc/. * powerpc.cc (Target_powerpc::tocsave_loc_): New var. (Target_powerpc::mark_pltcall, add_tocsave, tocsave_loc): New functions. (Target_powerpc::Branch_info::tocsave_): New var. (Target_powerpc::Branch_info::mark_pltcall): New function. (Target_powerpc::Branch_info::make_stub): Pass tocsave_ to add_plt_call_entry. (Stub_table::Plt_stub_ent): Make public. Add r2save_. (Stub_table::add_plt_call_entry): Add bool tocsave_ param. Set r2save_. (Stub_table::find_plt_call_entry): Return Plt_stub_ent*. Adjust use throughout. (Stub_table::do_write): Conditionally output r2 save in plt stubs. (Target_powerpc::Scan::local): Handle R_PPC64_TOCSAVE. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Skip r2 save in plt call stub with tocsave reloc. Replace header tocsave nop with r2 save. * symtab.h (struct Symbol_location_hash): Make public.
2017-06-23Make the strings utility reject directories.Nick Clifton2-0/+11
PR binutils/21659 * strings.c (strings_file): Warn about attempts to run strings on a directory.
2017-06-23Add XTENSA_MAX_REGISTER_SIZEAlan Hayward2-2/+11
gdb/ * xtensa-tdep.c (XTENSA_MAX_REGISTER_SIZE): Add. (xtensa_register_write_masked): Use XTENSA_MAX_REGISTER_SIZE. (xtensa_register_read_masked): Likewise.
2017-06-23S/390: Add support for pgste markerAndreas Krebbel10-1/+217
This patch adds a new S/390 specific segment type: PT_S390_PGSTE. For binaries marked with that segment the kernel will allocate 4k page tables. The only user so far will be qemu. ld/ChangeLog: 2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * Makefile.in: Add s390.em as build dependency. * emulparams/elf64_s390.sh (EXTRA_EM_FILE): Add s390.em. * emultempl/s390.em: New file. * gen-doc.texi: Add documentation for --s390-pgste option. * ld.texinfo: Likewise. include/ChangeLog: 2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elf/s390.h (PT_S390_PGSTE): Define macro. binutils/ChangeLog: 2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * readelf.c (get_s390_segment_type): Add support for the new segment type PT_S390_PGSTE. (get_segment_type): Call get_s390_segment_type. elfcpp/ChangeLog: 2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elfcpp.h (enum PT): Add PT_S390_PGSTE to enum. bfd/ChangeLog: 2017-06-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elf-s390.h: New file. * elf64-s390.c (struct elf_s390_link_hash_table): Add params field. (elf_s390_additional_program_headers): New function. (elf_s390_modify_segment_map): New function. (bfd_elf_s390_set_options): New function. (elf_backend_additional_program_headers) (elf_backend_modify_segment_map): Add macro definitions.
2017-06-23Automatic date update in version.inGDB Administrator1-1/+1
2017-06-22i386: Add hidden weak undefined testsH.J. Lu3-0/+47
* testsuite/ld-i386/i386.exp: Run weakundef1 tests. * testsuite/ld-i386/weakundef1.c: New file.
2017-06-22x86-64: Move the error_alignment label forwardH.J. Lu2-7/+14
Move the error_alignment label forward to avoid clang warning on if (!bfd_set_section_alignment (ebfd, sec, 2)) goto error_alignment; htab = elf_x86_64_hash_table (info); error_alignment: info->callbacks->einfo (_("%F%A: failed to align section\n"), sec); "%F" causes a fatal linker error and immediate exit. sec = htab->elf.sgotplt; Also fix alignment on program property note section. * elf64-x86-64.c (elf_x86_64_link_setup_gnu_properties): Move the error_alignment label forward. Properly align program property note section.
2017-06-22Pass $NOPIE_CFLAGS to ELF visibility testsH.J. Lu2-2/+9
PR ld/21090 * testsuite/ld-elfvsb/elfvsb.exp (visibility_run): Pass $NOPIE_CFLAGS if non-PIE is required.
2017-06-22x86: Resolve local undefined weak symbol to 0H.J. Lu3-10/+20
Local undefined weak symbol should always be resolved to 0. * elf32-i386.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Resolve local undefined weak symbol to 0. * elf64-x86-64.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Likewise.
2017-06-22Update comment on gdb_environ::unsetSergio Durigan Junior2-1/+5
gdb_environ::unset iterates using '.end () - 1' now, instead of '.cend () - 1'. This obvious patch updates the comment. gdb/ChangeLog: 2017-06-22 Sergio Durigan Junior <sergiodj@redhat.com> * common/environ.c (gdb_environ::unset): Update comment.
2017-06-222017-06-22 Eric Christopher <echristo@gmail.com>Eric Christopher2-1/+6
* elf32-arm.c (elf32_arm_final_link_relocate): Use labs rather than abs to fix a truncation warning.
2017-06-22Pass $NOPIE_CFLAGS/$NOPIE_LDFLAGS to "Run pr19031"H.J. Lu2-2/+9
PR ld/21090 * testsuite/ld-i386/i386.exp: Pass $NOPIE_CFLAGS and $NOPIE_LDFLAGS to "Run pr19031".
2017-06-22Pass $NOPIE_CFLAGS and $NOPIE_LDFLAGS to more ELF testsH.J. Lu5-19/+38
PR ld/21090 * testsuite/ld-gc/gc.ex: Compile tmpdir/pr14265.o with $NOPIE_CFLAGS. * testsuite/ld-i386/i386.exp: Pass $NOPIE_CFLAGS and $NOPIE_LDFLAGS if non-PIE is required. * testsuite/ld-i386/no-plt.exp (NOPIE_CFLAGS): New. (NOPIE_LDFLAGS): Likewise. Pass $NOPIE_LDFLAGS if non-PIE is required. * testsuite/ld-shared/shared.exp: Compile tmpdir/sh1np.o with $NOPIE_CFLAGS.
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