Age | Commit message (Collapse) | Author | Files | Lines |
|
* elf32-i386.c (elf_i386_relocate_section): Resolve R_386_TLS_LDO_32
to st_value + addend in non-code sections.
* elf64-x86-64.c (elf64_x86_64_relocate_section): Resolve
R_X86_64_DTPOFF32 to st_value + addend in non-code sections.
ld/testsuite/
* ld-i386/i386.exp: Add tlsg test.
* ld-i386/tlsg.s: New test.
* ld-i386/tlsg.sd: New test.
* ld-i386/tlsbin.dd: Change LD into LD -> LE in comments.
* ld-i386/tlsbinpic.s: Likewise.
* ld-x86-64/x86-64.exp: Add tlsg test.
* ld-x86-64/tlsg.s: New test.
* ld-x86-64/tlsg.sd: New test.
* ld-x86-64/tlsbin.dd: Change LD into LD -> LE in comments.
* ld-x86-64/tlsbinpic.s: Likewise.
|
|
(TC_FORCE_RELOCATION): Tidy arg.
|
|
* gas/mips/mips.exp: Undo the last change.
|
|
* readelf.c (get_machine_flags): Handle E_MIPS_MACH_4120,
E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
|
|
* mips-tdep.c (mips_frame_saved_pc): When a generic dummy frame,
use frame_unwind_signed_register to obtain the PC.
(mips_frame_chain): Handle a generic dummy frame.
(mips_init_extra_frame_info): When a generic dummy frame, don't
re-compute the frame base.
(mips_pop_frame): Handle generic dummy frames.
(mips_gdbarch_init): When generic dummy frames, set
use_generic_dummy_frames, push_dummy_frame to
generic_push_dummy_frame, pc_in_call_dummy to
generic_pc_in_call_dummy, and save_dummy_frame_top_of_stack to
generic_save_dummy_frame_tos.
|
|
* blockframe.c (generic_find_dummy_frame): Rewrite. Only test
against TOP when TOP was explictly set.
(generic_push_dummy_frame): Set TOP to zero.
|
|
* gas/mips/vr4120.d: Use "#pass" instead of "#..." to skip the
rest of output.
|
|
|
|
|
|
* event-loop.c (start_event_loop): Rename variable 'result' to
'gdb_result', to avoid conflicts with upcoming intepreters changes.
|
|
* gas/mips/mips.exp: Set xfail on empic, empic2, empic3_g1 and
empic3_g2 on Linux/mips.
|
|
* gas/mips/vr4120.d: Pass -m mips:4120 to objdump.
|
|
* mi-out.c (mi_version): New function.
* mi-out.h (mi_version): Declare.
|
|
* simops.c (OP_E6077E0): And op1 with 7 after reading register, not
before.
(BIT_CHANGE_OP): Likewise.
|
|
* gdb-events.c: Regenerated.
* gdb-events.h: Regenerated.
|
|
|
|
* disasm.h: New file.
* mi/mi-cmd-disas.c (gdb_dis_asm_read_memory): Moved to disasm.c.
(compare_lines): Ditto.
(dump_insns): Ditto.
(do_mixed_source_and_assembly): Moved to disasm.c. Added uiout argument. (do_assembly_only): Ditto.
(do_disassembly): Renamed to gdb_disassembly and moved to disasm.c.
Sdded uiout argument.
* Makefile.in: Add new files. Reorder SFILES list. Update dependencies. Include libgdb.a later in the insight executable.
|
|
|
|
* doc/c-mips.texi: Add entries for -march=vr4120,vr4130,vr4181,
vr5400 and vr5500. Add entry for -mfix-vr4122-bugs.
* config/tc-mips.c (CPU_HAS_DROR, CPU_HAS_ROR): New macros.
(hilo_interlocks): True for CPU_VR5500.
(gpr_interlocks, cop_interlocks): True for CPU_VR5400 and CPU_VR5500.
(mips_fix_vr4122_bugs): New.
(append_insn): Work around 4122 errors if mips_fix_vr4122_bugs.
(mips_emit_delays): Likewise.
(macro2) [M_DROLI]: Use dror or dror32 if CPU_HAS_DROR.
[M_ROLI]: Likewise ror if CPU_HAS_ROR.
(validate_mips_insn, mips_ip): Handle '[', ']', 'e' and '%'.
(OPTION_FIX_VR4122, OPTION_NO_FIX_VR4122): New options.
(md_longopts): Add -mfix-vr4122-bugs and -no-mfix-vr4122-bugs.
(OPTION_ELF_BASE): Bump.
(md_parse_option): Handle the new options.
(mips_cpu_info_table): Add entries for vr4120, vr4130, vr4181,
vr5400 and vr5500.
[gas/testsuite/]
* gas/mips/mips4100.[sd]: Move dmadd16 and madd16 checks to...
* gas/mips/vr4111.[sd]: ...this new test.
* gas/mips/vr4120.[sd],
* gas/mips/vr4122.[sd],
* gas/mips/vr5400.[sd],
* gas/mips/vr5500.[sd]: New tests.
* mips.exp: Run them.
|
|
* mips.h: Update comment for new opcodes.
(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
Don't match CPU_R4111 with INSN_4100.
[opcodes/]
* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
and bfd_mach_mips5500.
* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
(N411, N412, N5, N54, N55): New convenience defines.
(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
Change dmadd16 and madd16 from V1 to N411.
|
|
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.
[bfd/]
* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
(bfd_mach_mips5500): New.
* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
(arch_info_struct): Add corresponding entries here.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
bfd_mach_mips5400 and bfd_mach_mips5500.
(_bfd_mips_elf_mach_extends_p): New function.
(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
the EF_MIPS_MACH flags.
* bfd-in2.h: Regenerate.
|
|
|
|
* scripttempl/elfm68hc11.sc: Likewise.
* scripttempl/elfm68hc12.sc: Likewise.
|
|
Correct z3/Z3 description. Correct z4/Z4 title.
|
|
* config/tc-mips.c (md_apply_fix3): Subtract the symbol value
twice if howto->pcrel_offset is true.
|
|
|
|
* ld-powerpc/powerpc.exp: New.
|
|
|
|
* ld-i386/i386.exp: Run new test.
|
|
reloc sections just before .rel.plt/.rela.plt.
(gld${EMULATION_NAME}_place_orphan <.rel>): Remove combreloc code.
Only put loadable reloc sections in hold_rel.
|
|
* tui.c (tui_show_source): Don't access current_source_symtab, use
accessor function instead. Include source.h and symtab.h
* tuiDisassem.c (tuiShowDisassemAndUpdateSource,
tuiVerticalDisassemScroll): Use accessor functions for current
source line and symtab. Include source.h.
* tuiLayout.c (_extractDisplayStartAddr): Use accessor functions
for current source line and symtab. Include source.h.
* tuiWin.c (_makeVisibleWithNewHeight): Ditto.
* tuiSourceWin.c (tuiUpdateSourceWindowAsIs,
tuiHorizontalSourceScroll): Ditto.
* tuiSource.c (tuiVerticalSourceScroll): Ditto.
|
|
|
|
|
|
* ld/emulparams/elf32ppc.sh (OTHER_GOT_RELOC_SECTIONS): New.
* ld/emulparams/elf32ppclinux.sh (OTHER_GOT_RELOC_SECTIONS): New.
|
|
Revert below (note that src does not contain Makefile.tpl):
* Makefile.tpl: Make subsituted variables more autoconfy.
* Makefile.in: Regenerate.
|
|
* config/djgpp/fnchange.lst: Rename bfd/elf64-alpha.c and
bfd/elf64-alpha-fbsd.c.
|
|
* config/djgpp/fnchange.lst: Rename i386gnu-nat.c and
i386gnu-tdep.c.
|
|
* configure: Revert accidentally applied changes.
|
|
* Makefile.tpl: Make more autoconf-friendly.
* Makefile.in: Regenerate.
* configure: Make substitution more autoconf-like.
2002-09-28 Richard Earnshaw <rearnsha@arm.com>
* configure.in (arm-*-coff, strongarm-*-coff, xscale-*-coff): Use a
single entry to handle all these.
(arm-*-elf, strongarm-*-elf, xscale-*-elf): Likewise. Also enable
libjava on arm-*-elf.
|
|
|
|
|
|
|
|
|
|
.got sections.
|
|
convert undefined references to GOT32/PLT32 if PIC code is
requested. Fix comment.
|
|
(sh_push_arguments): Store in register with correct endianess.
(sh_default_store_return_value): Ditto.
(sh_gdbarch_init): Set sizeof long double to 8.
|
|
writable section in the same page as end of read-only section.
|
|
things that depend on them.
|
|
path optional since not all compilers emit this debug information.
* gdb.base/shlib-call.exp (step inside shr2): Don't fail if first
step ends up stepping out of the function instead of stopping on
the epilogue.
|
|
* config/tc-sh.c (sh_force_relocation): Return 0 for
some PC relative relocations when not relaxing.
* testsuite/gas/sh/pcrel2.s: New.
* testsuite/gas/sh/pcrel2.d: New.
* testsuite/gas/sh/basic.exp: Add pcrel2 test.
|