Age | Commit message (Collapse) | Author | Files | Lines |
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* sparc-tdep.c (sparc-frame-chain): Fix typo in comment.
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* arch-utils.c (default_frame_address): New function. Default
implementation of frame_args_address and frame_locals_address.
* arch-utils.h (default_frame_address): Export.
* d10v-tdep.c (d10v_gdbarch_init): Use default_frame_address.
(d10v_frame_args_address, d10v_frame_locals_address): Delete.
* sh-tdep.c (sh_gdbarch_init): Use default_frame_address.
(sh_frame_args_address, sh_frame_locals_address): Delete.
* sparc-tdep.c (sparc_gdbarch_init): Use default_frame_address.
(sparc_frame_address): Delete.
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* peicode.h: Fix formatting.
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* pc532-mach.c: Fix formatting.
* pe-arm.c: Likewise.
* pe-i386.c: Likewise.
* pe-mips.c: Likewise.
* pe-ppc.c: Likewise.
* pe-sh.c: Likewise.
* pei-mips.c: Likewise.
* pei-sh.c: Likewise.
* ppcboot.c: Likewise.
* ptrace-core.c: Likewise.
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2001-01-02 Richard Sandiford <rsandifo@redhat.com>
* cgen-dis.c (hash_insn_array): Use bfd_put_bits().
(hash_insn_list): Likewise
* cgen-ibld.in (insert_1): Use bfd_put_bits() and bfd_get_bits().
(extract_1): Use bfd_get_bits().
(extract_normal): Apply sign extension to both extraction
methods.
* cgen-opc.c (cgen_get_insn_value): Use bfd_get_bits()
(cgen_put_insn_value): Use bfd_put_bits()
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* reloc.c: Fix formatting.
* riscix.c: Likewise.
* rs6000-core.c: Likewise.
* xcoff-target.h: Likewise.
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* ld-undefined/weak-undef.exp: New test.
* ld-undefined/weak-undef.s, ld-undefined/weak-undef.t: Supporting
files for above.
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* ld-elfvers/vers.exp: Run test on Linux/ARM.
* ld-elfvsb/elfvsb.exp: Likewise.
* ld-shared/shared.exp: Likewise.
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* gas/arm/adrl.s, gas/arm/pic.s, gas/arm/msr-bad.s: New tests.
* gas/arm/arm.exp: Run them.
* gas/arm/adrl.d, gas/arm/pic.d: Expected results for above.
* gas/arm/arm6.s: Also test uppercase `CPSR' and `SPSR'.
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* listing.c (listing_message): Allocate string only if it is
used.
* configure: Rebuild.
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Point out caveats with generating fixups for the opcode in a frag.
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* NEWS: Add x86_64.
* i386.h (i386_optab): Add "rex*" instructions;
add swapgs; disable jmp/call far direct instructions for
64bit mode; add syscall and sysret; disable registers for 0xc6
template. Add 'q' suffixes to extendable instructions, disable
obsoletted instructions, add new sign/zero extension ones.
(i386_regtab): Add extended registers.
(*Suf): Add No_qSuf.
(q_Suf, wlq_Suf, bwlq_Suf): New.
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* listing.c (calc_hex): Print the variable part only if the
fragment type is rs_fill.
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accurate, at least until we can sync with glibc.
* getopt.c: Ditto.
* getopt1.c: Ditto.
* md5.c: Ditto.
* obstack.c: Ditto.
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TC_LINKRELAX_FIXUP): Fix typos.
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error, by calling bfd_default_set_arch_mach with incoming
values.
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2000-12-28 Frank Ch. Eigler <fche@redhat.com>
* cgen-asm.in (parse_insn_normal): Print better error message for
instructions with missing operands.
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"optimize" the alignment == 0 case.
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* frags.c (NOP_OPCODE): Move default from read.c.
(MAX_MEM_FOR_RS_ALIGN_CODE): New default.
(frag_align_code): New.
* frags.h (frag_align_code): Declare.
* read.c (NOP_OPCODE): Remove.
(do_align): Use frag_align_code.
* write.c (NOP_OPCODE): Remove.
(get_recorded_alignment): New.
(cvt_frag_to_fill): Handle rs_align_test.
(relax_segment): Likewise.
(subsegs_finish): Align last subseg in section to the
section alignment. Use frag_align_code.
* write.h (get_recorded_alignment): Declare.
* config/obj-coff.c (size_section): Handle rs_align_test.
(fill_section, fixup_mdeps): Likewise.
(write_object_file): Use frag_align_code.
* config/tc-alpha.c (alpha_align): Use frag_align_code.
(alpha_handle_align): New.
* config/tc-alpha.h (HANDLE_ALIGN): New.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-i386.h (md_do_align): Use frag_align_code.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-ia64.c (ia64_md_do_align): Don't do code alignment.
(ia64_handle_align): New.
* config/tc-ia64.h (HANDLE_ALIGN): New.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-m32r.c (m32r_do_align): Remove.
(m32r_handle_align): New.
(fill_insn): Use frag_align_code.
* config/tc-m32r.h (md_do_align): Remove.
(HANDLE_ALIGN, MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-m88k.c, config/tc-m88k.h: Similarly.
* config/tc-mips.c, config/tc-mips.h: Similarly.
* config/tc-sh.c (sh_cons_align): Use rs_align_test.
(sh_handle_align): Likewise. Handle rs_align_code.
(sh_do_align): Remove.
* config/tc-sh.h (md_do_align): Remove.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
* config/tc-sparc.c (sparc_cons_align): Use rs_align_test.
(sparc_handle_align): Likewise. Handle rs_align_code.
* config/tc-sparc.h (md_do_align): Remove.
(MAX_MEM_FOR_RS_ALIGN_CODE): New.
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* thread-db.c: Various comment fixes and additions.
Include "bfd.h", "symfile.h" and "objfiles.h".
(keep_thread_db): New variable.
(find_new_threads_callback): Remove prototype.
(thread_db_find_new_threads): New prototype.
(thread_db_push_target, thread_db_unpush_target): Remove
functions.
(deactivate_target): New function.
(thread_db_new_objfile): If OBJFILE == NULL, force deactivation of
target vector. Activate target vector directly instead of calling
thread_db_push_target. Set keep_thread_db if thread library is
detected in the main symbol file. Only enable thread event
reporting if there actually is a child process. Likewise for
detecting new threads, done by calling thread_db_find_new_threads
instead of iterating over the threads ourselves.
(thread_db_detach): Call deactivate_target instead of
thread_db_unpush_target.
(thread_db_wait): Bail out early if we're not debugging the
multi-threaded child process yet.
(thread_db_post_startup_inferior): New function.
(thread_db_mourn_inferior): Call deactivate_target instead of
thread_db_unpush_target.
(init_thread_db_ops): Add thread_db_post_startup_inferior to
thread_db_ops.
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* configure.in (funcs): Add bsearch.
(AC_CHECK_FUNCS): Likewise.
* configure, config.in: Regenerate.
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* vaxnetbsd.c: Fix formatting.
* versados.c: Likewise.
* vms-gsd.c: Likewise.
* vms-hdr.c: Likewise.
* vms-misc.c: Likewise.
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`archive_member_file_ptr's.
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* vms-tir.c: Fix formatting.
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* cgen-trace.c (trace_result): Handle 'f' type operands; output
them to the trace stream using sim_fpu_printn_fpu. Include
"sim-fpu.h".
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* vms.c: Fix formatting.
* vms.h: Likewise.
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* sim-fpu.h (sim_fpu_printn_fpu): Declare.
* sim-fpu.c (print_bits): Add digits parameter. Print only as many
trailing digits as specified (-1 to print all digits).
(sim_fpu_print_fpu): New wrapper around sim_fpu_printn_fpu.
(sim_fpu_printn_fpu): Rename from sim_fpu_print_fpu; update calls
to print_bits ().
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literally. This matches the behaviour of the GNU dynamic linker
more closely.
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when we assemble the first half of a pair.
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* gas/i386/intel.s: Replace "nop" with ".p2align 4,0".
* gas/i386/intel.d: Updated.
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* config/tc-i386.c (reloc): Update the macro for non-bfd
assembler.
(BFD_RELOC_X86_64_GOTPCREL): Set to 0 for non-bfd assembler.
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* dwarf2dbg.c (dwarf2_finish): Remove #if BFD_ASSEMBLER.
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* README: Suggest building in an empty directory.
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* gdb.base/finish.exp: Accept '1' instead of \001 from char_func.
Add a RE to accept a non-ascii char if one is ever presented.
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(i386_extract_return_value): Return directly after issuing the
warning and filling *VALBUF with zeroes if we cannot get at the
floating-point registers.
(i386_store_return_value): New function.
* config/i386/tm-i386.h (STORE_RETURN_VALUE): Simply call
i386_store_return_value.
Add prototype for i386_store_return_value.
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the PTRACE_GETFPXREGS request, and return zero if it's not.
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* TODO: Add pre-uiout code removal to 5.2 cleanups.
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