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2025-01-15gdb: LoongArch: Adjust loongarch_stopped_data_address()Hui Li3-27/+32
loongarch_stopped_data_address() is a common function and will be used by gdb and gdbserver, so move its definition from gdb/loongarch-linux-nat.c to gdb/nat/loongarch-hw-point.c. This is preparation for later gdbserver patch on LoongArch and is no effect for the current code. Signed-off-by: Hui Li <lihui@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
2025-01-15gdb: LoongArch: Adjust loongarch_{get,remove}_debug_reg_state()Hui Li3-30/+24
loongarch_{get,remove}_debug_reg_state() are used as helper functions by loongarch_linux_nat_target. We should move their definitions from gdb/nat/loongarch-linux-hw-point.c to gdb/loongarch-linux-nat.c. Signed-off-by: Hui Li <lihui@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
2025-01-15gdb: LoongArch: Remove loongarch_lookup_debug_reg_state()Hui Li2-18/+0
loongarch_lookup_debug_reg_state() is a unused function, so we can remove it. Signed-off-by: Hui Li <lihui@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
2025-01-15ld: Update gld${EMULATION_NAME}_place_orphan for PE/PEPH.J. Lu2-22/+42
Similar to ldelf_place_orphan, initialize hold from orig_hold at run-time in PE and PEP gld${EMULATION_NAME}_place_orphan. * emultempl/pe.em (orphan_init_done): Make it file scope. (gld${EMULATION_NAME}_finish): Set orphan_init_done to false for the object-only output. (gld${EMULATION_NAME}_place_orphan): Rename hold to orig_hold. Initialize hold from orig_hold at run-time. * emultempl/pep.em (orphan_init_done): Make it file scope. (gld${EMULATION_NAME}_finish): Set orphan_init_done to false for the object-only output. (gld${EMULATION_NAME}_place_orphan): Rename hold to orig_hold. Initialize hold from orig_hold at run-time. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-15ld: Correct ldelf_place_orphanH.J. Lu1-7/+5
Remove the extra for loop and if statement in ldelf_place_orphan. * ldelf.c (ldelf_place_orphan): Remove the extra for loop and if statement. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-15gdb/testsuite: make gdb.reverse/i386-avx-reverse.exp require also avx2Jan Vrany2-0/+46
The test gdb.reverse/i386-avx-reverse.exp requires CPU to have AVX instructions but it actually also uses AVX2 instructions (like vpcmpeqd). This caused the test to fail on CPUs that have AVX but not AVX2. This commit adds check for AVX2. Tested on Intel Xeon CPU E3-1265L (no AVX2) and Intel Core i7-1355U (has AVX2).
2025-01-15bfd_get_unique_section_name leakAlan Modra1-1/+1
The name returned by this function is used in asection->name, so needs to persist until a bfd is closed. * section.c (bfd_get_unique_section_name): Return an alloc'd string.
2025-01-15Free symtab_hdr.contents and a cache_size correctionAlan Modra2-2/+4
symtab_hdr.contents looks to be malloc'd memory, except in one case. Change that one case to also be malloc'd and free when we are done. * elf.c (swap_out_syms): bfd_malloc outbound_syms. (_bfd_elf_free_cached_info): Free symtab_hdr.contents. * elflink.c (init_reloc_cookie): Correct cache_size. locsyms is an array of Elf_Internal_Sym.
2025-01-15elflink.c memory leaksAlan Modra1-67/+27
Many targets leaked parts of the elf_link_hash_table. Fix that by making _bfd_elf_link_hash_table_init set up hash_table_free correctly, so that targets that extend elf_link_hash_table without adding anything that needs freeing, will use _bfd_elf_link_hash_table_free. * elflink.c (elf_link_add_object_symbols): Always free nondeflt_vers. Don't return false without freeing. (_bfd_elf_link_hash_table_init): Set hash_table_free here.. (_bfd_elf_link_hash_table_create): ..rather than here. (elf_link_swap_symbols_out): Don't free strtab here.. (elf_link_add_object_symbols): ..do so here instead. Don't omit freeing on some error return paths.
2025-01-15sframe memory leakAlan Modra1-5/+4
This is another case where an array isn't freed anywhere and needs to persist a while, so allocate it with bfd_alloc. * elf-sframe.c (sframe_decoder_init_func_bfdinfo): Add abfd param. bfd_zalloc std_func_bfdinfo. (_bfd_elf_parse_sframe): Adjust to suit.
2025-01-15eh-frame memory leaksAlan Modra2-6/+8
The set_loc array attached to eh-frame sec_info isn't freed, and is used in _bfd_elf_eh_frame_section_offset. Rather than finding a suitable late stage of linking past any b_e_e_f_s_o use, I decided this might as well persist until the bfd is closed. Some memory is freed in _bfd_elf_discard_section_eh_frame_hdr, but the function isn't always called, so fix that too. * elf-eh-frame.c (_bfd_elf_parse_eh_frame): bfd_alloc the set_loc array. (find_merged_cie): Use bfd_malloc rather than malloc. (_bfd_elf_discard_section_eh_frame_hdr): Move condition under which this function does anything except free memory from.. * elflink.c (bfd_elf_discard_info): ..here.
2025-01-15Fix known minor objdump leakAlan Modra1-2/+4
* objdump.c (main): Free disassembler_options.
2025-01-15gdbserver: convert program_args to a single stringAndrew Burgess8-30/+25
This commit changes how gdbserver stores the inferior arguments from being a vector of separate arguments into a single string with all of the arguments combined together. Making this change might feel a little strange; intuitively it feels like we would be better off storing the arguments as a vector, but this change is part of a larger series of work that aims to improve GDB's inferior argument handling. The full series was posted here: https://inbox.sourceware.org/gdb-patches/cover.1730731085.git.aburgess@redhat.com But asking people to review a 14 patch series in unreasonable, so I'm instead posting the patches in smaller batches. This patch can stand alone, and I do think this change makes sense on its own: First, GDB already stores the inferior arguments as a single string, so doing this moves gdbserver into line with GDB. The common code into which gdbserver calls requires the arguments to be a single string, so currently each target's create_inferior implementation merged the arguments anyway, so all this commit really does is move the merging up the call stack, and store the merged result rather than storing the separate parts. However, the biggest reason for why this commit is needed, is an issue with passing arguments from GDB to gdbserver when starting a new inferior. Consider: (gdb) set args $VAR (gdb) run ... When using a native target the inferior will see the value of $VAR expanded by the shell GDB uses to start the inferior. However, if using an extended-remote target the inferior will see literally $VAR, the unexpanded name of the variable, the reason for this is that, although GDB sends '$VAR' to gdbserver, when gdbserver receives this, it converts this to '\$VAR', which prevents the variable from being expanded by the shell. The reason for this is that construct_inferior_arguments escapes all special shell characters within its arguments, and it is construct_inferior_arguments that is used to combine the separate arguments into a single string. In the future I will change construct_inferior_arguments so that it can apply different escaping strategies. When this happens we will want to escape arguments coming from the gdbserver command line differently than arguments coming from GDB (via a vRun packet), which means we need to call construct_inferior_arguments earlier, at the point where we know if the arguments came from the gdbserver command line, or from the vRun packet. This argument escaping issue is discussed in PR gdb/28392. This commit doesn't fix any issues, nor does it change construct_inferior_arguments to actually do different escaping, that will all come later. This is purely a restructuring. There should be no user visible changes after this commit. Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=28392 Tested-By: Guinevere Larsen <guinevere@redhat.com> Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-15PR32560 stack-buffer-overflow at objdump disassemble_bytesAlan Modra1-4/+6
There's always someone pushing the boundaries. PR 32560 * objdump.c (MAX_INSN_WIDTH): Define. (insn_width): Make it an unsigned long. (disassemble_bytes): Use MAX_INSN_WIDTH to size buffer. (main <OPTION_INSN_WIDTH>): Restrict size of insn_width.
2025-01-15[gdb/symtab] Require current language before symbol lookupsTom de Vries1-0/+41
Test-case gdb.python/py-symbol.exp fails with various target boards, including fission and gold-gdb-index. The problem here is that, in this test, the current language is still unset (i.e., lazy) when the symbol lookup is done. It is eventually set deep in the lookup -- but this then requires a reentrant symbol lookup, which fails. (DWARF symbol lookup is not reentrant.) Fix this by: - detecting symbol lookup reentrance using an assert, and - requiring the current language to be set when entering symbol lookup. Tested on x86_64-linux. Co-Authored-By: Tom Tromey <tom@tromey.com> Approved-By: Tom Tromey <tom@tromey.com> PR symtab/32490 Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=32490
2025-01-15Re: elf: Add GNU_PROPERTY_MEMORY_SEAL gnu propertyAlan Modra9-40/+30
Don't run tests on targets without required support. Supply an explicit -z nomemory-seal rather then relying on the harness default, to lessen confusion for people looking at the test. Don't use numeric labels for the sake of hppa64*-hpux, and run the tests there. Remove incorrect comment about source editing. Also, xfail rather than notarget failing tests with a list of target triples so we check that the list is correct.
2025-01-15Re: ld: Add --enable-memory-seal configure optionAlan Modra1-3/+2
Commit 80dc29527ff9 accidentally removed an assignment to board_flags, resulting in tcl errors 'can't read "board_flags": no such variable' on sh4-linux-gnu. Fix that by calling [get_board_flags] in the condition rather than reinstating the removed line since it seems most configurations don't have a null STATIC_LDFLAGS. Do the same in another similar test too.
2025-01-15Automatic date update in version.inGDB Administrator1-1/+1
2025-01-14Use bool in decode_line_2_itemTom Tromey1-4/+3
This changes decode_line_2_item::selected to bool. There was no benefit to keeping this as a bitfield, so I removed that. Note that the constructor already uses bool here. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14Use bool for parameter of add_sal_to_salsTom Tromey1-8/+8
This changes add_sal_to_sals to use 'bool' rather than 'int'. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14Use filename style in "show" commandsTom Tromey2-4/+10
I found a few filename-related "show" commands that do not use the filename style when displaying the file. This patch fixes the oversight. Approved-By: Andrew Burgess <aburgess@redhat.com>
2025-01-15ld: Parse linker script only onceH.J. Lu3-40/+28
Parsing linker script twice caused FAIL: ld-plugin/lto-3r FAIL: ld-plugin/lto-5r FAIL: PR ld/19317 (2) for x86_64-w64-mingw32 with the linker error: ./ld-new:built in linker script:27 assignment to location counter invalid outside of SECTIONS ldscripts/i386pep.xr has 24 .rdata : 25 { 26 *(.rdata) 27 . = ALIGN(4); 28 /* .ctors & .dtors */ 29 /* .CRT */ 30 /* ___crt_xl_end__ is defined in the TLS Directory support code */ 31 } Remove ld_parse_linker_script to parse linker script only once. * ldlang.c (cmdline_emit_object_only_section): Don't call ld_parse_linker_script. * ldmain.c (main): Fold ld_parse_linker_script. (ld_parse_linker_script): Removed. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-15ld: Call cmdline_check_object_only_section only if plugin is enabledH.J. Lu1-1/+1
* ldmain.c (add_archive_element): Call cmdline_check_object_only_section only if BFD_SUPPORTS_PLUGINS is defined. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-14gdb/jit: fix jit-reader linetable integrityYang Liu2-0/+14
The custom linetable functionality in GDB's JIT Interface has been broken since commit 1acc9dca423f78e44553928f0de839b618c13766. In that commit, linetables were made independent from the objfile, which requires objfile->section_offsets to be initialized. However, section_offsets were never initialized in objfiles generated by GDB's JIT Interface with custom jit-readers, leading to GDB crashes when stepping into JITed code blocks with the following command already executed: jit-reader-load libmygdbjitreader.so This patch fixes the issue by initializing the minimum section_offsets required for linetable parsing procedures. A minimal test is included. The test sets up some very simple line table information, which is enough to trigger the bug. However, the line table information is crafted such that none of the line table entries will end up being displayed in GDB's output when the test is run, as such, none of the expected output actually changes. It might be nice in the future to extend some of the jit tests to actually test hitting line table entries added via the jit reader. Approved-By: Tom Tromey <tom@tromey.com>
2025-01-14gdb/record: add support for AVX floating point arithmetic instructionsGuinevere Larsen3-2/+169
This commit adds support for the following types of instructions relating to floating poitn values: add, mul, sub, min, div, max. These are supported with packed or single values, and single or double precision. Some of the instructions had opcode clashes, however, considering the mechanics of recording the registers is the same on both instructions, this is just marked with a comment. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-01-14gdb/record: add support for floating point vunpck instructionsGuinevere Larsen3-4/+50
This commit adds support for the AVX instructions vunpck[l|h][ps|pd] instructions, which was pretty straightforward. This commit also fixes a mistake in the test, where "record stop" was used after the recording was already stopped, if it failed during vpunpck_test recording. It also improved the documentation at the start of the relevant .c function. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-01-14gdb/record: add support for floating point vmov instructionsGuinevere Larsen3-0/+151
This commit updates GDB's record-full to be able to record vmov[ss|sd] and vmov [u|a] [ps|pd] AVX instructions, and tests for them. Unlike the vmovdq[u|a] instructions, the aligned and unalgined versions of vmov?[ps|pd] have different opcodes. The mechanics of recording them is the same, but the aligned version has opcodes 0x28 and 0x29, while the unaligned has the same opcode as vmov[ss|sd] instruction, 0x10 and 0x11. Approved-By: Guinevere Larsen <guinevere@redhat.com>
2025-01-14ld: regenerateSam James2-10/+9
80dc29527ff9b5179741c360418e77e5064f2b69 contained some changes from non-vanilla autoconf. Regenerate. ChangeLog: * config.in: Regenerate. * configure: Regenerate.
2025-01-14ld: Add --enable-memory-seal configure optionAdhemerval Zanella10-9/+102
Add --enable-memory-seal linker configure option to enable memory sealing (GNU_PROPERTY_MEMORY_SEAL) by default. Change-Id: I4ce4ff33657f0f09b1ceb06210b6fcaa501f1799
2025-01-14elf: Add GNU_PROPERTY_MEMORY_SEAL gnu propertyAdhemerval Zanella18-18/+235
The GNU_PROPERTY_MEMORY_SEAL gnu property is a way to mark binaries to be memory sealed by the loader, to avoid further changes of PT_LOAD segments (such as unmapping or change permission flags). This is done along with Linux kernel (the mseal syscall [1]), and C runtime supports to instruct the kernel on the correct time during program startup (for instance, after RELRO handling). This support is added along the glibc support to handle the new gnu property [2]. This is a opt-in security features, like other security hardening ones like NX-stack or RELRO. The new property is ignored if present on ET_REL objects, and only added on ET_EXEC/ET_DYN if the linker option is used. A gnu property is used instead of DT_FLAGS_1 flag to allow memory sealing to work with ET_EXEC without PT_DYNAMIC support (at least on glibc some ports still do no support static-pie). [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8be7258aad44b5e25977a98db136f677fa6f4370 [2] https://sourceware.org/pipermail/libc-alpha/2024-September/160291.html Change-Id: Id47fadabecd24be0e83cff45653f7ce9a900ecf4
2025-01-14Fix a syntax error in sim/common/cgen-mem.hElla MA1-1/+1
2025-01-14ld: Update mixed LTO and non-LTO relocatable output testsH.J. Lu1-40/+42
Since mixed LTO and non-LTO relocatable output is only supported on ELF platforms, limit these tests to ELF targets. Since powerpc64 elfv1 defines a function symbol on its procedure descriptor, which is in a data section, rather than on the code for that function, allow both D and T for nm test on mixed object. * testsuite/ld-plugin/lto.exp: Limits mixed LTO and non-LTO relocatable output tests to ELF targets. Allow both D and T for nm test on mixed object. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-14aarch64 SFrame: skip with warning new CFI directive used with pauth_lrMatthieu Longo4-0/+65
Today, SFrame v2 specification does not describe how to encode the information corresponding to the PAuth_LR PAC signing method (it only supports PAuth PAC signing method). SFrame v3 specification should hopefully specify it. In the meantime, if the GNU assembler finds .cfi_negate_ra_state_with_pc and --gsframe is specified, it will output a warning to the user and will fail to generate the FDE entry. A new SFrame test for .cfi_negate_ra_state_with_pc is also added to reflect this issue. Approved-by: Indu Bhagat <indu.bhagat@oracle.com>
2025-01-14aarch64 DWARF: add new CFI directive for PAuth_LRMatthieu Longo5-1/+22
This patch adds a new CFI directive (cfi_negate_ra_state_with_pc) which set an additional bit in the RA state to inform that RA was signed with SP but also PC as an additional diversifier. RA state | Description 0b00 | Return address not signed (default if no cfi_negate_ra_state*) 0b01 | Return address signed with SP (cfi_negate_ra_state) 0b10 | Invalid state 0b11 | Return address signed with SP+PC (cfi_negate_ra_state_with_pc) Approved-by: Indu Bhagat <indu.bhagat@oracle.com> Approved-by: Jan Beulich <jbeulich@suse.com>
2025-01-14aarch64 SFrame: use preferred CFI directive for AArch64 PACMatthieu Longo4-4/+51
ARMv8.3 addded support for a new security feature named Pointer Authentication. Support for this feature in SFrame already exists. In GCC 14 and older, the Sparc DWARF extension .cfi_gnu_window_save is emitted instead of .cfi_negate_ra_state. GCC 15 fixed this issue, but this behavior is preserved for backward compatibility. The existing sframe test for AArch64 PAC was using .cfi_gnu_window_save. This patch replaces this CFI in the existing test by the preferred one, and adds a new test to check for backward compatibility when using .cfi_gnu_window_save. Approved-by: Indu Bhagat <indu.bhagat@oracle.com>
2025-01-14aarch64: make explicit that CFI gnu_window_save is for Sparc, not AArch64Matthieu Longo4-3/+73
- add a detailed comment when parsing DW_CFA_GNU_window_save in SFrame to explain why we are checking whether the targeted architecture is AArch64, whereas this CFI is a Sparc extension. - replace .cfi_gnu_window_save by .cfi_negate_ra_state in existing AArch64 DWARF tests as this is the preferred directive since GCC 15. - add a new AArch64 test to check backward compatibility with old GCC versions that emits .cfi_gnu_window_save. Approved-by: Indu Bhagat <indu.bhagat@oracle.com> Approved-by: Richard Earnshaw <richard.earnshaw@arm.com>
2025-01-14gdbserver: remove handling of the 'L' tracepoint actionTankut Baris Aktemur1-46/+0
Now that static tracepoint support is removed from gdbserver, it makes sense to remove handling of the 'L' tracepoint action, too. The code that checks received actions already has a default case that tolerates unrecognized actions: default: trace_debug ("unknown trace action '%c', ignoring...", *act); In case 'L' is unexpectedly received, we would at least be able to see this in the logs. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14gdbserver: remove the static_tracepoint enum valueTankut Baris Aktemur1-143/+36
As a continuation of the previous patches that remove UST from gdbserver, remove the `static_tracepoint` enum value from `tracepoint_type` and all the associated code. Now that the last use of `write_e_static_tracepoints_not_supported` is gone, also remove that function. The handling of the 'S' option, where the `static_tracepoint` enum value was being used, is removed completely, because recognizing that option makes sense only when static tracepoint support is announced. This patch is easier to view with "git show -w". Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14gdbserver: do not announce static tracepoint supportTankut Baris Aktemur3-125/+0
Remove the announcement that `qXfer:statictrace:read` and `StaticTracepoints` are supported. Associated to this, remove the handling of "qTfSTM", "qTsSTM", and "qTSTMat" packets and the qXfer:statictrace:read handling. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14gdbserver: remove UST (static tracepoint) support (part 2)Tankut Baris Aktemur1-102/+17
With the removal of UST, the `in_process_agent_supports_ust` query would essentially always be false. Remove the function and adjust the uses, comments, and warning/error messages. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14gdbserver: remove UST (static tracepoint) support (part 1)Tankut Baris Aktemur9-901/+6
UST support in gdbserver is substantially outdated. Simon says: ...[having HAVE_UST defined] never happens nowadays because it used a version of lttng-ust that has been deprecated for a loooong time (the 0.x series). So everything in HAVE_UST just bitrots. It might be possible to update all this code to use lttng-ust 2.x (1.x never existed), but I don't think it's going to happen unless somebody specifically asks for it. I would suggest removing support for UST from gdbserver. ...If we ever want to resurrect the support for UST and port to 2.x, we can get the code from the git history. This patch removes the support, mostly mechanically by deleting code guarded by `#ifdef HAVE_UST`. After these removals, `struct static_tracepoint_ctx` becomes unused. So, remove it, too. The following patches remove more code. Reviewed-By: Eli Zaretskii <eliz@gnu.org> Approved-By: Simon Marchi <simon.marchi@efficios.com>
2025-01-14gdb, doc: describe the 'L' tracepoint actionTankut Baris Aktemur1-0/+3
I noticed that 'L' is a tracepoint action but it is not defined in the document. Add the description. Reviewed-By: Eli Zaretskii <eliz@gnu.org>
2025-01-14gdb, doc: mention the 'S' option for the QTDP packetTankut Baris Aktemur1-2/+3
I noticed that gdbserver accepts an 'S' option for the QTDP packet to create a static tracepoint, but this is not mentioned in the document. Update the document. I first thought about updating the argument as `[:Flen|:S]`, but then opted for `[:Flen][:S]`. Although it is odd that ':F' and ':S' are allowed to co-exist, the implementation at the gdbserver side allows this and handles the packet arguments so that the right-most positioned ':F' or ':S' overwrites the final tracepoint type. When the documentation is missing, the implementation usually determines the behavior. Reviewed-By: Eli Zaretskii <eliz@gnu.org>
2025-01-14ld: Call cmdline_check_object_only_section only if plugin is enabledH.J. Lu1-1/+1
* ldfile.c (ldfile_try_open_bfd): Call cmdline_check_object_only_section only if BFD_SUPPORTS_PLUGINS is defined. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-14x86: Remove "NE" in mnemonics for convert insns related to AI data typesHaochen Jiang28-2893/+2893
NE is quite ambiguous and misleading in mnemonics since it should be Rounding to Nearest Even, but could be mis-interpretated to No Exception. Under its correct meaning, which means rounding, it should only be used in down-convert, since up-convert is always exact for normal values It could be difficult to judge which kind of convert it is if we have the convert between same bit float types. For all AI data types including BF16 and FP8, the default rounding is Rounding to Nearest Even. So removing them in mnemonics would reduce burden for programmers to consider whether it should be added or not in mnemonics and stop the ambiguous meaning on "NE" itself. If the convert itself is using a rounding mode other than RNE, it would be explicitly added in mnemonics (e.g., Long used "T" and "BIAS" introduced in AVX10.2). gas/ChangeLog: * testsuite/gas/i386/avx10_2-256-cvt-intel.d: Refine testcases according to mnemonics change. * testsuite/gas/i386/avx10_2-256-cvt.d: Ditto. * testsuite/gas/i386/avx10_2-256-cvt.s: Ditto. * testsuite/gas/i386/avx10_2-256-satcvt-intel.d: Ditto. * testsuite/gas/i386/avx10_2-256-satcvt.d: Ditto. * testsuite/gas/i386/avx10_2-256-satcvt.s: Ditto. * testsuite/gas/i386/avx10_2-512-cvt-intel.d: Ditto. * testsuite/gas/i386/avx10_2-512-cvt.d: Ditto. * testsuite/gas/i386/avx10_2-512-cvt.s: Ditto. * testsuite/gas/i386/avx10_2-512-satcvt-intel.d: Ditto. * testsuite/gas/i386/avx10_2-512-satcvt.d: Ditto. * testsuite/gas/i386/avx10_2-512-satcvt.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-cvt-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-cvt.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-cvt.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-satcvt-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-satcvt.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-satcvt.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-cvt-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-cvt.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-cvt.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-satcvt-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-satcvt.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-satcvt.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-prefix.h: Remove ne in mnemonics for convert insns. * i386-opc.tbl: Ditto. * i386-mnem.h: Regenerated. * i386-tbl.h: Ditto.
2025-01-14x86: Rename VCOMSBF16 to VCOMISBF16Haochen Jiang10-2142/+2142
The functionality for VCOMSBF16 is exactly the same as the VCOMISD/S/H. The only difference is the bf16 type. Thus, it should be VCOMISBF16. This patch would fix that. gas/ChangeLog: * testsuite/gas/i386/avx10_2-256-bf16-intel.d: Refine testcase according to mnemonics change. * testsuite/gas/i386/avx10_2-256-bf16.d: Ditto. * testsuite/gas/i386/avx10_2-256-bf16.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-bf16-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-bf16.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-bf16.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-prefix.h: Rename VCOMSBF16 to VCOMISBF16. * i386-opc.tbl: Ditto. * i386-mnem.h: Regenerated. * i386-tbl.h: Ditto.
2025-01-14x86: Remove "P" and "NE" in mnemonics for BF16 arithmetic insnsHaochen Jiang28-4386/+4386
Since the bf16 is an AI data types, it will be implicitly packed. Thus, "P" (for packed) is omitted in mnemonics from its introduction. AVX10.2 BF16 arithmetic insns are introduced with "P" in mnemonics with packed. This patch will remove them for consistency. NE is quite ambiguous and misleading in mnemonics since it should be Rounding to Nearest Even, but could be mis-interpretated to No Exception. While AI data types like BF16 and FP8 are using Rounding to Nearest Even as default rounding modes. There is no need to use the ambiguous mnemonics in AVX10.2 insns. This patch will also remove them. For convert insns, it will be handled in the upcoming patch. gas/ChangeLog: * testsuite/gas/i386/avx10_2-256-bf16-intel.d: Refine testcase according to new mnemonics. * testsuite/gas/i386/avx10_2-256-bf16.d: Ditto. * testsuite/gas/i386/avx10_2-256-bf16.s: Ditto. * testsuite/gas/i386/avx10_2-256-miscs-intel.d: Ditto. * testsuite/gas/i386/avx10_2-256-miscs.d: Ditto. * testsuite/gas/i386/avx10_2-256-miscs.s: Ditto. * testsuite/gas/i386/avx10_2-512-bf16-intel.d: Ditto. * testsuite/gas/i386/avx10_2-512-bf16.d: Ditto. * testsuite/gas/i386/avx10_2-512-bf16.s: Ditto. * testsuite/gas/i386/avx10_2-512-miscs-intel.d: Ditto. * testsuite/gas/i386/avx10_2-512-miscs.d: Ditto. * testsuite/gas/i386/avx10_2-512-miscs.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-bf16-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-bf16.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-bf16.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-256-miscs.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-bf16-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-bf16.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-bf16.s: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-miscs-intel.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-miscs.d: Ditto. * testsuite/gas/i386/x86-64-avx10_2-512-miscs.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-prefix.h: Remove p and ne in bf16 mnemonics. * i386-opc.tbl: Ditto. * i386-mnem.h: Regenerated. * i386-tbl.h: Ditto.
2025-01-14Support Intel AMX-AVX512Haochen Jiang19-1788/+2211
This patch will support AMX-AVX512. In disassmbler, we pull out all GPR mode out of the vex length switch to make it more general. gas/ChangeLog: * NEWS: Mention the full support on DMR AMX ISAs. * config/tc-i386.c: Add amx_avx512. * doc/c-i386.texi: Document .amx_avx512. * testsuite/gas/i386/x86-64.exp: Run AMX-AVX512 tests. * testsuite/gas/i386/x86-64-amx-avx512-intel.d: New test. * testsuite/gas/i386/x86-64-amx-avx512.d: Ditto. * testsuite/gas/i386/x86-64-amx-avx512.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-len.h: Add EVEX_LEN_0F384A_X86_64_W_0, EVEX_LEN_0F386D_X86_64_W_0, EVEX_LEN_0F3A07_X86_64_W_0, EVEX_LEN_0F3A77_X86_64_W_0. * i386-dis-evex-prefix.h: Add PREFIX_EVEX_0F384A_W_0_L_2, PREFIX_EVEX_0F386D_W_0_L_2, PREFIX_EVEX_0F3A07_W_0_L_2, PREFIX_EVEX_0F3A77_W_0_L_2. * i386-dis-evex-w.h: Add EVEX_W_0F384A_X86_64, EVEX_W_0F386D_X86_64, EVEX_W_0F3A07_X86_64, EVEX_W_0F3A77_X86_64. * i386-dis-evex-x86-64.h: Add X86_64_EVEX_0F384A, X86_64_EVEX_0F386D, X86_64_EVEX_0F3A07, X86_64_EVEX_0F3A77. * i386-dis-evex.h: Ditto. * i386-dis.c (EVEX_LEN_0F384A_X86_64_W_0): New. (EVEX_LEN_0F386D_X86_64_W_0): Ditto. (EVEX_LEN_0F3A07_X86_64_W_0): Ditto. (EVEX_LEN_0F3A77_X86_64_W_0): Ditto. (MOD_EVEX_0F384A_X86_64_W_0): Ditto. (MOD_EVEX_0F386D_X86_64_W_0): Ditto. (MOD_EVEX_0F3A07_X86_64_W_0): Ditto. (MOD_EVEX_0F3A77_X86_64_W_0): Ditto. (PREFIX_EVEX_0F384A_W_0_L_2): Ditto. (PREFIX_EVEX_0F386D_W_0_L_2): Ditto. (PREFIX_EVEX_0F3A07_W_0_L_2): Ditto. (PREFIX_EVEX_0F3A77_W_0_L_2): Ditto. (EVEX_W_0F384A_X86_64): Ditto. (EVEX_W_0F386D_X86_64): Ditto. (EVEX_W_0F3A07_X86_64): Ditto. (EVEX_W_0F3A77_X86_64): Ditto. (X86_64_EVEX_0F384A): Ditto. (X86_64_EVEX_0F386D): Ditto. (X86_64_EVEX_0F3A07): Ditto. (X86_64_EVEX_0F3A77): Ditto. (OP_VEX): Pull out all GPR mode out of the vector length switch. * i386-gen.c (isa_dependencies): Add AMX-AVX512. (cpu_flags): Ditto. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (CpuAMX_AVX512): New. (i386_cpu_flags): Add cpuamx_avx512. * i386-opc.tbl: Add AMX-AVX512 instructions. * i386-tbl.h: Regenerated.
2025-01-14Support Intel AMX-MOVRSHu, Lin123-2625/+3020
This patch will support AMX-MOVRS feature. Unlike all the other AMX insns in vector space where we pass vex_len_table before vex_w_table, we first pass vex_w_table for tileloaddrs[,t1] to align with the order in EVEX space. The reason why we first pass vex_w_table in EVEX space is due to AMX-AVX512, where tcvtrowd2ps and tilemovrow with r32 shares the same opcode with tileloaddrs[,t1]. All of them have evex.w = 0 but with different evex.length. Re-doing that shortly is not ideal. APX_F extension is also implemented in this patch. The encoding will be: - EVEX.128.NP/66.MAP5.W0 F8/F9 !(11):rrr:100 for T2RPNTLVW[Z0,Z1]RS[,T1] with NF=0. - EVEX.128.F2/66.0F38.W0 4A !(11):rrr:100 FOR TILELOADDRS[,T1] with NF=0. For APX_F extension, we could not use APX_F(AMX_TRANSPOSE&AMX_MOVRS) since the transformation could not be done. Instead, we will use AMX_TRANSPOSE & APX_F(AMX_MOVRS). Thus, we should set AMX_TRANSPOSE for "any" for cpu_flags in assembler. Since it will only affect the cpu_flags_match, handle that there. gas/ChangeLog: * config/tc-i386.c (cpu_arch): Add amx_movrs. (cpu_flags_match): Set any bitfield for multiple cpuid enabled insns. * doc/c-i386.texi: Document .amx_movrs. * testsuite/gas/i386/x86-64.exp: Run AMX-MOVRS tests. * testsuite/gas/i386/x86-64-amx-movrs-intel.d: New test. * testsuite/gas/i386/x86-64-amx-movrs-inval.l: Ditto. * testsuite/gas/i386/x86-64-amx-movrs-inval.s: Ditto. * testsuite/gas/i386/x86-64-amx-movrs.d: Ditto. * testsuite/gas/i386/x86-64-amx-movrs.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-len.h (EVEX_LEN_0F384A_X86_64_W_0): New. * i386-dis-evex-w.h (EVEX_W_0F384A_X86_64): Ditto. * i386-dis-evex-x86-64.h (X86_64_EVEX_0F384A): Ditto. * i386-dis-evex.h: New entry for AMX-MOVRS. * i386-dis.c: (PREFIX_VEX_0F384A_X86_64_L_0_W_0): New. (PREFIX_VEX_MAP5_F8_X86_64_L_0_W_0): Ditto. (PREFIX_VEX_MAP5_F9_X86_64_L_0_W_0): Ditto. (X86_64_VEX_0F384A): Ditto. (X86_64_VEX_MAP5_F8): Ditto. (X86_64_VEX_MAP5_F9): Ditto. (X86_64_EVEX_0F384A): Ditto. (VEX_LEN_0F384A_X86_64_W_0): Ditto. (VEX_LEN_MAP5_F8_X86_64): Ditto. (VEX_LEN_MAP5_F9_X86_64): Ditto. (EVEX_LEN_0F384A_X86_64_W_0): Ditto. (VEX_W_0F384A_X86_64): Ditto. (VEX_W_MAP5_F8_X86_64): Ditto. (VEX_W_MAP5_F9_X86_64): Ditto. (EVEX_W_0F384A_X86_64): Ditto. (prefix_table): New entry for AMX-MOVRS. (x86_64_table): Ditto. (vex_len_table): Ditto. (vex_w_table): Ditto. (map5_f8_opcode): New. (map5_f9_opcode): Ditto. (get_valid_dis386): Handle VEX_MAP5 opcode for AMX-MOVRS. * i386-gen.c (isa_dependencies): Add AMX_MOVRS. (cpu_flags): Ditto. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (CpuAMX_MOVRS): New. (i386_cpu_flags): Add cpuamx_movrs. * i386-opc.tbl: Add AMX-MOVRS instructions. * i386-tbl.h: Regenerated. Co-authored-by: Haochen Jiang <haochen.jiang@intel.com>
2025-01-14Support Intel MOVRSHu, Lin145-2657/+3250
This patch focus on supporting MOVRS ISA. We could take this full ISA as four part: PREFETCHRST2, MOVRS, MOVRS APX_F extension and MOVRS AVX10.2 extension. The APX_F extension for MOVRS will be: - EVEX.LLZ.NP.MAP4.WIG 8A !(11):rrr:bbb for r8/m8 with NF=0 and ND=0 - EVEX.LLZ.NP/66.MAP4.SCALABLE 8B !(11):rrr:bbb for rv/mv with NF=0 and ND=0 We did not merge the table together for APX_F since there is an explicit x64 for movrs insn. The current APX_F() did not support the combination between CPUIDs. Also, the space is different for legacy and apx_f forms. gas/ChangeLog: * NEWS: Support Intel MOVRS. * config/tc-i386.c: Add MOVRS. * doc/c-i386.texi: Document .movrs. * testsuite/gas/i386/i386.exp: Run MOVRS tests. * testsuite/gas/i386/x86-64.exp: Ditto. * testsuite/gas/i386/x86-64-apx-evex-promoted-intel.d: Add MOVRS tests. * testsuite/gas/i386/x86-64-apx-evex-promoted-wig.d: Ditto. * testsuite/gas/i386/x86-64-apx-evex-promoted.d: Ditto. * testsuite/gas/i386/x86-64-apx-evex-promoted.s: Ditto. * testsuite/gas/i386/lfence-load.d: Add prefetchrst2. * testsuite/gas/i386/lfence-load.s: Ditto. * testsuite/gas/i386/nops-8.d: Ditto. * testsuite/gas/i386/prefetch-intel.d: Ditto. * testsuite/gas/i386/prefetch.d: Ditto. * testsuite/gas/i386/x86-64-lfence-load.d: Ditto. * testsuite/gas/i386/x86-64-lfence-load.s: Ditto. * testsuite/gas/i386/x86-64-prefetch-intel.d: Ditto. * testsuite/gas/i386/x86-64-prefetch.d: Ditto. * testsuite/gas/i386/movrs-intel.d: New test. * testsuite/gas/i386/movrs-inval.l: Ditto. * testsuite/gas/i386/movrs-inval.s: Ditto. * testsuite/gas/i386/movrs.d: Ditto. * testsuite/gas/i386/movrs.s: Ditto. * testsuite/gas/i386/x86-64-movrs-avx10_2-256-intel.d: Ditto. * testsuite/gas/i386/x86-64-movrs-avx10_2-256.d: Ditto. * testsuite/gas/i386/x86-64-movrs-avx10_2-256.s: Ditto. * testsuite/gas/i386/x86-64-movrs-avx10_2-512-intel.d: Ditto. * testsuite/gas/i386/x86-64-movrs-avx10_2-512.d: Ditto. * testsuite/gas/i386/x86-64-movrs-avx10_2-512.s: Ditto. * testsuite/gas/i386/x86-64-movrs-intel.d: Ditto. * testsuite/gas/i386/x86-64-movrs.d: Ditto. * testsuite/gas/i386/x86-64-movrs.s: Ditto. * testsuite/gas/i386/x86-64-movrs-intel-suffix.d: Ditto. * testsuite/gas/i386/x86-64-movrs-suffix.d: Ditto. * testsuite/gas/i386/x86-64-movrs-suffix.s: Ditto. opcodes/ChangeLog: * i386-dis-evex-prefix.h: Add PREFIX_EVEX_MAP5_6F_X86_64. * i386-dis-evex-x86.h: Add X86_64_EVEX_MAP5_6F. * i386-dis-evex.h (evex_table): New entry for movrs. * i386-dis.c (MOD_0F18_REG_4): New. (PREFIX_EVEX_MAP5_6F_X86_64): Ditto. (X86_64_0F388A): Ditto. (X86_64_0F388B): Ditto. (X86_64_EVEX_MAP5_6F): Ditto. (three_byte_table): New entry for MOVRS. (reg_table): Ditto. (mod_table): Ditto. (x86_64_table): Ditto. Also include i386-dis-evex-x86.h. * i386-gen.c (cpu_flags): Add MOVRS. * i386-init.h: Regenerated. * i386-mnem.h: Ditto. * i386-opc.h (i386_cpu_flags): Add cpumovrs. * i386-opc.tbl: Add MOVRS instrctions. * i386-tbl.h: Regenerated. Co-authored-by: Haochen Jiang <haochen.jiang@intel.com> Co-authored-by: Lili Cui <lili.cui@intel.com>
generated by cgit v1.1 at 2025-02-28 19:33:13 +0000