Age | Commit message (Collapse) | Author | Files | Lines |
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* blockframe.c: ...Remove old-style CALL_DUMMY code...
* h8300-tdep.c:
* config/h8300/tm-h8300.h:
start-sanitize-m32r
* m32r-tdep.c:
* config/m32r/tm-m32r.h:
end-sanitize-m32r
* sh-tdep.c:
* config/sh/tm-sh.h:
start-sanitize-v850
* v850-tdep.c:
* config/v850/tm-v850.h:
end-sanitize-v850
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* gdb.base/callfuncs.exp: Turn on function call tests for h8300.
* gdb.base/default.exp: ditto.
* gdb.base/nodebug.exp: ditto.
* gdb.base/printcmds.exp: ditto.
* gdb.base/ptype.exp: ditto.
* gdb.base/setvar.exp: ditto.
* gdb.base/structs.exp: ditto.
* gdb.base/setshow.c: Guard against uninitialized values of argc.
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Added some generic target-independant code for managing call-dummy frames.
Wed Nov 27 10:32:14 1996 Michael Snyder <msnyder@cleaver.cygnus.com>
* breakpoint.c: DELETE command will not delete CALL_DUMMY breakpoint.
* blockframe.c: Add target-independant support for managing
CALL_DUMMY frames on the host side.
* frame.h: Declarations for generic CALL_DUMMY frame support.
* h8300-tdep.c: Add target function calls using generic frame support.
* config/h8300/tm-h8300.h: config for generic target function calls.
start-sanitize-m32r
* m32r-tdep.c: Add target function calls using generic frame support.
* config/m32r/tm-m32r.h: config for generic target function calls.
end-sanitize-m32r
* sh-tdep.c: Add target function calls using generic frame support.
* config/sh/tm-sh.h: config for generic target function calls.
start-sanitize-v850
* v850-tdep.c: Add target function calls using generic frame support.
* config/v850/tm-v850.h: config for generic target function calls.
end-sanitize-v850
* valops.c: ADD PUSH_RETURN_ADDRESS so that it doesn't have to be
done by PUSH_ARGUMENTS when there's no CALL_DUMMY.
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pointer in "call" and "calls" instructions. Rough cut
at emulated system calls.
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4, not an alignment of 16. Corrects August 7 patch.
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Everything except the extended instructions, the loop instructions,
trap, rti, and rtm.
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relocation against a symbol defined in a section with no output
section.
PR 11174.
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16 bit instructions.
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Moving right along...
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abort for instructions we're not implementing now.
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Implments most instructions with first nibble 0x0 - 0xe and
those with the first byte 0xf0 - 0xf2.
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Function calls and conditional branches work!
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(mips_addr_bits_remove): Declare.
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(mips_addr_bits_remove): Declare.
* mips-tdep.c (mips_push_dummy_frame): Fix heuristic-fence-post
errors when hitting breakpoints during inferior function calls
in 64-bit programs.
(fix_sign_extension): Make public, rename to mips_addr_bits_remove.
* utils.c (paddr_nz, preg_nz): New functions, similar to
paddr and preg but don't print leading zeroes.
* defs.h (paddr_nz, preg_nz): Declare.
* remote-mips.c: Use paddr_nz instead of paddr throughout
to reduce packet size.
(pmon_end_download): Improve timeout error handling.
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(REG_MDR): Define.
* simops.c: Implement "cmp", "calls", "rets", "jmp" and
a few additional random insns.
We can now function calls. We get out of crt0 into main now, then lose
when calls are nested (because don't handle movm yet).
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register prefix.
Fixes improper disassembly of movm instructions.
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(REG_D0, REG_A0, REG_SP): Define.
* simops.c: Implement "add", "addc" and a few other random
instructions.
Starting to simulate instructions for the mn10300. Executes some of
the crt0 code now!
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* configure, config.in: Rebuild with autoconf 2.12.
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alignment is specified.
PR 11164.
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(crude) hashing works, along with dispatch to the OP_* functions.
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mov am,(imm32,sp).
Found during initial simulator work.
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* gencode.c (inst_type): Add mips16 instruction encoding types.
(GETDATASIZEINSN): Define.
(MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
mtlo.
(MIPS16_DECODE): New table, for mips16 instructions.
(bitmap_val): New static function.
(struct mips16_op): Define.
(mips16_op_table): New table, for mips16 operands.
(build_mips16_operands): New static function.
(process_instructions): If PC is odd, decode a mips16
instruction. Break out instruction handling into new
build_instruction function.
(build_instruction): New static function, broken out of
process_instructions. Check modifiers rather than flags for SHIFT
bit count and m[ft]{hi,lo} direction.
(usage): Pass program name to fprintf.
(main): Remove unused variable this_option_optind. Change
``*loptarg++'' to ``loptarg++''.
(my_strtoul): Parenthesize && within ||.
* interp.c (sim_trace): If tracefh is NULL, set it to stderr.
(LoadMemory): Accept a halfword pAddr if vAddr is odd.
(simulate): If PC is odd, fetch a 16 bit instruction, and
increment PC by 2 rather than 4.
* configure.in: Add case for mips16*-*-*.
* configure: Rebuild.
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* config.sub (basic_machine): added mips16 configuration
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* config/tc-mips.c: Extensive additions for mips16 support, not
listed here.
(RELAX_OLD, RELAX_NEW): Use only 7 bits each.
(insn_uses_reg): Change last parameter to an enum.
* config/tc-mips.h (LOCAL_LABELS_DOLLAR): Define as 0.
(md_relax_frag): Define as mips_relax_frag.
(mips_relax_frag): Declare.
(struct mips_cl_insn): Add use_extend and extend fields.
(tc_fix_adjustable): Define.
* config/obj-elf.h (S_GET_OTHER): Define.
(S_SET_OTHER): Define.
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* elf.c (_bfd_elf_link_hash_newfunc): Initialize other field.
(swap_out_syms): Set st_other from existing st_other field.
* elflink.h (elf_link_add_object_symbols): Store st_other in hash
table other field.
(elf_link_output_extsym): Set the other field from the global hash
table entry.
* elf32-mips.c (enum reloc_type): Add R_MIPS16_26.
(elf_mips16_jump_howto): New static variable.
(mips16_jump_reloc): New static function.
(bfd_elf32_bfd_reloc_type_lookup): Handle BFD_RELOC_MIPS16_JMP.
(mips_info_to_howto_rel): Handle R_MIPS16_26.
(mips_elf_relocate_section): Handle R_MIPS16_26. Handle R_MIPS_26
to a mips16 symbol.
* reloc.c (BFD_RELOC_MIPS16_JMP): Add to list of relocs.
* bfd-in2.h, libbfd.h: Rebuild.
* cpu-mips.c (arch_info_struct): Add mips:16 entry.
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* mips16-opc.c: New file.
* mips-dis.c: Include "elf-bfd.h" and "elf/mips.h".
(mips16_reg_names): New static array.
(print_insn_big_mips): Use print_insn_mips16 in 16 bit mode or
after seeing a 16 bit symbol.
(print_insn_little_mips): Likewise.
(print_insn_mips16): New static function.
(print_mips16_insn_arg): New static function.
* mips-opc.c: Add jalx instruction.
* Makefile.in (mips16-opc.o): New target.
* configure.in: Use mips16-opc.o for bfd_mips_arch.
* configure: Rebuild.
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* configure: Regenerated.
* d10v_sim.h: #include "config.h"
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operand specifiers in *save, *restore and movem* instructions.
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o and p operand specifiers.
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the coldfire.
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instruction for the coldfire.
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register operands for immediate arithmetic, not, neg, negx, and
set according to condition instructions.
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symbol.
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specifier of the effective-address operand in immediate forms of
arithmetic instructions. The specifier for the immediate operand
notes how and where the constant will be stored.
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(relax_segment, case rs_org): Move code inside braces. Move locals
target,after inside too.
(relax_segment, case rs_machine_dependent): Guts moved to ...
(relax_frag): New function.
Call md_prepare_relax_scan if defined.
* config/tc-m68k.h (md_prepare_relax_scan): Renamed from
M68K_AIM_KLUDGE.
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* remote-bug.c (wait_strings): Avoid creating a trigraph.
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* gencode.c, interp.c, mn10300_sim.h, simops.c: New files.
Skeleton mn10300 simulator
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opcode.
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