Age | Commit message (Collapse) | Author | Files | Lines |
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PR gdb/6817
* dbxread.c (read_dbx_symtab): Reduce stack use.
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Fix gcc-4.5 HEAD warnings.
* cp-name-parser.y (%union <typed_val_int>, %token GLOBAL)
(GLOBAL_CONSTRUCTORS, GLOBAL_DESTRUCTORS, demangler_special <GLOBAL>):
Remove.
(yylex <"global constructors keyed to ">)
(yylex <"global destructors keyed to ">): Base it on DEMANGLER_SPECIAL.
(cp_comp_to_string): Remove variables str, prefix and buf. Remove the
GLOBAL_DESTRUCTORS and GLOBAL_CONSTRUCTORS handling.
(cp_print): Remove the GLOBAL_DESTRUCTORS and GLOBAL_CONSTRUCTORS
handling.
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* emulparams/elf_i386.sh (IREL_IN_PLT): Define.
* emulparams/elf_x86_64.sh (IREL_IN_PLT): Define.
* scripttempl/elf.sc: Create separate .iplt and .rela.iplt sections
when !IREL_IN_PLT.
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used by indirect function support. Count dynamic relocs for
ifunc syms.
(ppc_elf_adjust_dynamic_symbol): Tweak for ifunc.
(allocate_dynrelocs): Allocate all non-dynamic ifunc plt entries
in iplt and their relocs in reliplt. Don't make ifunc syms
dynamic. Allocate got entry relocs for non-dynamic ifunc in
reliplt. Handle other dynamic relocs for ifunc.
(ppc_elf_size_dynamic_sections): Alloc dyn relocs for static
ifunc in reliplt, likewise relocs for got against local ifunc.
Typo fix on reliplt size adjust.
(ppc_elf_relocate_section): Don't use plt scheme of allocating
relocs 1-1 with entries for iplt, instead just add using
reloc_count. Write got relocs and dyn relocs for ifunc to reliplt.
Error on invalid ifunc dyn relocs.
(ppc_elf_finish_dynamic_symbol): Adjust for non-dynamic ifunc plt
in iplt/reliplt.
* elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_JMP_IREL,
R_PPC64_REL16, R_PPC64_REL16_LO, R_PPC64_REL16_HI, R_PPC64_REL16_HA.
(ppc64_elf_reloc_type_lookup): Handle new relocs.
(ppc64_elf_check_relocs): Likewise. Count dyn relocs for ifunc.
(allocate_dynrelocs): As for elf32-ppc.c above.
(ppc64_elf_size_dynamic_sections): Likewise.
(ppc_build_one_stub): Put non-dynamic ifunc plt call stubs in iplt,
and their relocs in reliplt. Use R_PPC64_JMP_IREL.
(ppc_size_one_stub): Similarly.
(ppc64_elf_relocate_section): As for elf32-ppc.c above. Handle new
relocs too.
(ppc64_elf_finish_dynamic_symbol): As for elf32-ppc.c above.
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R_PPC64_REL16_HI, R_PPC64_REL16_HA.
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* ld-scripts/default-script1.d, ld-scripts/default-script2.d,
ld-scripts/default-script3.d, ld-scripts/default-script4.d: Adjust
accordingly.
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* symbols.c (S_FORCE_RELOC): True for BSF_GNU_INDIRECT_FUNCTION.
* config/tc-i386.c: Revert 2009-06-13 change.
* config/tc-i386.h: Likewise.
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the new $RELOCATEABLE_OUTPUT_FORMAT, if set.
(OUTPUT_FORMAT): Use the variable $OUTPUT_FORMAT.
(ENTRY): Don't emit for relocateable links.
(/DISCARD/): Don't discard .gnu.warning.* for relocateable links.
* emulparams/mmo.sh (RELOCATEABLE_OUTPUT_FORMAT): Set, to
elf64-mmix.
* emulparams/elf64mmix.sh (OTHER_TEXT_SECTIONS): Empty, don't
provide "Main" or set "_start.", for relocateable links.
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change. Add note to head comment.
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* target-descriptions.c (tdesc_register_type): Make public.
(tdesc_unnumbered_register): New function.
(tdesc_register_reggroup_p): Allow missing
pseudo_register_reggroup_p.
* target-descriptions.h (tdesc_register_type): Declare.
(tdesc_unnumbered_register): Declare.
* arm-tdep.c (arm_neon_quad_read, arm_neon_quad_write): New functions.
(arm_push_dummy_call): Use arm_neon_quad_write.
(arm_neon_double_type, arm_neon_quad_type): New functions.
(arm_register_type): Handle VFP and NEON registers. Override the
types of double-precision registers for NEON. Disable FPA registers
if they are not present.
(arm_dwarf_reg_to_regnum): Add current VFP and NEON register numbers.
(arm_return_value): Use arm_neon_quad_write and arm_neon_quad_read.
(arm_register_name): Handle VFP single and NEON quad registers.
(arm_pseudo_read, arm_pseudo_write): New functions.
(arm_gdbarch_init): Check for VFP and NEON in the target description.
Assign numbers to double-precision registers. Register VFP and NEON
pseudo registers. Remove a shadowed "i" variable.
* arm-tdep.h (enum gdb_regnum): Add ARM_D0_REGNUM and
ARM_D31_REGNUM.
(struct gdbarch_tdep): Add have_neon_pseudos, have_neon,
have_vfp_registers, have_vfp_pseudos, neon_double_type,
and neon_quad_type.
* features/Makefile: Make expedite settings only architecture
specific.
(WHICH): Add new ARM descriptions.
* features/arm-with-neon.xml, features/arm-with-vfpv2.c,
features/arm-with-vfpv3.c, features/arm-vfpv2.xml,
features/arm-vfpv3.xml, features/arm-with-vfpv2.xml,
features/arm-with-vfpv3.xml, features/arm-with-neon.c: New files.
* regformats/arm-with-neon.dat, regformats/arm-with-vfpv2.dat,
regformats/arm-with-vfpv3.dat: Generate.
doc/
* gdb.texinfo (ARM Features): Document org.gnu.gdb.arm.vfp and
org.gnu.gdb.arm.neon.
gdbserver/
* linux-low.c (linux_write_memory): Update debugging output.
* Makefile.in (clean): Add new descriptions.
(arm-with-vfpv2.o, arm-with-vfpv2.c, arm-with-vfpv3.o)
(arm-with-vfpv3.c, arm-with-neon.o, arm-with-neon.c): New rules.
* configure.srv: Add new files for arm*-*-linux*.
* linux-arm-low.c: Add new declarations.
(PTRACE_GETVFPREGS, PTRACE_SETVFPREGS): Define if undefined.
(arm_hwcap, HWCAP_VFP, HWCAP_IWMMXT, HWCAP_NEON, HWCAP_VFPv3)
(HWCAP_VFPv3D16): New.
(arm_fill_wmmxregset, arm_store_wmmxregset): Check HWCAP_IWMMXT
instead of __IWMMXT__.
(arm_fill_vfpregset, arm_store_vfpregset, arm_get_hwcap)
(arm_arch_setup): New.
(target_regsets): Remove #ifdef. Add VFP regset.
(the_low_target): Use arm_arch_setup.
testsuite/
* gdb.base/float.exp: Handle VFP registers.
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the main thread again.
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stepping past a single-step breakpoint.
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arm_vfp_cprc_unit_length, arm_vfp_cprc_reg_char,
arm_vfp_cprc_sub_candidate, arm_vfp_call_candidate,
arm_vfp_abi_for_function): New.
(arm_push_dummy_call): Handle VFP ABI.
(arm_extract_return_value, arm_store_return_value): Handle
ARM_FLOAT_VFP case.
(arm_return_value): Handle VFP ABI.
(arm_gdbarch_init): Default fp_model based on Tag_ABI_VFP_args for
EABI binaries.
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gdbarch_convert_from_func_ptr_addr.
* cris-tdep.c: Remove outdated comment.
* infcall.c (call_function_by_hand): Do not call
gdbarch_convert_from_func_ptr_addr after entry_point_address.
* objfiles.c (entry_point_address): Call both
gdbarch_convert_from_func_ptr_addr and
gdbarch_addr_bits_remove.
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section tarble is not empty.
(target_bfd_reopen): If the section table ends up empty, close the
bfd here.
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(nto_extra_thread_info): New function definition.
* nto-tdep.h (gdbthread.h): New include.
(private_thread_info): New struct.
(nto_extra_thread_info): New declaration.
* nto-procfs.c (procfs_thread_alive): Properly check if
thread is still alive.
(update_thread_private_data_name, update_thread_private_data): New
function definition.
(procfs_find_new_threads): Fetch thread private data.
(init_procfs_ops): Register to_extra_thread_info.
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2009-07-28 Jan Beulich <jbeulich@novell.com>
* archive.c (get_extended_arelt_filename): Remove redundant
range check on index.
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2009-07-28 Jan Beulich <jbeulich@novell.com>
* expr.c (op_rank): Specify size. Remove O_md* initializers.
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* elf32-arm.c (stub_hash_newfunc): Initialize field output_name.
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(m68k_cpu): Add line for MCF5221x.
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(mcf53017_ctrl): Fix RAMBAR.
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* objdump.c (dump_section_header): Skip sections that we are
ignoring.
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* archures.c bfd_*_arch): Sorted.
(bfd_archures_list): Likewise.
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2009-07-27 Jan Beulich <jbeulich@novell.com>
* obj-elf.c (elf_file_symbol): Replace symbol name set up by
symbol_new() with the passed in, unmodified one.
gas/testsuite/
2009-07-27 Jan Beulich <jbeulich@novell.com>
* gas/elf/file.[ds]: New.
* gas/elf/elf.exp: Run new test.
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* config/tc-cr16.c (md_apply_fix): Put the addend value alone in to
object file without symbol values.
(tc_gen_reloc): For local symbols resolved or its absolute symbol,
then set the relocation type as NULL.
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* elf32-cr16.c (elf_cr16_final_link_relocate): Add code to handle
to R_cr16_NUM32 relocation.
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* archures.c: Add bfd_mach_ppc_405
* bfd-in2.h: Same.
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frame.
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* cpu-i386.c (bfd_x86_64_arch): Fix comment typos.
* cpu-l1om.c (bfd_l1om_arch): Likewise.
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2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* archures.c (bfd_architecture): Add bfd_arch_l1om.
(bfd_l1om_arch): New.
(bfd_archures_list): Add &bfd_l1om_arch.
* bfd-in2.h: Regenerated.
* config.bfd (targ64_selvecs): Add bfd_elf64_l1om_vec if
bfd_elf64_x86_64_vec is supported. Add bfd_elf64_l1om_freebsd_vec
if bfd_elf64_x86_64_freebsd_vec is supported.
(targ_selvecs): Likewise.
* configure.in: Support bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
* configure: Regenerated.
* cpu-l1om.c: New.
* elf64-x86-64.c (elf64_l1om_elf_object_p): New.
(bfd_elf64_l1om_vec): Likewise.
(bfd_elf64_l1om_freebsd_vec): Likewise.
* Makefile.am (ALL_MACHINES): Add cpu-l1om.lo.
(ALL_MACHINES_CFILES): Add cpu-l1om.c.
* Makefile.in: Regenerated.
* targets.c (bfd_elf64_l1om_vec): New.
(bfd_elf64_l1om_freebsd_vec): Likewise.
(_bfd_target_vector): Add bfd_elf64_l1om_vec and
bfd_elf64_l1om_freebsd_vec.
binutils/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (guess_is_rela): Handle EM_L1OM.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(get_section_type_name): Likewise.
(get_elf_section_flags): Likewise.
(get_symbol_index_type): Likewise.
(is_32bit_abs_reloc): Likewise.
(is_32bit_pcrel_reloc): Likewise.
(is_64bit_abs_reloc): Likewise.
(is_64bit_pcrel_reloc): Likewise.
(is_none_reloc): Likewise.
gas/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (cpu_arch): Add l1om.
(check_cpu_arch_compatible): New.
(set_cpu_arch): Use it.
(i386_arch): New.
(i386_mach): Return bfd_mach_l1om for Intel L1OM.
(md_show_usage): Display l1om.
(i386_target_format): Return ELF_TARGET_L1OM_FORMAT if
cpu_arch_isa_flags.bitfield.cpul1om is set.
* config/tc-i386.h (TARGET_ARCH): Use (i386_arch ()).
(i386_arch): New.
(ELF_TARGET_L1OM_FORMAT): Likewise.
* doc/c-i386.texi: Document l1om.
gas/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/l1om.d: New.
* gas/i386/l1om-inval.l: Likewise.
* gas/i386/l1om-inval.s: Likewise.
* gas/i386/i386.exp: Run l1om-inval and l1om.
include/elf/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* common.h (EM_L1OM): New.
ld/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.tgt (targ64_extra_emuls): Add elf_l1om if elf_x86_64
is supported. Add elf_l1om_fbsd if elf_x86_64_fbsd is supported.
(targ_extra_emuls): Likewise.
* Makefile.am (ALL_64_EMULATIONS): Add eelf_l1om.o and
eelf_l1om_fbsd.o
(eelf_l1om.c): New.
(eelf_l1om_fbsd.c): Likewise.
* Makefile.in: Regenerated.
* emulparams/elf_l1om.sh: New.
* emulparams/elf_l1om_fbsd.sh: Likewise.
ld/testsuite/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/abs-l1om.d: New.
* ld-x86-64/protected2-l1om.d: Likewise.
* ld-x86-64/protected3-l1om.d: Likewise.
* ld-x86-64/x86-64.exp: Run abs-l1om, protected2-l1om and
protected3-l1om.
opcodes/
2009-07-25 H.J. Lu <hongjiu.lu@intel.com>
* configure.in: Handle bfd_l1om_arch.
* disassemble.c (disassembler): Likewise.
* configure: Regenerated.
* i386-dis.c (print_insn): Handle bfd_mach_l1om and
bfd_mach_l1om_intel_syntax. Use 8 bytes per line for Intel L1OM.
* i386-gen.c (cpu_flag_init): Set CPU_UNKNOWN_FLAGS to ~CpuL1OM.
Add CPU_L1OM_FLAGS.
(cpu_flags): Add CpuL1OM.
(set_bitfield): Take an argument to set the value field.
(process_i386_cpu_flag): Support ~CpuXXX and ~(CpuXXX|CpuYYY).
(process_i386_opcode_modifier): Updated.
(process_i386_operand_type): Likewise.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
* i386-opc.h (CpuL1OM): New.
(CpuXsave): Updated.
(i386_cpu_flags): Add cpul1om.
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