Age | Commit message (Collapse) | Author | Files | Lines |
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* invoke.texi (-mcpu=740, -mcpu=750): New options.
(-m(no-)multiple, -m(no-)string): Describe cases for PPC740 &
PPC750.
1999-01-11 Michael Meissner <meissner@cygnus.com>
* config/rs6000/rs6000.h ({ASM,CPP}_CPU_SPEC): Add support for all
machines supported with -mcpu=xxx.
(processor_type): Add PROCESSOR_PPC750.
(ADJUST_PRIORITY): Call rs6000_adjust_priority.
(RTX_COSTS): Supply costs for 750 multiply/divide operations.
(rs6000_adjust_priority): Add declaration.
* config/rs6000/rs6000.c (rs6000_override_options):
-mcpu={750,740} now sets the processor type as 750, not 603.
Allow -mmultiple and -mstring on little endian 750 systems.
(rs6000_adjust_priority): Stub for now.
(get_issue_rate): The PowerPC 750 can issue 2 instructions/cycle.
* config/rs6000/rs6000.md (function/cpu attributes): Add initial
ppc750 support.
* config/rs6000/sysv4.h (STRICT_ALIGNMENT): Don't force strict
alignment if little endian.
(CC1_SPEC): Pass -mstrict-align if little endian, and not
overridden.
(CC1_ENDIAN_{LITTLE,BIG,DEFAULT}_SPEC): Endian specific configs.
(SUBTARGET_EXTRA_SPECS): Add cc1 endian specs.
* config/rs6000/{sysv4,eabi}le.h (CC1_ENDIAN_DEFAULT_SPEC):
Override, default is little endian.
* config/rs6000/t-ppcgas (MULTILIB_*): Delete obsolete Solaris
multilibs.
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start-sanitize-gxsim
1999-01-11 Frank Ch. Eigler <fche@cygnus.com>
* sim-gx-run.c (sim_engine_run): Allay warnings. Write out updated
gx block list after each successful compilation job.
* sim-gx.c (sim_gx_compiled_block_f): dlopen the main executable
image, to allow gx block DLLs to resolve symbols there.
(sim_gx_{read,write}_block_list): Allay warnings.
(sim_gx_block_translate): Allay warnings. Add $GX_FLAGS to
gx compilation/link jobs.
* sim-gx.h: Allay warnings.
end-sanitize-gxsim
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1999-01-11 Frank Ch. Eigler <fche@cygnus.com>
* do-flags.S: New test for parallel PSW update conflicts.
* Makefile.in (TESTS): Run it.
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(init_exec_ops): New function, fills in exec_ops.
(_initialize_exec): Use it.
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1999-01-07 Frank Ch. Eigler <fche@cygnus.com>
* do-2wordops.S: New test for sign-extension by ld2h.
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pr 18634
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* gas/m32r/error.exp: Run it.
pr 18634
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* cpux.h: Regenerate.
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to conform to standards, fix spelling errors.
(ishex, stubhex, record_currthread, etc): Declare.
(ishex, stubhex): Declare char arg as int.
(pack_string): Comment out, never used but possibly useful.
(threadref_to_int, remote_get_threadinfo, etc): Make static.
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searching libtermcap directory.
* configure: Regenerate.
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as part of a project to merge in changes made by HP.
all-cfg.texi -- set HPPA for HP PA-RISC targets.
refcard.tex -- change documentation about catch; removed info catch.
HPPA-cfg.texi -- new file; HPPA configuration for manual.
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hp_som_som_object_present; added true and false tokens; changed some of
the template processing code for handling HP aCC templates.
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1999-01-06 Frank Ch. Eigler <fche@cygnus.com>
* mips-opc.c (div1): Add three-operand pattern, just like "div".
(divu1): Ditto for "divu".
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1999-01-06 Frank Ch. Eigler <fche@cygnus.com>
* gas/mips/r5900.[sd]: Add tests for multu1/div1/divu1 insns.
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pr 18655
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called from wait_for_inferior. Instead, if a new thread-id is
detected, call add_thread. (MAGIC_NULL_PID): new macro, use
instead of the magic number "42000". (remote_find_new_threads):
if inferior_pid is unknown, get and use the current thread id.
(remote_start_remote): on connecting, attempt to get the current
thread id for inferior_pid. (remote_resume): If pid == -1,
then resume any-thread (not the current thread specifically).
* thread.c (info_threads_command): don't initialize current_pid
until after call to FIND_NEW_THREADS (which may change inferior_pid).
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(INCLUDE_DEPS,OPS_INCLUDE_DEPS): Delete.
(sim-if.o): Use SIM_MAIN_DEPS.
(arch.o,traps.o,devices.o): Ditto.
(M32RBF_INCLUDE_DEPS): Use CGEN_MAIN_CPU_DEPS.
(m32r.o,mloop.o,cpu.o,decode.o,sem.o,model.o): Simplify dependencies.
(m32rx.o,mloopx.o,cpux.o,decodex.o,semx.o,modelx.o): Ditto.
(stamp-arch): Pass mach=all to cgen-arch.
* cpu.c,cpu.h,decode.c,model.c,sem-switch.c,sem.c: Regenerate.
* m32r-sim.h (fr30bf_h_cr_[gs]et_handler): Declare.
([GS]ET_H_CR): Define.
(fr30bf_h_psw_[gs]et_handler): Declare.
([GS]ET_H_PSW): Define.
(fr30bf_h_accum_[gs]et_handler): Declare.
([GS]ET_H_ACCUM): Define.
(fr30xf_h_{cr,psw,accum}_[gs]et_handler): Declare.
(fr30bf_h_accums_[gs]et_handler): Declare.
([GS]ET_H_ACCUMS): Define.
* sim-if.c (sim_open): Model probing code moved to sim-model.c.
* m32r.c (WANT_CPU): Define as m32rbf.
(all register access fns): Rename to ..._handler.
* cpux.c,cpux.h,decodex.c,modelx.c,semx.c: Regenerate.
* m32rx.c (WANT_CPU): Define as m32rxf.
(all register access fns): Rename to ..._handler.
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(CGEN_MAIN_SCM): Add rtx-funcs.scm.
(cgen-arch): Pass $(mach) to cgen.sh.
* cgen-engine.h (SEM_BRANCH_FINI): New arg pcvar, all uses updated.
(SEM_BRANCH_INIT_EXTRACT): New macro.
(SEM_BRANCH_INIT): Add taken_p.
(TARGET_SEM_BRANCH_FINI): Provide default definition.
(SEM_BRANCH_FINI): Use it.
(SEM_INSN): Update.
* cgen-run.c (sim_resume): Handle tracing of last insn.
* cgen-scache.h (WITH_SCACHE): Define as 0 if not defined.
* cgen-trace.c (current_abuf): New static global.
(trace_insn_init): Initialize it.
(trace_insn_fini): Use it.
(trace_insn): Set it.
* cgen.sh (arch case): Pass -m ${mach} to cgen.
* genmloop.sh (@cpu@_emit_before): Only define if WITH_SCACHE_PBB.
(@cpu@_emit_after): Ditto.
(simple @cpu@_engine_run_full): New local `pc'. Initialize semantic
labels if WITH_SEM_SWITCH_FULL.
* sim-model.c: Include bfd.h.
(sim_model_init): New function.
(sim_model_install): Record init fn.
* sim-model.h (MACH): New member bfd_name.
* sim-module.c (modules): Initialize model before scache.
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* cgen-asm.in (extract_normal): Ditto.
* fr30-asm.c,fr30-dis.c,fr30-opc.h,fr30-opc.c: Regenerate.
* i960c-asm.c,i960c-dis.c,i960c-opc.h,i960c-opc.c: Regenerate.
* m32r-asm.c,m32r-dis.c,m32r-opc.h,m32r-opc.c: Regenerate.
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breakpoint.c (catch_command_1): ditto.
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scope.exp, langs.exp, list.exp -- compile one file at a time, then link.
default.exp -- change expected messages for catch and info catch tests to
reflect hp merge changes.
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