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2022-11-11[wip] always compile in cgen logicusers/vapier/sim/cpu-uniMike Frysinger4-6/+7
2022-11-11sim: fully merge sim_cpu_base into sim_cpuMike Frysinger1-26/+19
2022-11-11sim: enable common sim_cpu usage everywhereMike Frysinger29-66/+1
2022-11-11sim: or1k: invert sim_cpu storageMike Frysinger5-30/+43
2022-11-11sim: m32r: invert sim_cpu storageMike Frysinger5-14/+10
2022-11-11sim: lm32: invert sim_cpu storageMike Frysinger3-12/+7
2022-11-11sim: iq2000: invert sim_cpu storageMike Frysinger3-11/+7
2022-11-11sim: frv: invert sim_cpu storageMike Frysinger3-23/+18
2022-11-11sim: cris: invert sim_cpu storageMike Frysinger6-239/+244
2022-11-11sim: bpf: invert sim_cpu storageMike Frysinger3-7/+13
2022-11-11sim: cgen: prep for inverting sim_cpu storageMike Frysinger2-0/+15
2022-11-11sim: riscv: invert sim_cpu storageMike Frysinger3-191/+258
2022-11-11sim: pru: invert sim_cpu storageMike Frysinger3-8/+31
2022-11-11sim: example-synacor: invert sim_cpu storageMike Frysinger3-37/+47
2022-11-11sim: h8300: invert sim_cpu storageMike Frysinger2-34/+36
2022-11-11sim: m68hc11: invert sim_cpu storageMike Frysinger10-354/+446
2022-11-11sim: mips: invert sim_cpu storageMike Frysinger2-73/+90
2022-11-11sim: v850: invert sim_cpu storageMike Frysinger3-20/+23
2022-11-11sim: mcore: invert sim_cpu storageMike Frysinger2-27/+41
2022-11-11sim: aarch64: invert sim_cpu storageMike Frysinger5-108/+152
2022-11-11sim: microblaze: invert sim_cpu storageMike Frysinger3-8/+8
2022-11-11sim: avr: invert sim_cpu storageMike Frysinger2-99/+108
2022-11-11sim: moxie: invert sim_cpu storageMike Frysinger2-14/+13
2022-11-11sim: msp430: invert sim_cpu storageMike Frysinger3-120/+106
2022-11-11sim: ft32: invert sim_cpu storageMike Frysinger3-95/+99
2022-11-11sim: bfin: invert sim_cpu storageMike Frysinger2-10/+5
2022-11-11sim: sim_cpu: invert sim_cpu storageMike Frysinger7-40/+46
2022-11-11[hack] sim: frv: make tests passMike Frysinger1-1/+1
2022-11-11sim: v850: rename v850.dc to align with other portsMike Frysinger3-2/+2
2022-11-11sim: igen: fix hang when decoding boolean rule constantsMike Frysinger1-0/+2
2022-11-11sim: igen: mark error func as noreturn since it exitsMike Frysinger1-1/+1
2022-11-11sim: igen: mark output funcs with printf attributeMike Frysinger2-7/+4
2022-11-11sim: igen: constify various func argumentsMike Frysinger31-265/+380
2022-11-11sim: ppc: rename ppc-instructions to powerpc.igenMike Frysinger4-6/+6
2022-11-10i386: Check invalid (%dx) usageH.J. Lu5-0/+44
2022-11-10gdb: make "start" breakpoint inferior-specificSimon Marchi4-1/+133
2022-11-10gdb: Fix regressions caused by 041de3d73aa121f2ff0c077213598963bfb34b79Bruno Larsen1-2/+2
2022-11-10gdb/debuginfod: Improve progress updatesAaron Merey6-162/+296
2022-11-10gdb: add special handling for frame level 0 in frame_info_ptrSimon Marchi2-6/+40
2022-11-10gdb: add missing prepare_reinflate call in print_frame_infoSimon Marchi1-0/+2
2022-11-10gdb: use frame_id_p instead of comparing to null_frame_id in frame_info_ptr::...Simon Marchi1-1/+1
2022-11-10gdb: remove manual frame_info reinflation code in backtrace_command_1Simon Marchi1-14/+1
2022-11-10gdb: move frame_info_ptr method implementations to frame-info.cSimon Marchi5-21/+55
2022-11-10gdb: add prepare_reinflate/reinflate around print_frame_args in info_frame_co...Simon Marchi2-0/+12
2022-11-10gdb: clear other.m_cached_id in frame_info_ptr's move ctorSimon Marchi1-0/+1
2022-11-10gdb/c++: Improve error messages in overload resolutionBruno Larsen3-4/+277
2022-11-10gdb/testsuite: allowed for function_range to deal with mangled functionsBruno Larsen1-1/+1
2022-11-10ld/testsuite: skip ld-size when -shared is not supportedClément Chigot1-0/+6
2022-11-10mach-o reloc size overflowAlan Modra1-1/+4
2022-11-10Sanity check reloc count in get_reloc_upper_boundAlan Modra5-34/+69
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