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2024-01-01sim: bfin: initial bf60x supportusers/vapier/sim/bfinMike Frysinger3-8/+169
2024-01-01se_all32bitopcodes: mark certain block of insns as invalid under simMike Frysinger1-0/+5
Are these actually invalid? Or is the sim getting it wrong?
2024-01-01ignore more stuffMike Frysinger1-0/+6
2024-01-01sim: bfin: add new GPIO model (bf60x)Mike Frysinger2-0/+381
This models the new GPIO controller found on BF60x processors.
2024-01-01sim: bfin: add new DDE (distributed DMA engine) model (bf60x)Mike Frysinger5-0/+772
This models the new DMA controller found on BF60x processors.
2024-01-01sim: bfin: add new SMC (static memory) model (bf60x)Mike Frysinger4-0/+287
This models the new static memory controller found on BF60x processors. 2012-08-28 Mike Frysinger <vapier@gentoo.org> * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_smc. * configure: Regenerated. * dv-bfin_smc.c, dv-bfin_smc.h: New device model. * machs.h (BFIN_MMR_SMC_SIZE): Define.
2024-01-01sim: bfin: add new EFS (Electronic Fuse Serial) model (bf60x)Mike Frysinger4-0/+226
This models the new fuse controller found on BF60x processors.
2024-01-01sim: bfin: add new SPU (system protection unit) model (bf60x)Mike Frysinger4-0/+183
This models the new system protection unit found on BF60x processors. This is mostly a stub implementation at the moment -- shims for the registers. 2012-08-28 Mike Frysinger <vapier@gentoo.org> * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_spu. * configure: Regenerated. * dv-bfin_spu.c, dv-bfin_spu.h: New device model. * machs.h (BFIN_MMR_SPU_SIZE): Define.
2024-01-01sim: bfin: add new SEC (system event controller) model (bf60x)Mike Frysinger4-0/+248
This models the new interrupt controller found on BF60x processors. This is mostly a stub implementation at the moment -- shims for the registers. There is no port routing yet. 2012-08-28 Mike Frysinger <vapier@gentoo.org> * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_sec. * configure: Regenerated. * dv-bfin_sec.c, dv-bfin_sec.h: New device model. * machs.h (BFIN_MMR_SEC_BASE): Define. (BFIN_MMR_SEC_SIZE): Likewise.
2024-01-01sim: bfin: add new CGU (clock generation) model (bf60x)Mike Frysinger4-0/+188
This models the new clock generation unit found on BF60x processors. 2012-08-28 Mike Frysinger <vapier@gentoo.org> * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_cgu. * configure: Regenerated. * dv-bfin_cgu.c, dv-bfin_cgu.h: New device model. * machs.h (BFIN_MMR_CGU_SIZE): Define.
2024-01-01sim: bfin: add new UART model (bf60x)Mike Frysinger8-14/+379
This models the latest UART implementation found on BF60x processors. 2012-08-28 Mike Frysinger <vapier@gentoo.org> * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_uart4. * configure: Regenerated. * dv-bfin_uart.c (bfin_uart_poll): Call bfin_uart_get_status with new second argument. (bfin_uart_get_status): Change to take a 2nd argument. Replace TEMT | THRE with new txs argument. * dv-bfin_uart.h: Include new dv-bfin_uart_core.h header. (struct bfin_uart, bfin_uart_get_next_byte, bfin_uart_write_byte, bfin_uart_get_status, bfin_uart_write_buffer, bfin_uart_read_buffer, bfin_uart_reschedule): Delete. * dv-bfin_uart2.c (bfin_uart_io_read_buffer): Call bfin_uart_get_status with new second argument. * dv-bfin_uart4.c, dv-bfin_uart4.h: New UART model. * dv-bfin_uart_core.h: New file. * machs.h (BFIN_MMR_UART4_SIZE): Define.
2024-01-01sim: bfin: handle invalid dsp32 mac/mult insnsMike Frysinger1-7/+52
2024-01-01b/sim/testsuite/sim/bfin/se_undefinedinstruction3.S is broke? need to test ↵Mike Frysinger1-0/+1
on hardware
2024-01-01sim: skip sysroot for most syscallsMike Frysinger1-9/+31
XXX: Need to qualify this better. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2024-01-01Revert "sim: bfin: add proper regs to dmac"Mike Frysinger3-47/+0
This reverts commit 29dd0cd28218880292b6d69322b09c09c04fd59b.
2024-01-01sim: bfin: add proper regs to dmacMike Frysinger3-0/+47
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2024-01-01sim: bfin: make the core timer output port an edgeMike Frysinger1-0/+2
The output port of the core timer is currently always high and never goes low, so make sure we lower the level after sending it out. This way the other side (the CEC) knows when to delatch things. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2011-04-26 Mike Frysinger <vapier@gentoo.org> * dv-bfin_ctimer.c (bfin_ctimer_expire): Call hw_port_event a 2nd time with a level of 0.
2024-01-01sim: bfin: keep output port levels from SIC level and up-to-dateMike Frysinger1-24/+25
When the internal interrupt routes get updated (via the IAR MMRs), we need to resend all the output levels as they might have changed. We also need to do this after the MMR write is committed instead of before so that we send out the most up-to-date value. Further, we need to send both high and low levels so that when a line goes low, the other side is made aware of this. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2011-04-25 Mike Frysinger <vapier@gentoo.org> * dv-bfin_sic.c (bfin_sic_forward_interrupts): Declare new local "levels" array. Drop empty ipend if check. Set levels to 1 instead of calling hw_port_event directly. Add a new loop over the levels array at the end of the func and move the HW_TRACE/hw_port_event call there. (bfin_sic_52x_io_write_buffer): Move the forward interrupts call after the value32p write, and run this code for IAR MMRs too. (bfin_sic_537_io_write_buffer, bfin_sic_54x_io_write_buffer, bfin_sic_561_io_write_buffer): Likewise.
2024-01-01sim: bfin: separate port levels from isa levels in the CECMike Frysinger1-3/+25
Since the input ports are level based (coming from the SIC/ctimer), make sure we keep those values separate from levels manually raised via insns (like RAISE and EXCPT) or cleared via MMRs (writes to ILAT). This way the peripherals can raise/lower their interrupt lines without affecting manual tweaking, and we get behavior that matches the hardware. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2011-04-25 Mike Frysinger <vapier@gentoo.org> * dv-bfin_cec.c (bfin_cec): Add "plat" member. (bfin_cec_io_read_buffer): Merge "plat" with "ilat" when reading the ILAT MMR. (bfin_cec_port_event): Use the incoming level to set/clear bits in "plat". When the bit isn't yet set, also call _cec_raise. (_cec_raise): Merge "plat" with "ilat" when calling __cec_get_ivg.
2024-01-01gdb: bfin: add some Blackfin-specific testsJie Zhang2-1/+20
Not sure this is still needed ... Signed-off-by: Jie Zhang <jie@codesourcery.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2024-01-01sim: tweak signed to unsigned local varsMike Frysinger6-21/+22
This tweaks a lot of hardware code to use "unsigned" instead of "int" to fix gcc warnings about signed/unsigned comparisons. In these cases, the code is already working with unsigned variables, so there shouldn't be a problem converting the local variables from "int". Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2010-04-10 Mike Frysinger <vapier@gentoo.org> * dv-sockser.c (dv_sockser_init): Change local tmp var to unsigned. * hw-ports.c, hw-ports.h (hw_port_encode): Change sizeof_buf arg to unsigned. * hw-properties.c (hw_add_range_array_property): Change local i var to unsigned. (hw_add_reg_array_property): Likewise. (hw_add_string_array_property): Change local vars sizeof_array and string_nr to unsigned. (hw_find_string_array_property): Change local vars nr_entries to unsigned. * hw-tree.c (split_device_specifier): Change local len var to unsigned. (print_properties): Change local cell_nr var to unsigned. * sim-core.c (sim_core_read_buffer): Change local nr_bytes var to unsigned. (sim_core_write_buffer): Likewise.
2024-01-01sim: bfin: add bootromsMike Frysinger28-0/+82432
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2024-01-01gdb: ignore test generated filesMike Frysinger1-0/+227
2024-01-01gitignore: ignore site.{bak,exp} treewideMike Frysinger1-0/+5
These files are never checked into cvs, and are generated by most testsuites, so ignore them. Signed-off-by: Mike Frysinger <vapier@gentoo.org> 2011-03-28 Mike Frysinger <vapier@gentoo.org> * .gitignore: Ignore site.bak and site.exp.
2024-01-01sim: ppc: merge misc igen APIsMike Frysinger10-292/+82
The common igen code provides the same misc APIs as the ppc version, so delete the ppc code and pull in the common one. There is one minor difference: the ppc code has a unique dumpf function. The common code switched to lf_printf for the same functionality, but since that requires changes throughout the igen codebase, delay that cleanup for now so we can merge the rest.
2024-01-01sim: ppc: rework igen error to match commonMike Frysinger10-22/+25
Switch to an ERROR macro and tweak the error signature to match the common igen version in preparation for merging the two implementations.
2024-01-01sim: igen: extend error to take argumentsMike Frysinger1-2/+2
The ppc igen error helper allows arbitrary printf calls, so extend the common one to do the same.
2024-01-01sim: ppc: rename igen max_insn_bit_sizeMike Frysinger3-5/+5
We want to avoid conflicts with the common igen enums. This should get migrated over to the common parsing logic, but for now, switch the name to avoid redefinition.
2024-01-01sim: igen: minor constify logicMike Frysinger1-2/+2
Copy some improvements from the ppc igen code.
2024-01-01sim: ppc: unify igen filter_filename implementationsMike Frysinger7-91/+8
Now that both igen implementations are in the top-level, we can unify the filter_filename implementation between them since they're the same (literally the same code).
2024-01-01sim: ppc: replace filter_filename with lbasenameMike Frysinger2-15/+8
The lbasename function from libiberty provides the same API as this custom function. The common/ code already made the switch, so make the same change to the ppc code to avoid target duplication.
2024-01-01sim: ppc: hoist igen compilation into top-levelMike Frysinger3-153/+325
This simplifies the build a bit (especially for deps in port subdirs), and avoids recursive make. This in turn speeds up the build, and lets us reuse existing build-time vs host-time logic from Makefile.am.
2024-01-01sim: ppc: drop build-config.h usageMike Frysinger8-73/+0
This header is only used by the igen tool, and none of the igen code depends on the configure-time checks. Delete the logic to simplify to prepare for moving it to the local.mk code.
2024-01-01sim: ppc: simplify filter_host.c logicMike Frysinger2-7/+19
Switch this from a build-time generation to a static include. This makes the build rules a bit simpler, especially as we move them to Automake from hand-written makefiles.
2024-01-01sim: igen: remove libigen.a when cleaningMike Frysinger2-8/+8
2024-01-01sim: ppc: drop unused host bitsize settingsMike Frysinger3-5/+0
This is never set anywhere, so it's always empty. Scrub it.
2024-01-01sim: frv: fix cmpb uninitialized variable usageMike Frysinger2-0/+2
This code sets up the cc variable based on the comparison of other registers, but it does so incrementally with bit operations, and it never initializes the cc variable. Initialize it to 0 which the cmpba insn is already doing.
2024-01-01sim: arm: mark local read-only arrays as static constMike Frysinger1-2/+2
Move it into read-only data sections to avoid constructing them on the stack at runtime.
2024-01-01sim: warnings: enable -Wunused-variableMike Frysinger2-2/+2
2024-01-01cpu: or1k: drop unused l.swa flagMike Frysinger3-3/+1
The "flag" argument isn't set/used in this insn, so drop it. This fixes an unused variable warning in the generated sim.
2024-01-01sim: fix pervasive typoTom Tromey9-42/+42
I noticed a typo in a sim constant. This patch fixes it. permenant -> permanent
2024-01-01Automatic date update in version.inGDB Administrator1-1/+1
2023-12-31Run 'black' on tui-window.pyTom Tromey1-2/+4
Mark pointed out that a recent patch of mine caused the buildbot to complain about the formatting of some Python test code. This patch re-runs 'black' to fix the problem.
2023-12-31[gdb/testsuite] Fix typo in gdb.base/catch-syscall.expTom de Vries1-1/+1
On aarch64-linux with a gdb build without libexpat, I run into: ... (gdb) PASS: gdb.base/catch-syscall.exp: determine pipe syscall: \ catch syscall 59 continue Continuing. Catchpoint 5 (call to syscall 59), 0x0000fffff7e04578 in pipe () from \ /lib64/libc.so.6 (gdb) FAIL: gdb.base/catch-syscall.exp: determine pipe syscall: continue ... In the test-case, this pattern handles either the syscall name or number for the pipe syscall: ... -re -wrap "Catchpoint $decimal \\(call to syscall (pipe|$SYS_pipe)\\).*" { ... but the pattern for the pipe2 syscall mistakenly uses SYS_pipe instead of SYS_pipe2: ... -re -wrap "Catchpoint $decimal \\(call to syscall (pipe2|$SYS_pipe)\\).*" { ... and consequently doesn't handle the pipe2 syscall number. Fix the typo by using SYS_pipe2 instead. Tested on aarch64-linux.
2023-12-31Automatic date update in version.inGDB Administrator1-1/+1
2023-12-30Add keywords to TuiWindow.writeTom Tromey2-4/+8
The gdb docs promise that methods with more than two or more arguments will accept keywords. However, I found that TuiWindow.write didn't allow them. This patch adds the missing support.
2023-12-30[gdb/testsuite] Fix gdb.base/gdb-index-err.exp for root userTom de Vries1-1/+7
When running test-case gdb.base/gdb-index-err.exp in a container as root user, I run into: ... FAIL: gdb.base/gdb-index-err.exp: flag=: \ try to write index to a non-writable directory FAIL: gdb.base/gdb-index-err.exp: flag=-dwarf-5: \ try to write index to a non-writable directory ... The test-case creates a directory without write permissions: ... $ ls -ald private dr-xr-xr-x 2 root root 4096 Dec 29 06:26 private/ ... but apparently the root user is still able to write in it. Fix this by making the test unsupported for the root user. Tested on x86_64-linux. Reviewed-By: Lancelot SIX <lancelot.six@amd.com> PR testsuite/31197 Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=31197
2023-12-30LoongArch: Commas inside double quotesAlan Modra1-1/+5
This adds an extra feature: Commas inside double quotes are not an arg delimiter, and thus can be part of the arg. * loongarch-coder.c (loongarch_split_args_by_comma): Commas inside quotes are not arg delimiters.
2023-12-30Regen bfd-in2.hAlan Modra1-1/+0
Please DON'T edit this file. READ THE COMMENT!
2023-12-30MAINTAINERS: Update my email addressJoseph Myers2-2/+2
There will be another update in January.
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