Age | Commit message (Collapse) | Author | Files | Lines |
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2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64.h (enum ia64_opnd): Move memory operand out of set of
indirect operands.
bfd/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* cpu-ia64-opc.c (elf64_ia64_operands): Move memory operand out of
set of indirect operands.
gas/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (enum reg_symbol): Delete IND_MEM.
(dot_rot): Change type of num_* variables. Check for positive count.
(ia64_optimize_expr): Re-structure.
(md_operand): Check for general register.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/index.[sl]: New.
* gas/ia64/rotX.[sl]: New.
* gas/ia64/ia64.exp: Run new tests.
opcodes/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* ia64-asmtab.c: Regenerate.
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2005-10-24 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.c (declare_register): Call symbol_create.
(md_begin): Remove local variables total, ar_base, and cr_base.
Start loops for registers at their respective first one. Don't
update md.regsym for alias names. Generate alias name tp for r13.
gas/testsuite/
2005-10-24 Jan Beulich <jbeulich@novell.com>
* gas/ia64/regs.pl: Also check tp alias of r13.
* gas/ia64/regs.s: Regenerate.
* gas/ia64/regs.d: Adjust.
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group sections.
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* coff-rs6000.c (rs6000coff_vec): Initialize
_bfd_init_private_section_data with
_bfd_generic_init_private_section_data.
(pmac_xcoff_vec): Likewise.
* coff64-rs6000.c (rs6000coff64_vec): Likewise.
(aix5coff64_vec): Likewise.
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2005-10-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/1487
* elf-bfd.h (_bfd_generic_init_private_section_data): New.
(_bfd_elf_init_private_section_data): New.
* elf.c (elf_fake_sections): Don't set SHF_GROUP for
relocatable link.
(bfd_elf_set_group_contents): Don't handle relocatable link
specially.
(assign_section_numbers): If it isn't called by assembler,
use the output section of elf_linked_to_section for
SHF_LINK_ORDER.
(_bfd_elf_init_private_section_data): New.
(_bfd_elf_copy_private_section_data): Call it.
* libbfd-in.h (_bfd_generic_init_private_section_data): New.
* libbfd.c (_bfd_generic_init_private_section_data): New.
* targets.c (BFD_JUMP_TABLE_COPY): Add
_bfd_generic_init_private_section_data.
(bfd_init_private_section_data): Likewise.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
ld/
2005-10-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/1487
* emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Call
bfd_match_sections_by_type to match section types.
* ldlang.c (init_os): Take the input section. Call
bfd_init_private_section_data if the input section isn't NULL.
(exp_init_os): Pass NULL to init_os.
(map_input_to_output_sections): Likewise.
(lang_add_section): Pass the input section to init_os.
ld/testsuite/
2005-10-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/1487
* ld-ia64/tlspic.rd: Updated.
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syms in gc'd sections.
(ppc64_elf_edit_opd): Don't adjust reloc counts when NO_OPD_RELOCS.
(elf_backend_action_discarded): Define.
(ppc64_elf_action_discarded): New function.
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(rs6000_info_powerpc_command): Remove function.
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PR bootstrap/24297
* Makefile.tpl (do-[+make-target+], do-check, install,
stage[+id+]-bubble, [+compare-target+]): Ensure $$r and $$s
are set before recursing.
* Makefile.in: Regenerate.
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names unstead of numbers.
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* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
indexld, indexls): .w variants have `1' bit.
(rot32.b): QI, not SI.
(rot32.w): HI, not SI.
(xchg16): HI for .w variant.
[opcodes]
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
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PR ld/1467
* ld-elf/orphan.d: New file.
* ld-elf/orphan.ld: Likewise.
* ld-elf/orphan.s: Likewise.
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(decode_locdesc): Don't set it.
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* ld-ia64/ia64.exp: Undo the last change. Add support for *.d.
* ld-ia64/link-order.d: New file.
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2005-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/251
* binutils-all/group.s: New file.
* binutils-all/objcopy.exp (objcopy_test_readelf): New
procedure.
Use it to test ELF group.
ld/testsuite/
2005-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/251
* ld-elf/group.2d: New file.
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* Makefile.def (gcc) <target>: Fix thinko.
* Makefile.in: Regenerate.
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2005-10-19 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/1487
* binutils-all/objcopy.exp (objcopy_test): New procedure.
Use it to test simple copy, ia64 link order and ELF unknown
section type.
* binutils-all/unknown.s: New file.
ld/testsuite/
2005-10-19 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/1487
* ld-elf/unknown.d: New file.
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into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
hence avoiding to emit a nop.
* gas/mips/mips.exp: Run new test.
* gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
jalr/jr to the compact jalrc/jrc instructions.
* gas/testsuite/gas/mips/mips16e-jrc.d: New.
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* ld-ia64/ia64.exp: Check link order for ld -r.
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PR binutils/1321
* binutils-all/link-order.s: New.
* binutils-all/objcopy.exp: Check ia64 link order.
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(get_arm_elf_section_data): Use it.
(unrecord_section_with_arm_elf_section_data): Use it.
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and multiply-and-add instructions.
* gas/s390/zarch-z9-109.d: Update expected result.
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instructions.
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* emulparams/armelf.sh: Add .ARM.attributes to OTHER_SECTIONS.
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LEX_BEGIN_NAME.
(bfin_start_line_hook): Remove the workaround for LSETUP(.
(bfin_name_is_register): Remove the workarounds for LSETUP(
and SAA(.
(bfin_start_label): Ditto.
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* gas/arm/eabi_attr_1.s: New test.
* gas/arm/eabi_attr_1.d: New test.
* gas/arm/arm7t.d: Only disassemble code sections.
* gas/arm/bignum1.d: Ignore Arm object attribute sections.
* gas/arm/mapping.d: Ditto.
* gas/arm/unwind.d: Ditto.
* gas/elf/section0.d: Ditto.
* gas/elf/section1.d: Ditto.
* gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
* gas/elf/section2.e-armeabi: New file.
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default_lit_sections regardless of use_literal_section.
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reading instruction from memory.
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* Makefile.in: Regenerated.
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powerpc64.
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