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2018-02-22New plugin interface to get list of symbols wrapped with --wrap option.Sriraman Tallam10-10/+261
2018-02-22 Sriraman Tallam <tmsriram@google.com> * plugin.cc (get_wrap_symbols): New plugin interface. (load): Add get_wrap_symbols to transfer vector. * plugin-api.h (ld_plugin_get_wrap_symbols): New plugin interface. * testsuite/plugin_test.c (onload): Call and check get_wrap_symbols interface. * testsuite/plugin_test_wrap_symbols.sh: New test script. * testsuite/plugin_test_wrap_symbols_1.cc: New file. * testsuite/plugin_test_wrap_symbols_2.cc: New file. * testsuite/Makefile.am (plugin_test_wrap_symbols): New test. * testsuite/Makefile.in: Regenerate.
2018-02-22RISC-V: Make disassebler work for --enable-targets=all config.Jim Wilson2-0/+5
opcodes/ * disassemble.c (ARCH_riscv): Define if ARCH_all.
2018-02-22Diagnose when trying to assemble conditional FP16 vmovx and vinsAndre Simoes Dias Vieira3-205/+279
This patch makes GAS emit a warning when trying to assemble the Armv8.2 FP16 instructions VMOVX and VINS with condition codes. The Armv8-A Reference Manual specifies these instructions without conditional codes and says that if they are found in an IT block that they are CONSTRAINED UNPREDICABLE. gas/ChangeLog: 2018-02-22 Andre Vieira <andre.simoesdiasvieira@arm.com> * config/tc-arm.c (do_neon_movhf): If conditional error out when in arm mode and emit warning in thumb mode. * testsuite/gas/arm/armv8-2-fp16-scalar-bad.s: Add new tests. * testsuite/gas/arm/armv8-2-fp16-scalar-bad.l: Idem.
2018-02-22x86: Add {rex} pseudo prefixH.J. Lu8-0/+114
Add {rex} pseudo prefix to generate a REX byte for integer and legacy vector instructions if possible. Note that this differs from the rex prefix which generates REX prefix unconditionally. gas/ * config/tc-i386.c (_i386_insn): Add rex_encoding. (md_assemble): When i.rex_encoding is true, generate a REX byte if possible. (parse_insn): Set i.rex_encoding for {rex}. * doc/c-i386.texi: Document {rex}. * testsuite/gas/i386/x86-64-pseudos.s: Add {rex} tests. * testsuite/gas/i386/x86-64-pseudos.d: Updated. opcodes/ * i386-opc.tbl: Add {rex}, * i386-tbl.h: Regenerated.
2018-02-22Fix memory access violation when attempting to shorten a suffixed micromips ↵A. Wilcox2-1/+7
instruction during lookup. PR 22014 * config/tc-mips.c (mips_lookup_insn): Use memmove to strip the instruction size suffix.
2018-02-22Automatic date update in version.inGDB Administrator1-1/+1
2018-02-21Fix a typo.John Baldwin2-1/+5
gdb/testsuite/ChangeLog: * gdb.arch/amd64-i386-address.exp: Fix a typo.
2018-02-21Add "common-defs.h" include to files in arch/ subdir not yet including it.John Baldwin4-1/+9
This fixes a build breakage on FreeBSD hosts. gdb/ChangeLog: * arch/aarch64.c: Include "common-defs.h". * arch/amd64.c: Likewise. * arch/i386.c: Likewise.
2018-02-21Remove a cleanup from parse_expression_for_completionTom Tromey6-34/+38
This removes a cleanup from parse_expression_for_completion, by changing various expression-completion functions to use gdb::unique_xmalloc_ptry rather than explicit malloc+free. Regression tested by the buildbot. gdb/ChangeLog 2018-02-21 Tom Tromey <tom@tromey.com> * value.h: (extract_field_op): Update. * eval.c (extract_field_op): Return a const char *. * expression.h (parse_expression_for_completion): Update. * completer.c (complete_expression): Update. (add_struct_fields): Make fieldname const. * parse.c (expout_completion_name): Now a unique_xmalloc_ptr. (mark_completion_tag, parse_exp_in_context_1): Update. (parse_expression_for_completion): Change "name" to unique_xmalloc_ptr*.
2018-02-21Remove a cleanup from call_function_by_hand_dummyTom Tromey2-13/+10
This removes a cleanup from call_function_by_hand_dummy, replacing manual allocation with std::vector. Regression tested by the buildbot. gdb/ChangeLog 2018-02-21 Tom Tromey <tom@tromey.com> * infcall.c (call_function_by_hand_dummy): Use std::vector.
2018-02-21Pass readable_regcache to gdbarch method read_pcYao Qi9-16/+31
We can pass readable_regcache to gdbarch method read_pc where it is allowed to do read from regcache. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * avr-tdep.c (avr_read_pc): Change parameter type to readable_regcache. * gdbarch.sh (read_pc): Likewise. * gdbarch.c: Re-generated. * gdbarch.h: Re-generated. * hppa-tdep.c (hppa_read_pc): Change parameter type to readable_regcache. * ia64-tdep.c (ia64_read_pc): Likewise. * mips-tdep.c (mips_read_pc): Likewise. * spu-tdep.c (spu_read_pc): Likewise.
2018-02-21Move register_dump to regcache-dump.cYao Qi5-416/+459
gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * Makefile.in (COMMON_SFILES): Add regcache-dump.c * regcache-dump.c: New file. * regcache.c: Move register_dump to regcache-dump.c. (maintenance_print_registers): Likewise. (maintenance_print_raw_registers): Likewise. (maintenance_print_cooked_registers): Likewise. (maintenance_print_register_groups): Likewise. (maintenance_print_remote_registers): Likewise. (_initialize_regcache): Likewise. * regcache.h (register_dump): Moved from regcache.c.
2018-02-21Remove regcache::m_readonly_pYao Qi3-33/+38
Now, m_readonly_p is always false, so we can remove it, and regcache no longer includes pseudo registers. Some regcache methods are lift up to its parent class, like reg_buffer or detached_regcache. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * regcache.c (regcache::regcache): Update. (regcache::invalidate): Move it to detached_regcache::invalidate. (get_thread_arch_aspace_regcache): Update. (regcache::raw_update): Update. (regcache::cooked_read): Remove some code. (regcache::cooked_read_value): Likewise. (regcache::raw_write): Remove assert on m_readonly_p. (regcache::raw_supply_integer): Move it to detached_regcache::raw_supply_integer. (regcache::raw_supply_zeroed): Likewise. * regcache.h (detached_regcache) <raw_supply_integer>: New declaration. <raw_supply_zeroed, invalidate>: Likewise. (regcache) <raw_supply_integer, raw_supply_zeroed>: Removed. <invalidate>: Likewise. <m_readonly_p>: Removed.
2018-02-21No longer create readonly regcacheYao Qi4-29/+67
Nowadays, we create a readonly regcache in get_return_value, and pass it to gdbarch_return_value to get the return value. In theory, we can pass a readable_regcache instance and get the return value, because we don't need to modify the regcache. Unfortunately, gdbarch_return_value is designed to multiplex regcache, according to READBUF and WRITEBUF. # If READBUF is not NULL, extract the return value and save it in this # buffer. # # If WRITEBUF is not NULL, it contains a return value which will be # stored into the appropriate register. In fact, gdbarch_return_value should be split to three functions, 1) only return return_value_convention, 2) pass regcache_readonly and readbuf, 3) pass regcache and writebuf. These changes are out of the scope of this patch series, so I pass regcache to gdbarch_return_value even for read, and trust each gdbarch backend doesn't modify regcache. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * infcmd.c (get_return_value): Let stop_regs point to get_current_regcache. * regcache.c (regcache::regcache): Remove. (register_dump_reg_buffer): New class. (regcache_print): Adjust. * regcache.h (regcache): Remove constructors.
2018-02-21Replace regcache::dump with class register_dumpYao Qi3-207/+294
Nowadays, we need to dump registers contents from "readwrite" regcache and "readonly" regcache, if (target_has_registers) get_current_regcache ()->dump (out, what_to_dump); else { /* For the benefit of "maint print registers" & co when debugging an executable, allow dumping a regcache even when there is no thread selected / no registers. */ regcache dummy_regs (target_gdbarch ()); dummy_regs.dump (out, what_to_dump); } since we'll have two different types/classes for "readwrite" regcache and "readonly" regcache, we have to move dump method to their parent class, reg_buffer. However, the functionality of "dump" looks unnecessary to reg_buffer (because some dump modes like regcache_dump_none, regcache_dump_remote and regcache_dump_groups don't need reg_buffer at all, they need gdbarch to do the dump), so I decide to move "dump" into a separate classes, and each sub-class is about each mode of dump. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * regcache.c (class register_dump): New class. (register_dump_regcache, register_dump_none): New class. (register_dump_remote, register_dump_groups): New class. (regcache_print): Update. * regcache.h (regcache_dump_what): Move it to regcache.c. (regcache) <dump>: Remove.
2018-02-21Class detached_regcacheYao Qi5-61/+65
jit.c uses the regcache in a slightly different way, the regcache dosen't write through to target, but it has read and write methods. If I apply regcache in record-full.c, it has the similar use pattern. This patch adds a new class detached_regcache, a register buffer, but can be read and written. Since jit.c doesn't want to write registers through to target, it uses regcache as a readonly regcache (because only readonly regcache disconnects from the target), but it adds a hole in regcache (raw_set_cached_value) in order to modify a readonly regcache. This patch fixes this hole completely. regcache inherits detached_regcache, and detached_regcache inherits readable_regcache. The ideal design is that both detached_regcache and readable_regcache inherit reg_buffer, and regcache inherit detached_regcache and regcache_read (virtual inheritance). I concern about the performance overhead of virtual inheritance, so I don't do it in the patch. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * jit.c (struct jit_unwind_private) <regcache>: Change its type to reg_buffer_rw *. (jit_unwind_reg_set_impl): Call raw_supply. (jit_frame_sniffer): Use reg_buffer_rw. * record-full.c (record_full_core_regbuf): Change its type. (record_full_core_open_1): Use reg_buffer_rw. (record_full_close): Likewise. (record_full_core_fetch_registers): Use regcache->raw_supply. (record_full_core_store_registers): Likewise. * regcache.c (regcache::get_register_status): Move it to reg_buffer. (regcache_raw_set_cached_value): Remove. (regcache::raw_set_cached_value): Remove. (regcache::raw_write): Call raw_supply. (regcache::raw_supply): Move it to reg_buffer_rw. * regcache.h (regcache_raw_set_cached_value): Remove. (reg_buffer_rw): New class.
2018-02-21Class readonly_detached_regcacheYao Qi12-64/+118
This patch adds a new class (type) for readonly regcache, which is created via regcache::save. readonly_detached_regcache inherits readable_regcache. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * dummy-frame.c (dummy_frame_cache) <prev_regcache>: Use readonly_detached_regcache. (dummy_frame_prev_register): Use regcache->cooked_read. * frame.c (frame_save_as_regcache): Change return type. (frame_pop): Update. * frame.h (frame_save_as_regcache): Update declaration. * inferior.h (get_infcall_suspend_state_regcache): Update declaration. * infrun.c (infcall_suspend_state) <registers>: use readonly_detached_regcache. (save_infcall_suspend_state): Don't use regcache_dup. (get_infcall_suspend_state_regcache): Change return type. * linux-fork.c (struct fork_info) <savedregs>: Change to readonly_detached_regcache. <pc>: New field. (fork_save_infrun_state): Don't use regcache_dup. (info_checkpoints_command): Adjust. * mi/mi-main.c (register_changed_p): Update declaration. (mi_cmd_data_list_changed_registers): Use readonly_detached_regcache. (register_changed_p): Change parameter type to readonly_detached_regcache. * ppc-linux-tdep.c (ppu2spu_cache) <regcache>: Use readonly_detached_regcache. (ppu2spu_sniffer): Construct a new readonly_detached_regcache. * regcache.c (readonly_detached_regcache::readonly_detached_regcache): New. (regcache::save): Move it to reg_buffer. (regcache::restore): Change parameter type. (regcache_dup): Remove. * regcache.h (reg_buffer) <save>: New method. (readonly_detached_regcache): New class. * spu-tdep.c (spu2ppu_cache) <regcache>: Use readonly_detached_regcache. (spu2ppu_sniffer): Construct a new readonly_detached_regcache.
2018-02-21Remove regcache_save and regcache_cpyYao Qi7-46/+36
... instead we start to use regcache methods save and restore. It is quite straightforward to replace regcache_save with regcache->save. regcache_cpy has some asserts, some of them not necessary, like gdb_assert (src != dst); because we already assert !m_readonly_p and src->m_readonly_p, so src isn't dst. Some of the asserts are moved to ::restore. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * frame.c (frame_save_as_regcache): Use regcache method save. (frame_pop): Use regcache method restore. * infrun.c (restore_infcall_suspend_state): Likewise. * linux-fork.c (fork_load_infrun_state): Likewise. * ppc-linux-tdep.c (ppu2spu_sniffer): User regcache method save. * regcache.c (regcache_save): Remove. (regcache::restore): More asserts. (regcache_cpy): Remove. * regcache.h (regcache_save): Remove the declaration. (regcache::restore): Move from private to public. Remove the friend declaration of regcache_cpy. (regcache_cpy): Remove declaration.
2018-02-21class readable_regcache and pass readable_regcache to gdbarch ↵Yao Qi32-122/+247
pseudo_register_read and pseudo_register_read_value pseudo registers are either from raw registers or memory, so gdbarch methods pseudo_register_read and pseudo_register_read_value should have regcache object which only have read methods. In other words, we should disallow writing to regcache in these two gdbarch methods. In order to apply this restriction, this patch adds a new class readable_regcache, derived from reg_buffer, and it only has raw_read and cooked_read methods. regcache is derived from readable_regcache. This patch also passes readable_regcache instead of regcache to gdbarch methods pseudo_register_read and pseudo_register_read_value. This patch moves raw_read* and cooked_read* methods to readable_regcache, which is straightforward. One thing not straightforward is that I split regcache::xfer_part to readable_regcache::read_part and regcache::write_part, because readable_regcache can only have methods to read. readable_regcache is an abstract base class, and it has a pure virtual function raw_update, because I don't want readable_regcache know where these raw registers are from. They can be from either the target (readwrite regcache) or the regcache itself (readonly regcache). gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * aarch64-tdep.c (aarch64_pseudo_register_read_value): Change parameter type to 'readable_regcache *'. * amd64-tdep.c (amd64_pseudo_register_read_value): Likewise. * arm-tdep.c (arm_neon_quad_read): Likewise. (arm_pseudo_read): Likewise. * avr-tdep.c (avr_pseudo_register_read): Likewise. * bfin-tdep.c (bfin_pseudo_register_read): Likewise. * frv-tdep.c (frv_pseudo_register_read): Likewise. * gdbarch.c: Re-generated. * gdbarch.h: Re-generated. * gdbarch.sh (pseudo_register_read): Change parameter type to 'readable_regcache *'. (pseudo_register_read_value): Likewise. * h8300-tdep.c (pseudo_from_raw_register): Likewise. (h8300_pseudo_register_read): Likewise. * hppa-tdep.c (hppa_pseudo_register_read): Likewise. * i386-tdep.c (i386_mmx_regnum_to_fp_regnum): Likewise. (i386_pseudo_register_read_into_value): Likewise. (i386_pseudo_register_read_value): Likewise. * i386-tdep.h (i386_pseudo_register_read_into_value): Update declaration. * ia64-tdep.c (ia64_pseudo_register_read): Likewise. * m32c-tdep.c (m32c_raw_read): Likewise. (m32c_read_flg): Likewise. (m32c_banked_register): Likewise. (m32c_banked_read): Likewise. (m32c_sb_read): Likewise. (m32c_part_read): Likewise. (m32c_cat_read): Likewise. (m32c_r3r2r1r0_read): Likewise. (m32c_pseudo_register_read): Likewise. * m68hc11-tdep.c (m68hc11_pseudo_register_read): Likewise. * mep-tdep.c (mep_pseudo_cr32_read): Likewise. (mep_pseudo_cr64_read): Likewise. (mep_pseudo_register_read): Likewise. * mips-tdep.c (mips_pseudo_register_read): Likewise. * msp430-tdep.c (msp430_pseudo_register_read): Likewise. * nds32-tdep.c (nds32_pseudo_register_read): Likewise. * regcache.c (regcache::raw_read): Move it to readable_regcache. (regcache::cooked_read): Likewise. (regcache::cooked_read_value): Likewise. (regcache_cooked_read_signed): (regcache::cooked_read): Likewise. * regcache.h (readable_regcache): New class. (regcache): Inherit readable_regcache. Move some methods to readable_regcache. * rl78-tdep.c (rl78_pseudo_register_read): Change parameter type to 'readable_regcache *'. * rs6000-tdep.c (do_regcache_raw_read): Remove. (e500_pseudo_register_read): Change parameter type to 'readable_regcache *'. (dfp_pseudo_register_read): Likewise. (vsx_pseudo_register_read): Likewise. (efpr_pseudo_register_read): Likewise. * s390-tdep.c (s390_pseudo_register_read): Likewise. * sh-tdep.c (sh_pseudo_register_read): Likewise. * sh64-tdep.c (pseudo_register_read_portions): Likewise. (sh64_pseudo_register_read): Likewise. * sparc-tdep.c (sparc32_pseudo_register_read): Likewise. * sparc64-tdep.c (sparc64_pseudo_register_read): Likewise. * spu-tdep.c (spu_pseudo_register_read_spu): Likewise. (spu_pseudo_register_read): Likewise. * xtensa-tdep.c (xtensa_register_read_masked): Likewise. (xtensa_pseudo_register_read): Likewise.
2018-02-21Class reg_bufferYao Qi3-35/+68
This patch adds a new class reg_buffer, and regcache inherits it. Class reg_buffer is a very simple class, which has the buffer for register contents and status only. It doesn't have any methods to set contents and status, and it is expected that its children classes can inherit it and add different access methods. Another reason I keep class reg_buffer so simple is that I think reg_buffer can be even reused in other classes which need to record the registers contents and status, like frame cache for example. gdb: 2018-02-21 Yao Qi <yao.qi@linaro.org> * regcache.c (regcache::regcache): Call reg_buffer ctor. (regcache::arch): Move it to reg_buffer::arch. (regcache::register_buffer): Likewise. (regcache::assert_regnum): Likewise. (regcache::num_raw_registers): Likewise. * regcache.h (reg_buffer): New class. (regcache): Inherit reg_buffer.
2018-02-21ia64 testsuite changes for --gc-sectionsAlan Modra20-28/+52
* testsuite/ld-elf/group8b.d: Run test on ia64. Use xfail rather than notarget. * testsuite/ld-elf/pr12851.d: Likewise. * testsuite/ld-elf/pr12975.d: Likewise. * testsuite/ld-elf/pr13177.d: Likewise. * testsuite/ld-elf/pr13195.d: Likewise. * testsuite/ld-elf/pr17615.d: Likewise. * testsuite/ld-elf/pr21562a.d: Likewise. * testsuite/ld-elf/pr21562b.d: Likewise. * testsuite/ld-elf/pr21562c.d: Likewise. * testsuite/ld-elf/pr21562d.d: Likewise. * testsuite/ld-elf/pr21562i.d: Likewise. * testsuite/ld-elf/pr21562j.d: Likewise. * testsuite/ld-elf/pr21562k.d: Likewise. * testsuite/ld-elf/pr21562l.d: Likewise. * testsuite/ld-elf/pr21562m.d: Likewise. * testsuite/ld-elf/pr21562n.d: Likewise. * testsuite/ld-elf/group9a.d: Run test on ia64 and alpha. Use xfail rather than notarget. * testsuite/ld-elf/group9b.d: Likewise. * testsuite/ld-elf/pr22677.d: Likewise.
2018-02-21Automatic date update in version.inGDB Administrator1-1/+1
2018-02-20MIPS16/GAS/testsuite: Add cross-section R_MIPS16_PC16_S1 relocation testsMaciej W. Rozycki6-0/+122
Add a pair of MIPS16 branch tests to verify correct R_MIPS16_PC16_S1 relocation generation for cross-section references in a single source. This complements commit c9775dde3277 ("MIPS16: Add R_MIPS16_PC16_S1 branch relocation support"). gas/ * testsuite/gas/mips/mips16-branch-reloc-4.d: New test. * testsuite/gas/mips/mips16-branch-reloc-5.d: New test. * testsuite/gas/mips/mips16-branch-reloc-4.s: New test source. * testsuite/gas/mips/mips16-branch-reloc-5.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2018-02-20MIPS16/opcodes: Free up `M' operand codeMaciej W. Rozycki4-5/+12
The `M' and `m' MIPS16 operand codes are functionally the same, denoting a 7-bit register list that is encoded the same way for both SAVE and RESTORE. Use `m' for both instructions then, making `M' available for a different use. opcodes/ * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case. (mips16_opcodes): Replace `M' with `m' for "restore". include/ * opcode/mips.h: Remove `M' operand code.
2018-02-20gas: xtensa: limit size of auto litpoolsMax Filippov7-45/+119
Literal movement code may grow auto litpool so big that it won't be possible to jump around it. Limit the size of auto litpools by 1/2 of the jump range. gas/ 2018-02-20 Max Filippov <jcmvbkbc@gmail.com> * config/tc-xtensa.c (struct litpool_frag): Add new field literal_count. (MAX_AUTO_POOL_LITERALS, MAX_EXPLICIT_POOL_LITERALS) (MAX_POOL_LITERALS): New macro definitions. (auto_litpool_limit): Initialize to 0. (md_parse_option): Set auto_litpool_limit in the presence of --auto-litpools option. (xtensa_maybe_create_literal_pool_frag): Zero-initialize literal_count field. (xg_find_litpool): New function. Make sure that found literal pool size is within the limit. (xtensa_move_literals): Extract literal pool search code into the new function. * testsuite/gas/xtensa/all.exp: Add auto-litpools-2 test. * testsuite/gas/xtensa/auto-litpools-2.d: New file. * testsuite/gas/xtensa/auto-litpools-2.s: New file. * testsuite/gas/xtensa/auto-litpools.d: Fix up changed addresses. * testsuite/gas/xtensa/auto-litpools.s: Change literal value so that objdump doesn't get out of sync.
2018-02-20remote-sim: Add missing ATTRIBUTE_PRINTFSimon Marchi2-5/+10
Fixes: /home/emaisin/src/binutils-gdb/gdb/remote-sim.c:385:34: error: format string is not a string literal [-Werror,-Wformat-nonliteral] vfprintf_filtered (gdb_stdout, format, args); ^~~~~~ /home/emaisin/src/binutils-gdb/gdb/remote-sim.c:394:34: error: format string is not a string literal [-Werror,-Wformat-nonliteral] vfprintf_filtered (gdb_stdout, format, ap); ^~~~~~ /home/emaisin/src/binutils-gdb/gdb/remote-sim.c:402:34: error: format string is not a string literal [-Werror,-Wformat-nonliteral] vfprintf_filtered (gdb_stderr, format, ap); ^~~~~~ /home/emaisin/src/binutils-gdb/gdb/remote-sim.c:413:11: error: format string is not a string literal [-Werror,-Wformat-nonliteral] verror (format, args); ^~~~~~ 4 errors generated. gdb/ChangeLog: * remote-sim.c (gdb_os_printf_filtered, gdb_os_vprintf_filtered, gdb_os_evprintf_filtered, gdb_os_error): Add ATTRIBUTE_PRINTF.
2018-02-20Fix typo in listing of objcopy's command line options.Ronald Hoogenboom2-1/+6
binutils* doc/binutils.texi (objcopy): Add missing closing square parenthesis to listing of objcopy's command line options.
2018-02-20Enable link time garbage collection support for the IA64 target.Jason Duerstock2-0/+5
As suggested in long ago in a galaxy far, far away [1], I tried turning it on and it seems to work, as is evidenced by the Mesa package in Debian/ia64. Please enable it with the following patch. [1] https://sourceware.org/ml/binutils/2007-07/msg00241.html bfd * elfnn-ia64.c (elf_backend_can_gc_sections): Enable.
2018-02-20gnulib: import mkstempMarkus Metzger16-21/+938
Older versions of MinGW do not support mkstemp causing: gdb/unittests/scoped_fd-selftests.c:37:29: error: \ 'mkstemp' was not declared in this scope int fd = mkstemp (filename); ^ gdb/unittests/scoped_fd-selftests.c: In function 'void selftests::scoped_fd::test_release()': gdb/unittests/scoped_fd-selftests.c:56:29: error: \ 'mkstemp' was not declared in this scope int fd = mkstemp (filename); ^ Import mkstemp from gnulib. gdb/ * gnulib/update-gnulib.sh (IMPORTED_GNULIB_MODULES): Add mkstemp. * gnulib/aclocal.m4: Regenerated. * gnulib/config.in: Regenerated. * gnulib/configure: Regenerated. * gnulib/import/Makefile.am: Regenerated. * gnulib/import/Makefile.in: Regenerated. * gnulib/import/m4/gnulib-cache.m4: Regenerated. * gnulib/import/m4/gnulib-comp.m4: Regenerated. * gnulib/import/m4/mkstemp.m4: Imported. * gnulib/import/m4/secure_getenv.m4: Imported. * gnulib/import/m4/tempname.m4: Imported. * gnulib/import/mkstemp.c: Imported. * gnulib/import/secure_getenv.c: Imported. * gnulib/import/tempname.c: Imported. * gnulib/import/tempname.h: Imported.
2018-02-20btrace, testsuite: do not force BTSMarkus Metzger2-9/+10
In gdb.btrace/buffer-size.exp we explicitly ask for the BTS recording format. This may lead to spurious fails on systems where PT is being used by some other process at the same time. Set both PT and BTS buffer sizes to 1 and check that whatever recording format is used will use a 4KB buffer. testsuite/ * gdb.btrace/buffer-size.exp: Do not force BTS.
2018-02-20Clarify .arch_extension possible valuesThomas Preud'homme2-1/+6
Documentation for .arch_extension says it accepts the same architectural extensions as those accepted by -mcpu. Given the name and the fact that -march for obvious reason also accept the same extensions, I believe it's worth mentioning that it accepts the same extensions as both -march and -mcpu. This commit addresses that. 2018-02-20 Thomas Preud'homme <thomas.preudhomme@arm.com> gas/ * doc/c-arm.texi (.arch_extension): Mention extensions it accepts are also the same as -march.
2018-02-20Fix make 3.81 build errorsAlan Hayward2-13/+18
gdbserver/ * Makefile.in: Switch order of make rules.
2018-02-20Automatic date update in version.inGDB Administrator1-1/+1
2018-02-19gdb/doc: Additional information about 'info line'Andrew Burgess2-6/+18
Extend the documentation of 'info line' command to: 1. Make 'info line' with no argument more obvious, and make it clearer what this does. 2. Cover what happens when a secod 'info line' with no argument is issued. 3. Extend the example output for 'info line ...' to include symbolic addresses. gdb/doc/ChangeLog: * gdb.texinfo (Machine Code): Additional information about "info line" command.
2018-02-19Revert "_bfd_mips_elf_final_link: Notify user about wrong .reginfo size"Maciej W. Rozycki2-10/+9
Revert commit 58807c48a5a3 ("_bfd_mips_elf_final_link: Notify user about wrong .reginfo size") now that the size of the `.reginfo' section has been truly fixed in `_bfd_mips_elf_section_processing', meaning that the offending condition can be asserted again. bfd/ Revert 2018-01-12 Vlad Ivanov <vlad@ivanov.email> * elfxx-mips.c (_bfd_mips_elf_final_link): Notify user when .reginfo section has wrong size.
2018-02-19MIPS/BFD: Fix the size of `.reginfo' and `.MIPS.abiflags' sectionsMaciej W. Rozycki22-3/+196
Use the SEC_FIXED_SIZE flag to actually fix the size of `.reginfo' and `.MIPS.abiflags' sections in `_bfd_mips_elf_always_size_sections', as originally intended, removing link failures such as: ld: final link failed: Section has no contents or: ld: final link failed: Bad value or: ld: foo: .reginfo section size should be 24 bytes, actual size is 32 and assertion failures like: ld: BFD (GNU Binutils) 2.30.51.20180131 assertion fail .../bfd/elfxx-mips.c:14322 in link scenarios involving a linker script that either creates an output `.reginfo' or `.MIPS.abiflags' section from scratch or produces either section from different sections. If such an output section's size turns out to be incorrect according to the psABI, then the section is either truncated or padded out to the correct size, as relevant. This allows people to handle these sections in a link in an unusual way, while still addressing the issue covered by commit 58807c48a5a3 ("_bfd_mips_elf_final_link: Notify user about wrong .reginfo size"). The original arrangement, coming from an unindentified change made to what was called `mips_elf_always_size_sections' back then, between commit 02650bd0a97e ("This adds ABI flags to MIPS/ELF object files.") and commit 252b5132c753 ("19990502 sourceware import"), also missing from BFD ChangeLog files, assumed that the output section size is not going to change after return from `bfd_elf_size_dynamic_sections', the caller of that function, called in turn from `ldemul_before_allocation' via `gld${EMULATION_NAME}_before_allocation' in ld/emultempl/elf32.em, and ultimately from `lang_process'. This is because later on in `lang_process' processing `lang_size_sections' is called , happily recalculating the section size, and it has actually already been the case at the time of commit 252b5132c753 ("19990502 sourceware import"), so the assumption was clearly incorrect right from the beginning. bfd/ * elfxx-mips.c (_bfd_mips_elf_always_size_sections): Set SEC_FIXED_SIZE and SEC_HAS_CONTENTS flags for `.reginfo' and `.MIPS.abiflags' sections. (_bfd_mips_elf_final_link): Avoid reading beyond `.reginfo' section's end. ld/ * testsuite/ld-mips-elf/reginfo-0.d: New test. * testsuite/ld-mips-elf/reginfo-0r.d: New test. * testsuite/ld-mips-elf/reginfo-1.d: New test. * testsuite/ld-mips-elf/reginfo-1r.d: New test. * testsuite/ld-mips-elf/reginfo-2.d: New test. * testsuite/ld-mips-elf/reginfo-2r.d: New test. * testsuite/ld-mips-elf/mips-abiflags-0.d: New test. * testsuite/ld-mips-elf/mips-abiflags-0r.d: New test. * testsuite/ld-mips-elf/mips-abiflags-1.d: New test. * testsuite/ld-mips-elf/mips-abiflags-1r.d: New test. * testsuite/ld-mips-elf/mips-abiflags-2.d: New test. * testsuite/ld-mips-elf/mips-abiflags-2r.d: New test. * testsuite/ld-mips-elf/reginfo-0.ld: New test linker script. * testsuite/ld-mips-elf/reginfo-1.ld: New test linker script. * testsuite/ld-mips-elf/mips-abiflags-0.ld: New test linker script. * testsuite/ld-mips-elf/mips-abiflags-1.ld: New test linker script. * testsuite/ld-mips-elf/reginfo-1.s: New test source. * testsuite/ld-mips-elf/reginfo-2.s: New test source. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2018-02-19LD: Support fixed-size sections some psABIs may requireMaciej W. Rozycki5-10/+43
Define a SEC_FIXED_SIZE section flag for target backends to use for output sections whose size has been fixed in the psABI. The size of such sections will not be changed anyhow by the generic linker and it is up to the target backend to get their size right. bfd/ * section.c (SEC_FIXED_SIZE): New macro. * bfd-in2.h: Regenerate. ld/ * ldlang.c (insert_pad): Do not change output section's size if SEC_FIXED_SIZE is set in the flags. (size_input_section): Likewise. (lang_size_sections_1): Likewise. (lang_reset_memory_regions): Likewise.
2018-02-19BFD: Remove unused SEC_HAS_GOT_REF section flagMaciej W. Rozycki3-16/+5
Remove the SEC_HAS_GOT_REF section flag no longer in use since commit a252afa4cdff ("Fix linking of PIC code on PA"), <https://sourceware.org/ml/binutils/2003-08/msg00467.html>, to make the bit position available for reuse. bfd/ * section.c (SEC_HAS_GOT_REF): Remove macro. * bfd-in2.h: Regenerate.
2018-02-19Add attribute printf to _bfd_error_handlerAlan Modra6-15/+28
and fix a few stray errors. * elf-attrs.c (_bfd_elf_parse_attributes): Correct _bfd_error_handler arguments. * elfxx-mips.c (_bfd_mips_elf_final_link): Likewise. * elfnn-riscv.c (_bfd_riscv_relax_align): Likewise. (_bfd_riscv_relax_pc): Likewise and fix typos. * libbfd-in.h (_bfd_error_handler): Add attribute printf. * libbfd.h: Regenerate.
2018-02-19Don't use %llAlan Modra3-6/+12
* dwarf2.c (read_section): Don't use 'll' format modifier. (find_abstract_instance): Likewise. * elfcore.h (elf_core_file_p): Likewise.
2018-02-19%L conversionsAlan Modra66-461/+603
* bfd-in.h: Include inttypes.h or if not available define PRId64, PRIu64 and PRIx64. * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Remove support for L modifier to print bfd_vma. * coff-arm.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic80.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * dwarf2.c, * elf-m10300.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-bfin.c, * elf32-cris.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-m68k.c, * elf32-metag.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-ppc.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-sh64.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-s390.c, * elf64-sh64.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * ieee.c, * ihex.c, * mach-o.c, * merge.c, * mmo.c, * peXXigen.c, * xcofflink.c: Replace use of Lx modifier with PRIx64, and cast input to uint64_t, and similarly for Ld and Lu. * bfd-in2.h: Regenerate.
2018-02-19Use %pI, %pR, %pS, %pT in place of %I, %R, %S and %T.Alan Modra34-189/+204
bfd/ * elf32-arm.c, * elf32-hppa.c, * elf32-lm32.c, * elf32-m32r.c, * elf32-metag.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-s390.c, * elf32-sh.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf64-ppc.c, * elf64-s390.c, * elflink.c, * elfnn-aarch64.c, * elfnn-riscv.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * reloc.c: Replace use of %R and %T in format strings passed to einfo and friends by %pR and %pT. ld/ * ldmisc.c (vfinfo) Handle %pI, %pR, %pS and %pT in place of %I, %R, %S and %T. * ldcref.c, * ldctor.c, * ldemul.c, * ldexp.c, * ldgram.y, * ldlang.c, * ldlex.l, * ldmain.c, * ldmisc.c, * pe-dll.c, * emultempl/sh64elf.em: Replace use of of %I, %R, %S and %T in format strings passed to einfo and friends by %pI, %pR, %pS and %pT.
2018-02-19Use %pA and %pB in messages rather than %A and %BAlan Modra149-1309/+1473
First step towards compiler verification of _bfd_error_handler arguments, and better verification of translated messages. bfd/ * bfd.c (_bfd_doprnt, _bfd_doprnt_scan): Handle %pA and %pB in place of %A and %B. * aout-adobe.c: Update all messages using %A and %B. * aout-cris.c: Likewise. * aoutx.h: Likewise. * archive.c: Likewise. * binary.c: Likewise. * cache.c: Likewise. * coff-alpha.c: Likewise. * coff-arm.c: Likewise. * coff-i860.c: Likewise. * coff-mcore.c: Likewise. * coff-ppc.c: Likewise. * coff-rs6000.c: Likewise. * coff-sh.c: Likewise. * coff-tic4x.c: Likewise. * coff-tic54x.c: Likewise. * coff-tic80.c: Likewise. * coff64-rs6000.c: Likewise. * coffcode.h: Likewise. * coffgen.c: Likewise. * cofflink.c: Likewise. * coffswap.h: Likewise. * compress.c: Likewise. * cpu-arm.c: Likewise. * ecoff.c: Likewise. * elf-attrs.c: Likewise. * elf-eh-frame.c: Likewise. * elf-ifunc.c: Likewise. * elf-m10300.c: Likewise. * elf-properties.c: Likewise. * elf-s390-common.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cr16c.c: Likewise. * elf32-cris.c: Likewise. * elf32-crx.c: Likewise. * elf32-d10v.c: Likewise. * elf32-d30v.c: Likewise. * elf32-epiphany.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-gen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-i960.c: Likewise. * elf32-ip2k.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc11.c: Likewise. * elf32-m68hc12.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-mep.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nds32.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-pj.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh-symbian.c: Likewise. * elf32-sh.c: Likewise. * elf32-sh64.c: Likewise. * elf32-sparc.c: Likewise. * elf32-spu.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-visium.c: Likewise. * elf32-wasm32.c: Likewise. * elf32-xgate.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-gen.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-sparc.c: Likewise. * elf64-x86-64.c: Likewise. * elfcode.h: Likewise. * elfcore.h: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * elfxx-x86.c: Likewise. * hpux-core.c: Likewise. * ieee.c: Likewise. * ihex.c: Likewise. * libbfd.c: Likewise. * linker.c: Likewise. * mach-o.c: Likewise. * merge.c: Likewise. * mmo.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * pe-mips.c: Likewise. * peXXigen.c: Likewise. * peicode.h: Likewise. * reloc.c: Likewise. * rs6000-core.c: Likewise. * srec.c: Likewise. * stabs.c: Likewise. * vms-alpha.c: Likewise. * xcofflink.c: Likewise. ld/ * ldmisc.c (vfinfo): Handle %pA and %pB in place of %A and %B. * ldcref.c: Update all messages using %A and %B. * ldexp.c: Likewise. * ldlang.c: Likewise. * ldmain.c: Likewise. * ldmisc.c: Likewise. * pe-dll.c: Likewise. * plugin.c: Likewise. * emultempl/beos.em: Likewise. * emultempl/cr16elf.em: Likewise. * emultempl/elf32.em: Likewise. * emultempl/m68kcoff.em: Likewise. * emultempl/m68kelf.em: Likewise. * emultempl/mmo.em: Likewise. * emultempl/nds32elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/spuelf.em: Likewise. * emultempl/sunos.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2018-02-19ld: Add -z separate-code tests to frame.expH.J. Lu2-15/+26
On x86, "-z separate-code" leads to assertion fail at bfd/elf.c:5917. Alsp skip tests if -shared isn't supported. PR ld/22845 * testsuite/ld-elf/frame.exp: Skip if -shared isn't supported. Add tests for "-z noseparate-code" and "-z separate-code". Remove unsupported -shared check.
2018-02-19[ARM] Fix bxns maskThomas Preud'homme2-1/+5
Bit 7 of BXNS is a fixed bit which distinguish it from BLXNS. Yet it is not set in the disassembler entry mask. This commit fixes that. 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com> opcodes/ * arm-dis.c (thumb_opcodes): Fix BXNS mask.
2018-02-19Fix mistake in the declaration of the --include-all-whitespace option of the ↵Matthias Klose2-1/+6
strings utility. * strings.c (long_options): Include-all-whitespace does not take an extra agument.
2018-02-19Add common/ dir in build directoriesAlan Hayward9-101/+81
gdb/ * Makefile.in: (COMMON_SFILES): Add common/*.c files. (SFILES): Remove common/*.c files. (COMMON_OBS): Remove some *.o files built from common/*.c files. * common/common.host: Add common reference. * configure.ac: Likewise. * configure: Regenerate. gdbserver/ * Makefile.in: Add common directory in build. * configure.ac: Add common reference. * configure: Regenerate.
2018-02-19PT_LOAD and PT_GNU_RELRO segment overlapAlan Modra2-13/+18
Commit 325ba6fb34 excluded degenerate zero length PT_LOAD segments, but that only fixed part of the problem, which was that the load segment limits were not calculated properly. PR 22845 * elf.c (IS_TBSS): Define. (_bfd_elf_map_sections_to_segments): Use IS_TBSS. (assign_file_positions_for_non_load_sections): Revert last change. Properly calculate load segment limits to compare against relro limits.
2018-02-19Automatic date update in version.inGDB Administrator1-1/+1
2018-02-18Automatic date update in version.inGDB Administrator1-1/+1
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