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gold/
* target.h (Sized_target::record_gnu_property): Use unsigned int
for second argument.
* x86_64.cc (Target_x86_64<size>::record_gnu_property): Likewise.
(cherry picked from commit ccaf6a01bae457aba3a3f6baf1239bb55bc189a4)
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ld/
* testsuite/ld-aarch64/ifunc-1-local.d: Adjust regexps to match
the offsets emitted by aarch64-elf configurations.
* testsuite/ld-aarch64/ifunc-1.d: Likewise.
* testsuite/ld-aarch64/ifunc-2-local.d: Likewise.
* testsuite/ld-aarch64/ifunc-2.d: Likewise.
* testsuite/ld-aarch64/ifunc-21.d: Likewise.
* testsuite/ld-aarch64/ifunc-3a.d: Likewise.
(cherry picked from commit c198a1ecf835c5896ef810ebe1ded06729039dcd)
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This patch fixes some ifunc testisms after H.J. Lu's patch to enable the
use of IFUNC pointers in position dependent code for binutils. See PR
LD/23169 in binutils bugzilla.
The aarch64 ifunc error message test was changed to no longer expect
this error message as this is now an accepted combination. This patch
also disables the executable tests added by H.J. Lu for aarch64, just as
Alan Modra did with his patch, as these tests only seem to work on some
architectures.
ld/ChangeLog:
2018-07-19 Andre Vieira <andre.simoesdiasvieira@arm.com>
* testsuite/ld-aarch64/ifunc-9.d: Remove no longer expected error.
* testsuite/ld-ifunc/ifunc.exp: Disable tests for aarch64.
(cherry picked from commit 3ba174474d3cc063d6b7abf0bfdd6021bbaf8a90)
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PR gas/23465
In commit b5014f7af2 I've removed (instead of replaced) a conditional,
resulting in addressing forms not allowing 8-bit displacements to now
get their displacements scaled under certain circumstances. Re-add the
missing conditional.
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* config/tc-hppa.c: Include "struc-symbol.h".
(pa_build_unwind_subspace): Use call_info->start_symbol->sy_frag
instead of frag_now for local symbol replacement.
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The PPA instruction will be emitted by GCC transactional execution
builtins so it needs to be accepted with just -mhtm and without
-march=zEC12.
opcodes/ChangeLog:
2018-07-24 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2018-07-19 Andreas Krebbel <krebbel@linux.ibm.com>
* s390-opc.txt (PPA): Add the htm flag.
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When -z separate-code, which is enabled by default for Linux/x86, is
used to create executable, ld won't place any data in the code-only
PT_LOAD segment. If there are no data sections placed before the
code-only PT_LOAD segment, the program headers won't be mapped into
any PT_LOAD segment. When the executable tries to access it (based
on the program header address passed in AT_PHDR), it will lead to
segfault. This patch inserts a GNU_PROPERTY_X86_ISA_1_USED note if
there may be no data sections before the text section so that the
first PT_LOAD segment won't be code-only and will contain the program
header.
Testcases are adjusted to either pass "-z noseparate-code" to ld or
discard the .note.gnu.property section. A Linux/x86 run-time test is
added.
bfd/
PR ld/23428
* elfxx-x86.c (_bfd_x86_elf_link_setup_gnu_properties): If the
separate code program header is needed, make sure that the first
read-only PT_LOAD segment has no code by adding a
GNU_PROPERTY_X86_ISA_1_USED note.
ld/
PR ld/23428
* testsuite/ld-elf/linux-x86.S: New file.
* testsuite/ld-elf/linux-x86.exp: Likewise.
* testsuite/ld-elf/pr23428.c: Likewise.
* testsuite/ld-elf/sec64k.exp: Pass "-z noseparate-code" to ld
for Linux/x86 targets.
* testsuite/ld-i386/abs-iamcu.d: Likewise.
* testsuite/ld-i386/abs.d: Likewise.
* testsuite/ld-i386/pr12718.d: Likewise.
* testsuite/ld-i386/pr12921.d: Likewise.
* testsuite/ld-x86-64/abs-k1om.d: Likewise.
* testsuite/ld-x86-64/abs-l1om.d: Likewise.
* testsuite/ld-x86-64/abs.d: Likewise.
* testsuite/ld-x86-64/pr12718.d: Likewise.
* testsuite/ld-x86-64/pr12921.d: Likewise.
* testsuite/ld-linkonce/zeroeh.ld: Discard .note.gnu.property
section.
* testsuite/ld-scripts/print-memory-usage.t: Likewise.
* testsuite/ld-scripts/size-2.t: Likewise.
* testsuite/lib/ld-lib.exp (run_ld_link_exec_tests): Use ld
to create executable if language is "asm".
(cherry picked from commit 241e64e3b42cd9eba514b8e0ad2ef39a337f10a5)
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After
commit 1b54b8d7e4fc8055f9220a5287e8a94d8a65a88d
Author: Jan Beulich <jbeulich@novell.com>
Date: Mon Dec 18 09:36:14 2017 +0100
x86: fold RegXMM/RegYMM/RegZMM into RegSIMD
... qualified by their respective sizes, allowing to drop FirstXmm0 at
the same time.
folded RegXMM, RegYMM and RegZMM into RegSIMD, it's no longer impossible
to distinguish if Xmmword can represent a memory reference when operand
specification contains SIMD register. For example, template operands
specification like these
RegXMM|...|Xmmword|...
and
RegXMM|...
The Xmmword bitfield is always set by RegXMM which is represented by
"RegSIMD|Xmmword". This patch splits each of vcvtps2qq, vcvtps2uqq,
vcvttps2qq and vcvttps2uqq into 2 templates: one template only has
RegXMM source operand and the other only has mempry source operand.
gas/
PR gas/23418
* testsuite/gas/i386/xmmword.s: Add tests for vcvtps2qq,
vcvtps2uqq, vcvttps2qq and vcvttps2uqq.
* testsuite/gas/i386/xmmword.l: Updated.
opcodes/
PR gas/23418
* i386-opc.h (Byte): Update comments.
(Word): Likewise.
(Dword): Likewise.
(Fword): Likewise.
(Qword): Likewise.
(Tbyte): Likewise.
(Xmmword): Likewise.
(Ymmword): Likewise.
(Zmmword): Likewise.
* i386-opc.tbl: Split vcvtps2qq, vcvtps2uqq, vcvttps2qq and
vcvttps2uqq.
* i386-tbl.h: Regenerated.
(cherry picked from commit 11a322db5c8bc23009e97af30180d6b14d86dbd3)
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* development.sh: Set to true.
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Spanish translation for ld.
gold * po/fr.po: Updated French translation.
ld * po/es.po: Updated Spanish translation.
. * (DEVO_SUPPORT): Fix typo in previous delta.
(do_proto_toplev): Add --quiet option to configure command line.
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gold PR gold/23409
* symtab.cc (Symbol_table::define_special_symbol): Add check for
version name on existing symbol.
* testsuite/Makefile.am (ver_test_pr23409): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/ver_test_pr23409.sh: New test script.
* testsuite/ver_test_pr23409_1.script: New version script.
* testsuite/ver_test_pr23409_2.script: New version script.
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* src-release.sh (DEVO_SUPPORT): Add test-driver and ar-lib.
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* config/tc-arm.c (do_neon_mov): When converting an integer
immediate into a floating point value, check that the conversion
is valid. Also warn if the immediate is valid as both a floating
point value and a bit pattern.
* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
floating point bit patterns.
* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
of the new insns.
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This is a followup to git commit 97196564c7 "Strip global symbol
defined in discarded section". If a symbol defined in a discarded
section was dynamic, that patch left .dynsym with holes (ie. all zero
entries). For example, the following from libstdc++.so:
Symbol table '.dynsym' contains 6090 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000000000a74e0 0 SECTION LOCAL DEFAULT 10
2: 0000000000264180 0 SECTION LOCAL DEFAULT 17
3: 0000000000000000 0 NOTYPE WEAK DEFAULT UND _ITM_addUserCommitAction
4: 0000000000000000 0 NOTYPE WEAK DEFAULT UND _ITM_memcpyRtWn
5: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
readelf: Warning: local symbol 5 found at index >= .dynsym's sh_info value of 3
6: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND
readelf: Warning: local symbol 6 found at index >= .dynsym's sh_info value of 3
[snip]
This patch removes the symbols from .dynsym too.
PR 17550
* elflink.c (_bfd_elf_fix_symbol_flags): Hide dynamic symbols
in discarded sections.
(cherry picked from commit af0bfb9c4283ce80fe37ad6360d12cae8ec38696)
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instructions to the AArch64 assembler and disassembler.
For more details see: https://static.docs.arm.com/ddi0596/a/DDI_0596_ARM_a64_instruction_set_architecture.pdf
opcodes * aarch64-tbl.h (aarch64_opcode_table): Add entry for
ssbb and pssbb and update dsb flags to F_HAS_ALIAS.
* aarch64-asm-2.c: Regenerate.
* aarch64-dis-2.c: Regenerate.
* aarch64-opc-2.c: Regenerate.
gas * testsuite/gas/aarch64/system.s: Add test for ssbb
and pssbb.
* testsuite/gas/aarch64/system.d: Update accordingly
and remove explicit addresses.
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opcodes * arm-dis.c (arm_opcodes): Add ssbb and pssbb and move
csdb together with them.
(thumb32_opcodes): Likewise.
gas * config/tc-arm.c (insns): Add new ssbb and pssbb instructions.
* testsuite/gas/arm/csdb.s: Add new tests for ssbb and pssbb.
* testsuite/gas/arm/csdb.d: Likewise
* testsuite/gas/arm/thumb2_it_bad.s: Likewise.
* testsuite/gas/arm/thumb2_it_bad.l: Likewise.
* testsuite/gas/arm/barrier.d: Update with ssbb.
* testsuite/gas/arm/barrier-thumb.d: Likewise.
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This adds the missing Em16 constraints the rest of the instructions requiring them
and also adds a testcase to test all the instructions so these are checked from
now on.
The Em16 operand constrains the valid registers to the lower 16 registers when used
with a half precision qualifier.
The list has been cross checked (by hand) through the Arm ARM version Ca.
opcodes/
PR binutils/23192
* aarch64-tbl.h (sqdmlal, sqdmlal2, smlsl, smlsl2, sqdmlsl, sqdmlsl2,
mul, smull, smull2, sqdmull, sqdmull2, sqdmulh, sqrdmulh, mla, umlal,
umlal2, mls, umlsl, umlsl2, umull, umull2, sqdmlal, sqdmlsl, sqdmull,
sqdmulh, sqrdmulh): Use Em16.
gas/
PR binutils/23192
* testsuite/gas/aarch64/illegal-by-element.s: New.
* testsuite/gas/aarch64/illegal-by-element.d: New.
* testsuite/gas/aarch64/illegal-by-element.l: New.
(cherry picked from commit 45a28947f3fe5693560e9a1d6373807a9e82c04a)
Signed-off-by: Tamar Christina <tamar.christina@arm.com>
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Resolved reference to a weak undefined symbol in PIE must not have
a dynamic relative relocation against itself, otherwise the value of a
reference will be changed from 0 to the base of executable, breaking
code like the following:
void weak_function (void);
if (weak_function)
weak_function ();
This fixes tests for PR ld/22269 and a number of PIE tests in xtensa gcc
testsuite.
bfd/
2018-07-11 Max Filippov <jcmvbkbc@gmail.com>
* elf32-xtensa.c (elf_xtensa_allocate_dynrelocs): Don't allocate
space for dynamic relocation for undefined weak symbol.
(elf_xtensa_relocate_section): Don't emit R_XTENSA_RELATIVE
relocation for undefined weak symbols.
(shrink_dynamic_reloc_sections): Don't shrink dynamic relocation
section for relocations against undefined weak symbols.
(cherry picked from commit c451bb34ae8bd2d0669bd563366883cfbcf0de9b)
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on Cygwin64 and thus errors out due to -Werror=format.
gold * main.cc: Print m.arena as long long.
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I just stumbled over this with 2.29.1 while building a cross-toolchain, on Cygwin64, but it's still the same for 2.30. m.arena has size_t on Cygwin64 and thus errors out due to -Werror=format.
gold
* main.cc: Print m.arena as long long.
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Remove `-Wshadow' compilation errors:
cc1: warnings being treated as errors
.../bfd/elflink.c: In function 'bfd_elf_final_link':
.../bfd/elflink.c:11722: error: declaration of 'remove' shadows a global declaration
/usr/include/stdio.h:154: error: shadowed declaration is here
which for versions of GCC before 4.8 prevent support for ELF targets
from being built. See also GCC PR c/53066.
bfd/
* elflink.c (bfd_elf_final_link): Rename `remove' local variable
to `remove_section'.
(cherry picked from commit 5270eddc6ed6b5d8e4e2817491bb44b784fa6f81)
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