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2018-03-13Move frame_id_build_unavailable_stack staticusers/qiyao/frame-unwind-unavailable-3Yao Qi2-19/+16
frame_id_build_unavailable_stack is only used in frame.c, so make it static. gdb: 2017-07-28 Yao Qi <yao.qi@linaro.org> * frame.c (frame_id_build_unavailable_stack): Move it up. * frame.h (frame_id_build_unavailable_stack): Remove the declaration.
2018-03-13Throw exceptions from rs6000 unwinderYao Qi1-39/+15
gdb: 2017-07-21 Yao Qi <yao.qi@linaro.org> * rs6000-tdep.c (struct rs6000_frame_cache) <base_p>: Remove. (rs6000_frame_cache): Don't catch exceptions. (rs6000_frame_this_id): Don't check info->base_p. (rs6000_epilogue_frame_this_id): Likewise.
2018-03-13Throw exception in aarch64 unwinderYao Qi1-42/+6
gdb: 2017-07-31 Yao Qi <yao.qi@linaro.org> * aarch64-tdep.c (aarch64_prologue_cache) <available_p>: Remove. (aarch64_make_prologue_cache_1): Update. (aarch64_make_prologue_cache): Don't catch exception. (aarch64_prologue_frame_unwind_stop_reason): Don't check cache->available_p. (aarch64_prologue_this_id): Likewise. (aarch64_make_stub_cache): Don't catch exceptions. (aarch64_stub_frame_unwind_stop_reason): Don't check cache->available_p. (aarch64_stub_this_id): Likewise.
2018-03-13Throw exception in i386 unwindersYao Qi1-84/+27
This patch changes i386 unwinders not to throw exceptions. gdb: 2017-07-31 Yao Qi <yao.qi@linaro.org> * i386-tdep.c (i386_frame_cache) <base_p>: Remove. (i386_alloc_frame_cache): Update. (i386_frame_cache_1): Likewise. (i386_frame_cache): Don't catch exceptions. (i386_frame_this_id): Don't check cache->base_p. (i386_frame_unwind_stop_reason): Likewise. (i386_epilogue_frame_cache): Don't catch exceptions. (i386_epilogue_frame_unwind_stop_reason): Don't check cache->base_p. (i386_epilogue_frame_this_id): Likewise. (i386_sigtramp_frame_cache): Don't catch exceptions. (i386_sigtramp_frame_unwind_stop_reason): Don't check cache->base_p. (i386_sigtramp_frame_this_id): Likewise.
2018-03-13Throw exception in amd64 unwindersYao Qi1-73/+22
This patch changes amd64 unwinders not to throw exceptions. gdb: 2017-07-31 Yao Qi <yao.qi@linaro.org> * amd64-tdep.c (amd64_frame_cache) <base_p>: Remove. (amd64_init_frame_cache): Update. (amd64_frame_cache_1): Update. (amd64_frame_unwind_stop_reason): Don't check cache->base_p. (amd64_frame_this_id): Likewise. (amd64_sigtramp_frame_cache): Don't catch exception. (amd64_sigtramp_frame_unwind_stop_reason): Don't check cache->base_p. (amd64_sigtramp_frame_this_id): Likewise. (amd64_epilogue_frame_cache): Don't catch exception. (amd64_epilogue_frame_unwind_stop_reason): Don't check cache->base_p. (amd64_epilogue_frame_this_id): Likewise.
2018-03-13Throw exception in dwarf2 unwindersYao Qi1-44/+19
This patch changes dwarf2 unwinders to not catch exceptions. gdb: 2017-07-20 Yao Qi <yao.qi@linaro.org> * dwarf2-frame.c (struct dwarf2_frame_cache) <unavailable_retaddr>: Remove. (dwarf2_frame_cache): Don't catch exception. (dwarf2_frame_unwind_stop_reason): Don't check cache->unavailable_retaddr. (dwarf2_frame_this_id): Likewise.
2018-03-13Handle unwinding exceptionsYao Qi1-16/+93
unwinder methods (sniffer, this_id, stop_reason, etc) can throw exceptions, at least when some data is unavailable during examining traceframes. We deal with this problem by catching exceptions in each unwinders, dwarf unwinders and different arch-specific prologue unwinders. done by https://www.sourceware.org/ml/gdb-patches/2011-02/msg00611.html This requires each arch-specific prologue unwinder needs to catch exceptions. This patch centralizes the exception handling in the callers of unwinders methods, and the following patches remove the exception handling in each arch prologue unwinders. This patch is a follow-up to discussion https://sourceware.org/ml/gdb-patches/2016-02/msg00778.html This patch not only catches exceptions from unwinder methods, but also catches exceptions from frame_base methods, because they call arch-specific prologue analyzer, which can throw exceptions. gdb: 2017-07-27 Yao Qi <yao.qi@linaro.org> * frame.c (compute_frame_id): Catch exception, if it is NOT_AVAILABLE_ERROR, call frame_id_build_unavailable_stack, otherwise throw the exception again. (frame_unwind_register_value): Catch exception from unwind->prev_register, if it is NOT_AVAILABLE_ERROR, set value unavailable, otherwise throw the exception again. (get_prev_frame_always_1): Catch exception from unwind->stop_reason, if it is NOT_AVAILABLE_ERROR, set stop_reason to UNWIND_UNAVAILABLE, otherwise throw the exception. (get_frame_locals_address): Catch exception base->this_locals. (get_frame_args_address): Likewise.
2018-03-12Fix ia64 GDB buildYao Qi3-2/+9
Commit 849d0ba8 breaks GDB build for ia64 with --with-libunwind-ia64=yes. This patch fixes it. gdb: 2018-03-12 Yao Qi <yao.qi@linaro.org> * ia64-libunwind-tdep.c (libunwind_get_reg_special): Change parameter type to readable_regcache. * ia64-libunwind-tdep.h (libunwind_get_reg_special): Update the declaration.
2018-03-11Use std::vector for field lists in dwarf2read.cTom Tromey2-193/+112
This changes dwarf2read.c to use std::vector rather than a linked list when managing the fields and base classes to be added to a type. This removes some bookkeeping types and also allows the removal of some cleanups. gdb/ChangeLog 2018-03-11 Tom Tromey <tom@tromey.com> * dwarf2read.c (struct nextfield): Add initializers. (struct nextfnfield): Remove. (struct fnfieldlist): Add initializers. Remove "length" and "head", use std::vector. (struct decl_field_list): Remove. (struct field_info): Add initializers. <fields, baseclasses>: Now std::vector. <nbaseclasses, nfnfields, typedef_field_list_count, nested_types_list_count>: Remove. (dwarf2_add_field, dwarf2_add_type_defn) (dwarf2_attach_fields_to_type, dwarf2_add_member_fn) (dwarf2_attach_fn_fields_to_type, handle_struct_member_die) (process_structure_scope): Update.
2018-03-11Remove cleanup from build_type_psymtabs_1Tom Tromey2-20/+15
This removes a cleanup from build_type_psymtabs_1, by using std::vector rather than manual memory management. gdb/ChangeLog 2018-03-11 Tom Tromey <tom@tromey.com> * dwarf2read.c (sort_tu_by_abbrev_offset): Change to be suitable for use by std::sort. (build_type_psymtabs_1): Use std::vector.
2018-03-12Automatic date update in version.inGDB Administrator1-1/+1
2018-03-11Automatic date update in version.inGDB Administrator1-1/+1
2018-03-10Automatic date update in version.inGDB Administrator1-1/+1
2018-03-09x86: Encode EVEX instructions with VEX128 if possibleH.J. Lu4-25/+33
If EVEX encoding isn't required, we can encode EVEX instructions with VEX128. * config/tc-i386.c (optimize_encoding): Encode EVEX instructions with VEX128 if EVEX encoding isn't required. * testsuite/gas/i386/optimize-1.d: Updated. * testsuite/gas/i386/x86-64-optimize-2.d: Likewise.
2018-03-09Fix Sparc, s390 and AArch64 targets so that they can handle relocs against ↵Nick Clifton9-7/+156
ifunc symbols found in note sections. Following on from PR 22929, I have found the same problem exists with other ifunc supporting targets too. Plus see this link for the bug being reported against the s390x binutils for Fedora rawhide: https://bugzilla.redhat.com/show_bug.cgi?id=1553705 So I am going to check in the patch below which applies the same change that H.J. made for the x86_64 target to the other affected targets. (Specifically: S390, AArch64 and Sparc). Plus it adds a new test to the linker testsuite to make sure that this problem stays fixed. bfd * elf64-s390.c (elf_s390_relocate_section): Move check for relocations against non-allocated sections to before the code that handles ifunc relocations. * elf32-s390.c (elf_s390_relocate_section): Likewise. * elfnn-aarch64.c (elfNN_aarch64_final_link_relocate): Treat relocs against IFUNC symbols in non-allocated sections as relocs against FUNC symbols. * elfxx-sparc.c (_bfd_sparc_elf_relocate_section): Likewise. ld * testsuite/ld-ifunc/ifuncmod5.s: New test. Checks that targets that support IFUNC symbols can handle relocations against those symbols in NOTE sections. * testsuite/ld-ifunc/ifuncmod5.d: New file: Driver for the new test. * testsuite/ld-ifunc/ifunc.exp: Run the new test.
2018-03-09Update "gdb --configuration" with recently added featuresEli Zaretskii2-9/+41
This adds display of a few recently added optional features. gdb/ChangeLog: 2018-03-09 Eli Zaretskii <eliz@gnu.org> * top.c (print_gdb_configuration): Reflect LIBIPT, LIBMEMCHECK, and LIBMPFR in the printed configuration.
2018-03-09x86: Strip whitespace in check_VecOperationsH.J. Lu4-2/+15
Since the addition of pseudo prefixes changed how the scrubber treats '{', we need to explicitly strip whitespace in check_VecOperations (). * config/tc-i386.c (check_VecOperations): Strip whitespace. * testsuite/gas/i386/optimize-1.s: Add whitespaces before {%k7} and {z}, * testsuite/gas/i386/x86-64-optimize-2.s: Likewise.
2018-03-08Use scoped_fd in more placesTom Tromey4-46/+37
This changes a few more places to use scoped_fd. This allows the removal of some cleanups. Regression tested by the buildbot, though note that I'm not sure whether the buildbot actually builds anything using all of these files. gdb/ChangeLog 2018-03-08 Tom Tromey <tom@tromey.com> * source.c (get_filename_and_charpos): Use scoped_fd. * nto-procfs.c (procfs_open_1): Use scoped_fd. (procfs_pidlist): Likewise. * procfs.c (proc_get_LDT_entry): Use scoped_fd. (iterate_over_mappings): Likewise.
2018-03-08Change enable_thread_stack_temporaries to an RAII classTom Tromey5-84/+77
This started as a patch to change enable_thread_stack_temporaries to be an RAII class, but then I noticed that this code used a VEC, so I went ahead and did a bit more C++-ification, changing stack_temporaries_enabled to a bool and changing stack_temporaries to a std::vector. Regression tested by the buildbot. gdb/ChangeLog 2018-03-08 Tom Tromey <tom@tromey.com> * infcall.c (struct call_return_meta_info) <stack_temporaries_enabled>: Remove. (get_call_return_value, call_function_by_hand_dummy): Update. * thread.c (disable_thread_stack_temporaries): Remove. (enable_thread_stack_temporaries): Remove. (thread_stack_temporaries_enabled_p): Return bool. (push_thread_stack_temporary, value_in_thread_stack_temporaries) (get_last_thread_stack_temporary): Update. * eval.c (evaluate_subexp): Update. * gdbthread.h (class enable_thread_stack_temporaries): Now a class, not a function. (value_ptr, value_vec): Remove typedefs. (class thread_info) <stack_temporaries_enabled>: Now bool. <stack_temporaries>: Now a std::vector. (thread_stack_temporaries_enabled_p) (value_in_thread_stack_temporaries): Return bool.
2018-03-08x86: Optimize with EVEX128 encoding for AVX512VLH.J. Lu13-56/+459
We can optimize AVX512 instructions with EVEX128 only if AVX512VL is enabled: 1. Instruction is an AVX512VL instruction. Or 2. AVX512VL is enabled explicitly by -march=+avx512vl/".arch .avx512vl". We should optimize EVEX instructions with EVEX128 encoding when pseudo {evex} prefix is used. * config/tc-i386.c (set_cpu_arch): Set cpu_arch_isa_flags. (md_parse_option): Likewise. (optimize_encoding): Check i.tm.cpu_flags and cpu_arch_isa_flags for cpuavx512vl instead of cpu_arch_flags. Optimize EVEX with EVEX128 when EVEX encoding is required. * testsuite/gas/i386/i386.exp: Run optimize-4, optimize-5, x86-64-optimize-5 and x86-64-optimize-6. * testsuite/gas/i386/optimize-1.d: Updated. * testsuite/gas/i386/x86-64-optimize-2.d: Likewise. * testsuite/gas/i386/optimize-4.d: New file. * testsuite/gas/i386/optimize-4.s: Likewise. * testsuite/gas/i386/optimize-5.d: Likewise. * testsuite/gas/i386/optimize-5.s: Likewise. * testsuite/gas/i386/x86-64-optimize-5.d: Likewise. * testsuite/gas/i386/x86-64-optimize-5.s: Likewise. * testsuite/gas/i386/x86-64-optimize-6.d: Likewise. * testsuite/gas/i386/x86-64-optimize-6.s: Likewise.
2018-03-08Fix misreporting of omitted bytes for large remote packetsSimon Marchi2-10/+11
In remote.c, when the output of "set debug remote" is truncated, the number of characters reported is incorrect. What is reported is the number of characters added by the quoting, not the number of characters that were truncated. gdb/ChangeLog: * remote.c (putpkt_binary): Fix omitted bytes reporting. (getpkt_or_notif_sane_1): Likewise.
2018-03-09Automatic date update in version.inGDB Administrator1-1/+1
2018-03-08Use std::string to simplify build_id_to_debug_bfdSimon Marchi2-22/+15
Using std::string here makes the string building simpler thank playing with char*. A stack allocation is replaced with heap allocation, but I don't think this is really performance-critical code. gdb/ChangeLog: * build-id.c (build_id_to_debug_bfd): Use std::string.
2018-03-08Make find_separate_debug_file* return std::stringSimon Marchi7-70/+66
This patch makes the find_separate_debug_file* functions return std::string, which allows to get rid of some manual memory management and one cleanup. gdb/ChangeLog: * build-id.c (find_separate_debug_file_by_buildid): Return std::string. * build-id.h (find_separate_debug_file_by_buildid): Return std::string. * coffread.c (coff_symfile_read): Adjust to std::string. * elfread.c (elf_symfile_read): Adjust to std::string. * symfile.c (separate_debug_file_exists): Change parameter to std::string. (find_separate_debug_file): Return std::string. (find_separate_debug_file_by_debuglink): Return std::string. * symfile.h (find_separate_debug_file_by_debuglink): Return std::string.
2018-03-08Add xml_escape_text_append and use itSimon Marchi6-17/+58
[This patch should go on top of "linux_qxfer_libraries_svr4: Use std::string", I should have sent them together as a series.] I noticed that linux_qxfer_libraries_svr4 used xml_escape_text, which returns an std::string. That string is then copied into a larger buffer. It would be more efficient if we had a version of xml_escape_text which appended to an existing string instead of returning a new one. This is what this patch does. I manually verified that the output of linux_qxfer_libraries_svr4 didn't change before/after the patch. gdb/ChangeLog: * common/xml-utils.c (xml_escape_text): Move code to... (xml_escape_text_append): ... this new function. * common/xml-utils.h (xml_escape_text_append): New declaration. * unittests/xml-utils-selftests.c (test_xml_escape_text_append): New function. (_initialize_xml_utils): register test_xml_escape_text_append as a selftest. gdb/gdbserver/ChangeLog: * linux-low.c (linux_qxfer_libraries_svr4): Use xml_escape_text_append.
2018-03-08linux_qxfer_libraries_svr4: Use std::stringSimon Marchi2-34/+16
Use std::string, removing some manual memory management. gdb/gdbserver/ChangeLog: * linux-low.c (linux_qxfer_libraries_svr4): Use std::string.
2018-03-08remote-stdio-gdbserver: Pass "target" to remote_exec to delete fileSimon Marchi2-1/+7
As described here https://sourceware.org/bugzilla/show_bug.cgi?id=22841 there seems to be situations where the remote-stdio-gdbserver board fails to delete the uploaded binary file. Passing "target" fixes the issue for Christian who reported the bug. I did not experience this problem, but passing "target" to remote_exec still works for me, so I'm fine with changing it. Any objection? gdb/testsuite/ChangeLog: PR gdb/22841 * boards/remote-stdio-gdbserver.exp (${board}_file): Pass "target" to remote_exec.
2018-03-08Don't redefine upload/download/file in gdbserver-baseSimon Marchi2-22/+6
Before patch Make native gdbserver boards no longer be "remote" (in DejaGnu terms) 739b3f1d8ff7072dcc66240c25b026c6433bda1a the local gdbserver boards (except native-extended-gdbserver...) were considered as remote by DejaGNU. To avoid DejaGNU trying to use ssh/scp to download the files to the target (which is actually local), the gdbserver-base.exp file defined some _download, _upload and _file board operations to override the default behavior, and instead just use local operations. The same patch also changed remote-stdio-gdbserver.exp to make it inherit from gdbserver-base.exp. Since then, this board (which is actually remote) uses the overrides with local file operations. As a result, files are never actually copied to the target. I think we can simply remove the overrides from gdbserver-base.exp. Because all boards should be properly considered local or remote by DejaGNU, it should by default use the right method for transferring files. gdb/testsuite/ChangeLog: PR gdb/22841 * boards/gdbserver-base.exp (${board}_file, ${board}_download, ${board}_upload): Remove.
2018-03-08x86-64: Also optimize "clr reg64"H.J. Lu7-9/+30
"clr reg" is an alias of "xor reg, reg". We can encode "clr reg64" as "xor reg32, reg32". gas/ * config/tc-i386.c (optimize_encoding): Also encode "clr reg64" as "xor reg32, reg32". * testsuite/gas/i386/x86-64-optimize-1.s: Add "clr reg64" tests. * testsuite/gas/i386/x86-64-optimize-1.d: Updated. opcodes/ * i386-opc.tbl: Add Optimize to clr. * i386-tbl.h: Regenerated.
2018-03-08x86: Treat relocation against IFUNC symbol as FUNCH.J. Lu10-0/+94
When resolving a relocation against IFUNC symbol in a SHT_NOTE section without SHF_ALLOC, we treat it as relocation against FUNC symbol since it needs the address of IFUNC symbol, not the address returned by IFUNC function. bfd/ PR ld/22929 * elf32-i386.c (elf_i386_relocate_section): Treat relocation against IFUNC symbol in SHT_NOTE section without SHF_ALLOC as relocation against FUNC symbol. * elf64-x86-64.c (elf_x86_64_relocate_section): Likewise. ld/ PR ld/22929 * testsuite/ld-i386/i386.exp: Run PR ld/22929 test. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/pr22929.d: New file. * testsuite/ld-i386/pr22929.s: Likewise. * testsuite/ld-x86-64/pr22929.d: Likewise. * testsuite/ld-x86-64/pr22929.s: Likewise.
2018-03-08x86: Remove support for old (<= 2.8.1) versions of gccH.J. Lu17-5297/+5146
Old (<= 2.8.1) versions of gcc generate broken fsubp, fsubrp, fdivp and fdivrp instructions. Assembler translates them to correct ones with a warning: [hjl@gnu-cfl-1 gas]$ cat x.s fsubp %st(3),%st [hjl@gnu-cfl-1 gas]$ gcc -c x.s x.s: Assembler messages: x.s:1: Warning: translating to `fsubp %st,%st(3)' [hjl@gnu-cfl-1 gas]$ This patch removes support for old (<= 2.8.1) versions of gcc: [hjl@gnu-cfl-1 gas]$ ./as-new -o x.o x.s x.s: Assembler messages: x.s:1: Error: operand type mismatch for `fsubp' [hjl@gnu-cfl-1 gas]$ gas/ * NEWS: Mention -mold-gcc removal. * config/tc-i386.c (i386_error): Remove old_gcc_only. (old_gcc): Removed. (match_template): Remove old gcc support. (OPTION_MOLD_GCC): Removed. (OPTION_MRELAX_RELOCATIONS): Updated. (md_longopts): Remove OPTION_MOLD_GCC. (md_parse_option): Likewise. (md_show_usage): Remove -mold-gcc. * testsuite/gas/i386/general.s: Convert fsub/fdiv tests for old (<= 2.8.1) versions of gcc. * testsuite/gas/i386/intel.s: Likewise. * testsuite/gas/i386/general.l: Updated. * testsuite/gas/i386/intel-intel.d: Likewise. * testsuite/gas/i386/intel.d: Likewise. * testsuite/gas/i386/intel.e: Likewise. * testsuite/gas/i386/i386.exp: Don't pass -mold-gcc to general. include/ * opcode/i386 (OLDGCC_COMPAT): Removed. opcodes/ * i386-gen.c (opcode_modifiers): Remove OldGcc. * i386-opc.h (OldGcc): Removed. (i386_opcode_modifier): Remove oldgcc. * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp instructions for old (<= 2.8.1) versions of gcc. * i386-tbl.h: Regenerated.
2018-03-08Remove MAX_REGISTER_SIZE defineAlan Hayward4-8/+7
gdb/ * defs.h: Remove MAX_REGISTER_SIZE. * regcache.c (init_regcache_descr): Remove MAX_REGISTER_SIZE asserts. * python/py-unwind.c (pyuw_sniffer): Likewise.
2018-03-08x86: fold several AVX512VL templatesJan Beulich6-2058/+404
The differences between some of the register and memory forms of the same insn often don't really require the templates to be separate. For example, Disp8MemShift is simply irrelevant to register forms. Fold these as far as possible, and also fold register-only forms. Further folding is possible, but needs other prereq work done first. A note regarding EVEXDYN: This is intended to be used only when no other properties of the template would make is_evex_encoding() return true. In all "normal" cases I think it is preferable to omit this indicator, to keep the table half way readable.
2018-03-08x86: fold certain AVX512 rotate and shift templatesJan Beulich5-957/+151
Their memory forms were bogusly using VexLWP instead of VexNDD. Adjust VexNDD handling to cope with these, allowing their register and memory forms to be folded.
2018-03-08x86: fold VEX-encoded GFNI templatesJan Beulich3-86/+21
2018-03-08x86: fold a few AVX512F templatesJan Beulich3-240/+31
The differences between some of the register and memory forms of the same insn often don't really require the templates to be separate. For example, Disp8MemShift is simply irrelevant to register forms. Fold them as far as possible. Further folding is possible, but needs other prereq work done first.
2018-03-08x86: fold LWP templatesJan Beulich3-86/+20
Also drop the no longer necessary explicit Disp<N> from them.
2018-03-08x86: fold FMA and FMA4 templatesJan Beulich3-1656/+330
2018-03-08x86: drop {X,Y,Z}MMWORD_MNEM_SUFFIXJan Beulich6-45/+39
They aren't really useful (anymore?): The conflicting operand size check isn't applicable to any insn validly using respective memory operand sizes (and if they're used wrongly, another error would result), and the logic in process_suffix() can be easily changed to work without them. While re-structuring conditionals in process_suffix() also drop the CMPXCHG8B special case in favor of a NoRex64 attribute in the opcode table.
2018-03-08x86: correct operand size match checks for BMI/BMI2 insnsJan Beulich5-7/+64
Some BMI/BMI2 insns allow their middle operands to be a memory one. In such a case, matching register types between operands 0 and 1 as well as 1 and 2 won't help - operands 0 and 2 also need to be checked.
2018-03-08x86: fold redundant expressions in process_suffix()Jan Beulich2-20/+18
There's no point repeatedly evaluating i.types[op].bitfield.reg.
2018-03-08x86: simplify result processing of cpu_flags_match()Jan Beulich2-24/+21
Make more obvious what the success and failure paths are, and in particular that what used to be at the "skip" label can't be reached by what used to be straight line code.
2018-03-08x86: add GFNI, VAES, and VPCLMUL checking to cpu_flags_match()Jan Beulich19-2/+177
Just like for the AVX/AES and AVX/PCLMUL combinations, AVX/GFN, AVX512F/GFNI, AVX512F/VAES, and AVX512F/PCLMUL need special handling to deal with the pair of required checks specified in the templates.
2018-03-08x86: change AVX512VL handling in cpu_flags_match()Jan Beulich2-11/+9
In order to add an AVX512F counterpart to the present AVX checking, it is better to move the AVX512VL check out of the conditional it's currently in.
2018-03-08x86: drop CPU_FLAGS_32BIT_MATCHJan Beulich2-5/+10
It has become a plain alias of CPU_FLAGS_ARCH_MATCH now.
2018-03-08x86: simplify AVX checks in cpu_flags_match()Jan Beulich2-22/+14
No caller cares about the specifics of CPU_FLAGS_{AES,AVX,PCLMUL}_MATCH, so drop those and fold the nested if()-s.
2018-03-08x86: avoid cpu_flags_match() bogusly setting CPU_FLAGS_ARCH_MATCHJan Beulich2-6/+5
2018-03-08x86: drop bogus NoAVXJan Beulich3-14/+20
These are meaningful only for insns with CpuSSE* (and a few other Cpu*) attribute.
2018-03-08x86: avoid SSE check for LDMXCSR/STMXCSRJan Beulich3-4/+9
Neither touches any XMM register, so the check is pointless. It is imo even questionable whether in SSE2AVX mode the two should be converted to their AVX counterparts.
2018-03-08x86: extend SSE check to PCLMULQDQ, AES, and GFNI insnsJan Beulich16-126/+88
When aiming at not mixing SSE and AVX insns, these should be warned about the same way other non-AVX ones are treated.
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