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2015-11-17Mach-O: add new defines and struct for darwin 14.5Tristan Gingold5-2/+158
2015-11-17Convert c_string_type to an enum flags typeSimon Marchi4-13/+31
2015-11-17Type-safe wrapper for enum flagsPedro Alves14-37/+349
2015-11-17guile disassembly hardcode TARGET_XFER_E_IOPedro Alves2-4/+10
2015-11-17Fix a problematic message with the STM32L4XX fixup on 32-bit hosts.Christophe Lyon2-2/+7
2015-11-17Fix the disassembly of conditional instructions will illegal condition select...Nick Clifton2-1/+6
2015-11-17gdb/testsuite: Fix left shift of negative value.Dominik Vogt3-2/+7
2015-11-17gdb: Fix left shift of negative value.Dominik Vogt3-5/+12
2015-11-17sim: sim-close: use XCONCAT2 helperMike Frysinger2-3/+6
2015-11-16gas: microblaze: fix shift overflowMike Frysinger2-1/+5
2015-11-17Automatic date update in version.inGDB Administrator1-1/+1
2015-11-16Fix stack buffer overflow in aarch64_extract_return_valueYao Qi2-1/+6
2015-11-16Pass value * instead of bfd_byte * to pass_* functions in aarch64-tdep.cYao Qi2-22/+27
2015-11-16Use value_contents instead of value_contents_writeableYao Qi3-2/+8
2015-11-16Fix bug in arm_push_dummy_call by -fsanitize=addressYao Qi2-3/+13
2015-11-16Fixes an invalid warning about memory region overflow on the ARM.Nick Clifton2-0/+21
2015-11-16sim: sim-stop/sim-reason/sim-reg: move to common obj listMike Frysinger44-56/+119
2015-11-15sim: cr16: drop global callback stateMike Frysinger4-62/+70
2015-11-15sim: cr16: convert to common sim engine logicMike Frysinger5-157/+96
2015-11-15sim: cr16: convert to common sim memory modulesMike Frysinger10-598/+68
2015-11-15sim: cr16: push down sd/cpu varsMike Frysinger6-788/+833
2015-11-15sim: cr16: delete unused memory helpersMike Frysinger3-20/+6
2015-11-15sim: cr16: switch to common sim-regMike Frysinger3-13/+61
2015-11-15sim: cr16/d10v: drop redundant call to sim_create_inferiorMike Frysinger4-2/+8
2015-11-15sim: d10v: drop global callback stateMike Frysinger4-137/+149
2015-11-15sim: d10v: convert to common sim engine logicMike Frysinger5-218/+137
2015-11-15sim: d10v: push down sd/cpu varsMike Frysinger6-500/+543
2015-11-16Automatic date update in version.inGDB Administrator1-1/+1
2015-11-15sim: h8300: convert to common sim_{reason,stop}Mike Frysinger3-15/+8
2015-11-15sim: mcore: pull cpu state out of global scopeMike Frysinger3-294/+309
2015-11-15sim: mcore: switch to common sim-regMike Frysinger3-4/+16
2015-11-15sim: mcore: add a fail testcaseMike Frysinger3-1/+14
2015-11-15sim: mcore: convert to common reason/resume logicMike Frysinger3-40/+64
2015-11-15sim: clean up redundant objectsMike Frysinger8-20/+19
2015-11-15sim: sim-close: unify sim_close logicMike Frysinger50-171/+173
2015-11-15sim: m32c: add a basic testsuiteMike Frysinger5-0/+92
2015-11-15sim: testsuite: support basic vars in flagsMike Frysinger2-1/+12
2015-11-15sim: drop extern C linkage from most sim interface headersMike Frysinger8-59/+9
2015-11-14Bump version to 2.26.51Tristan Gingold13-63/+88
2015-11-15Automatic date update in version.inGDB Administrator1-1/+1
2015-11-14Fix problem where bss symbols for copy relocations are marked local.Cary Coutant2-2/+10
2015-11-14Automatic date update in version.inGDB Administrator1-1/+1
2015-11-13PR 19051: support of inferior call with gnu vector support on ARMYao Qi2-14/+63
2015-11-13Refactor arm_return_in_memoryYao Qi2-78/+90
2015-11-13Remove d10v from testsuiteYao Qi5-210/+15
2015-11-13gdb.base/gnu_vector.exp: Don't test output from the inferiorYao Qi3-17/+17
2015-11-13Add markers for release 2.26Tristan Gingold7-0/+20
2015-11-13Automatic date update in version.inGDB Administrator1-1/+1
2015-11-12Revert "[LD][AARCH64]Add TLSIE relaxation support under large memory model."Marcus Shawcroft6-103/+2
2015-11-12[AArch64] Add support for Cortex-A35James Greenhalgh3-0/+8
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