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* ia64.h (Elf64_External_VMS_ORIG_DYN_Note): New struct.
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2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/x86-64.exp: Build x32 DSO from x86-64 object file
only for native.
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bfd/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
* elf64-x86-64.c (elf_x86_64_check_relocs): Allow R_X86_64_64
relocations in SEC_DEBUGGING sections when building shared
libraries.
ld/testsuite/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
* ld-x86-64/simple.c: New.
* ld-x86-64/x86-64-x32.rd: Likewise.
* ld-x86-64/x86-64.exp: Check building x32 DSO from x86-64
object file.
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bfd/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12851
* elflink.c (elf_gc_sweep): Don't check SHT_NOTE sections here.
(bfd_elf_gc_sections): Also check SHT_NOTE sections.
ld/testsuite/
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12851
* ld-elf/pr12851.d: New.
* ld-elf/pr12851.s: Likewise.
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* testsuite/two_file_test_2_v1.cc: Change initialization of
v2 to keep it in .data.
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The testcase, at some point, is trying to change the contents
of a string that was defined as follow:
char *str = "hello, testsuite";
The problem is that the string is constant, and str is never used
to change the contents of the string in the program, so the compiler
is free to allocate it in a read-only section. This is what happens
on x86-windows, for instance.
As a result, trying to change the contents of the string during
the `python gdb.inferiors()[0].write_memory (addr, str)' results
in the following error:
(gdb) python gdb.inferiors()[0].write_memory (addr, str)
gdb: write target memory, 5 bytes at 0x00403064
Traceback (most recent call last):
File "<string>", line 1, in <module>
gdb.MemoryError: Cannot access memory at address 0x403064
Error while executing Python code.
This patch prevents this from happening by declaring str as an
array rather than a pointer.
gdb/testsuite/ChangeLog:
* gdb.python/py-inferior.c (f2): Make str an array rather
than a pointer.
* gdb.python/py-inferior.exp: Adjust testcase accordingly.
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This patch improves the error message when an invalid option is
detected, by also printing the option that actually caused the error.
For instance, from GDB:
(gdb) target sim --hello
Invalid option: --hello
Usage:
[...]
We also added the usage after an invalid long-name option (Eg: --hello)
to be in line with what's being done for all other invalid options
being detected.
sim/ppc/ChangeLog:
* psim.c (psim_options): Add option that cause the error
in invalid-option error messages. Print the usage when
detecting an invalid long-name option.
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There was a recent change that cuased the "target sim" command
to add a --sysroot option to the argument vector passed down to
the simulator. This caused a failure in the powerpc simulator,
as it did not recognize it. This patch fixes the problem by adding
support for the --sysroot option (it ignores it).
sim/ppc/ChangeLog:
* psim.c (psim_options): Accept and ignore `--sysroot=...'.
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* readelf.c (process_version_sections): Handle binaries containing
corrupt version information.
(process_symbol_table): Stop processing a symbol's version
information if it could not be read in.
(get_data): Add comment describing the function.
(process_section_headers): Set dynamic_strings_length to 0 if the
dynamic strings could not be read in.
(process_dynamic_section): Likewise.
(process_section_groups): Stop processing the group information if
the data could not be read in.
(hppa_processs_unwind): Assert that there is only one string table
in the file.
(arm_process_unwind): Likewise.
(ia64_process_unwind): Likewise.
Set the size of the unwind auxillary information to 0 if the data
could not be read.
(load_specific_debug_section): Handle a failure to read in the
section.
(process_mips_specific): Stop display of the PLT GOT section if it
could not be read in.
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* makefile.vms (DEFS): Define OBJDUMP_PRIVATE_VECTORS.
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* makefile.vms (OBJS): Add elfxx-ia64.obj
Remove vax case.
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2011-06-07 H.J. Lu <hongjiu.lu@intel.com>
* ld-elf/elf.exp: Build symbol3.a and symbol3w.a.
* ld-elf/symbol3.s: New.
* ld-elf/symbol3w.s: Likewise.
* ld-elf/warn3.d: Likewise.
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gold_fallback.
* errors.cc (Errors::fatal): Adjust call to gold_exit.
(Errors::fallback): New function.
(gold_fallback): New function.
* errors.h (Errors::fallback): New function.
* gold.cc (gold_exit): Change status parameter to enum; adjust
all callers.
(queue_initial_tasks): Call gold_fallback.
* gold.h: Include cstdlib.
(Exit_status): New enum type.
(gold_exit): Change status parameter to enum.
(gold_fallback): New function.
* layout.cc (Layout::set_section_offsets): Call gold_fallback.
(Layout::create_symtab_sections): Likewise.
(Layout::create_shdrs): Likewise.
* main.cc (main): Adjust call to gold_exit.
* output.cc (Output_data_got::add_got_entry): Call gold_fallback.
(Output_data_got::add_got_entry_pair): Likewise.
(Output_section::add_input_section): Likewise.
(Output_section::add_output_section_data): Likewise.
(Output_segment::set_section_list_addresses): Likewise.
* x86_64.cc (Output_data_plt_x86_64::add_entry): Likewise.
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for incremental links.
* output.cc (Output_segment::set_section_list_addresses): Remove
FIXME and test for TLS or BSS.
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incremental_common_test_1.
* testsuite/Makefile.in: Regenerate.
* testsuite/common_test_1_v1.c: New source file.
* testsuite/common_test_1_v2.c: New source file.
* testsuite/copy_test_v1.cc: New source file.
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update, allocate common from bss section's free list.
* incremental-dump.cc (dump_incremental_inputs): Print flag for
linker-defined symbols.
* incremental.cc (Sized_incremental_binary::do_process_got_plt):
Skip GOT and PLT entries that are no longer referenced.
(Output_section_incremental_inputs::write_info_blocks): Mark
linker-defined symbols.
(Sized_incr_relobj::do_add_symbols): Process linker-defined symbols.
* output.cc (Output_section::allocate): New function.
* output.h (Output_section::allocate): New function.
* resolve.cc (Symbol_table::report_resolve_problem): Add case for
linker-defined symbols.
(Symbol::override_base_with_special): Copy is_predefined_ flag.
* symtab.cc (Symbol::init_fields): Initialize is_predefined_ flag.
(Symbol::init_base_output_data): Likewise.
(Symbol::init_base_output_segment): Likewise.
(Symbol::init_base_constant): Likewise.
(Sized_symbol::init_output_data): Likewise.
(Sized_symbol::init_output_segment): Likewise.
(Sized_symbol::init_constant): Likewise.
(Symbol_table::do_define_in_output_data): Likewise.
(Symbol_table::do_define_in_output_segment): Likewise.
(Symbol_table::do_define_as_constant): Likewise.
* symtab.h (Symbol::is_predefined): New function.
(Symbol::init_base_output_data): Add is_predefined parameter.
(Symbol::init_base_output_segment): Likewise.
(Symbol::init_base_constant): Likewise.
(Symbol::is_predefined_): New data member.
(Sized_symbol::init_output_data): Add is_predefined parameter.
(Sized_symbol::init_output_segment): Likewise.
(Sized_symbol::init_constant): Likewise.
(enum Symbol_table::Defined): Add INCREMENTAL_BASE.
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instead of emit_copy_reloc.
(Copy_relocs::emit_copy_reloc): Refactor.
(Copy_relocs::make_copy_reloc): New function.
(Copy_relocs::add_copy_reloc): Remove.
* copy-relocs.h (Copy_relocs::emit_copy_reloc): Move to public
section.
(Copy_relocs::make_copy_reloc): New function.
(Copy_relocs::add_copy_reloc): Remove.
* gold.cc (queue_middle_tasks): Emit old COPY relocations from
unchanged input files.
* incremental-dump.cc (dump_incremental_inputs): Print "COPY" flag.
* incremental.cc (Sized_incremental_binary::do_reserve_layout):
Reserve BSS space for COPY relocations.
(Sized_incremental_binary::do_emit_copy_relocs): New function.
(Output_section_incremental_inputs::write_info_blocks): Record
whether a symbol is copied from a shared object.
(Sized_incr_dynobj::do_add_symbols): Record COPY relocations.
* incremental.h (enum Incremental_shlib_symbol_flags): New type.
(INCREMENTAL_SHLIB_SYM_FLAGS_SHIFT): New constant.
(Incremental_input_entry_reader::get_output_symbol_index): Add
is_copy parameter.
(Incremental_binary::emit_copy_relocs): New function.
(Incremental_binary::do_emit_copy_relocs): New function.
(Sized_incremental_binary::Sized_incremental_binary): Initialize
new data member.
(Sized_incremental_binary::add_copy_reloc): New function.
(Sized_incremental_binary::do_emit_copy_relocs): New function.
(Sized_incremental_binary::Copy_reloc): New struct.
(Sized_incremental_binary::Copy_relocs): New typedef.
(Sized_incremental_binary::copy_relocs_): New data member.
* symtab.cc (Symbol_table::add_from_incrobj): Change return type.
* symtab.h (Symbol_table::add_from_incrobj): Change return type.
* target.h (Sized_target::emit_copy_reloc): New function.
* x86_64.cc (Target_x86_64::emit_copy_reloc): New function.
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* sco5-core.c: Init match_priority field.
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indirect links here.
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A new field was recently added to struct bfd_target, and irix-core.c
needs an update...
bfd/ChangeLog:
* irix-core.c (irix_core_vec): Add match_priority field.
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* cli/cli-cmds.c (shell_escape): Use waitpid.
* rs6000-nat.c (exec_one_dummy_insn): Likewise.
gdb/testsuite/
* gdb.base/async-shell.c: New file.
* gdb.base/async-shell.exp: New file.
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clone clones and subprograms.
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* xcoffread.c (dwarf2_xcoff_names): New variable.
(aix_process_linenos): Add a guard.
(xcoff_symfile_finish): Free dwarf2.
(xcoff_initial_scan): Add dwarf2 support.
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gdb/testsuite/
* gdb.threads/pending-step.exp: Add more context to SIGTRAP match.
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gdb/
* infcall.c (run_inferior_call): Don't mask async. Instead force
a synchronous wait, if the target can async.
* target.h (struct target_ops): Delete to_async_mask.
(target_async_mask): Delete.
* target.c (update_current_target): Delete references to to_async_mask.
* linux-nat.c (linux_nat_async_mask_value): Delete.
(linux_nat_is_async_p, linux_nat_can_async_p): Remove references
to linux_nat_async_mask_value.
(linux_nat_async_mask): Delete.
(linux_nat_async, linux_nat_close): Remove references to
linux_nat_async_mask_value.
* record.c (record_async_mask_value): Delete.
(record_async): Remove references to record_async_mask_value.
(record_async_mask): Delete.
(record_can_async_p, record_is_async_p): Remove references to
record_async_mask_value.
(init_record_ops, init_record_core_ops): Remove references to
record_async_mask.
* remote.c (remote_async_mask_value): Delete.
(init_remote_ops): Remove reference to remote_async_mask.
(remote_can_async_p, remote_is_async_p): Remove references to
remote_async_mask_value.
(remote_async): Remove references to remote_async_mask_value.
(remote_async_mask): Delete.
* infrun.c (fetch_inferior_event): Don't claim registers changed
if the current thread is already not executing.
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2011-06-03 Nick Clifton <nickc@redhat.com>
Ben Elliston <bje@gnu.org>
* config.sub (v850e1, v850es, v850e2, v850e2v3): New.
2011-05-30 Chris Metcalf <cmetcalf@tilera.com>
Ben Elliston <bje@gnu.org>
* config.guess (tile*:Linux:*:*): Use vendor "unknown", not
"tilera", for consistency with other architectures.
* config.sub (tile*-*, tilegx-*): Use a more general pattern for
"tile" to allow matching tilepro, tilegx32 and other variants.
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Add match_priority.
* configure.in: Bump bfd version.
* elfcode.h (elf_object_p): Delete hacks preventing match of
EM_NONE and ELFOSABI_NONE targets when a better match exists.
* elfxx-target.h (elf_match_priority): Define and use.
* format.c (bfd_check_format_matches): Use target match_priority
to choose best of multiple matching targets. In cases with multiple
matches rerun _bfd_check_format if we don't choose the last match.
* aout-adobe.c, * aout-arm.c, * aout-target.h, * aout-tic30.c,
* binary.c, * bout.c, * coff-alpha.c, * coff-i386.c, * coff-i860.c,
* coff-i960.c, * coff-ia64.c, * coff-mips.c, * coff-or32.c,
* coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic30.c,
* coff-tic54x.c, * coff-x86_64.c, * coff64-rs6000.c, * coffcode.h,
* i386msdos.c, * i386os9k.c, * ieee.c, * ihex.c, * mach-o-target.c,
* mipsbsd.c, * mmo.c, * nlm-target.h, * oasys.c, * pdp11.c,
* pe-mips.c, * pef.c, * plugin.c, * ppcboot.c, * som.c, * srec.c,
* tekhex.c, * trad-core.c, * verilog.c, * versados.c, * vms-alpha.c,
* vms-lib.c, * xsym.c: Init match_priority field.
* configure: Regenerate.
* bfd-in2.h: Regenerate.
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2011-06-04 H.J. Lu <hongjiu.lu@intel.com>
PR ld/12842
* elfcode.h (elf_object_p): Revert the last change.
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Now that the common sim testsuite code supports .S and .c files, we
can import the Blackfin testsuite. There are about ~800 tests here,
so I'm only attaching a compressed patch of them. Other than adding
files to sim/testsuite/sim/bfin/, the sim/configure.tgt file was
updated to mark Blackfin as having a testsuite, and sim/configure
regenerated.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The BF537 family glues a bunch of peripherals into single interrupt lines
that run into the SIC. To model this same behavior in the sim, we need to
use the glue-or device, and in order to use that, we need to tweak things
a bit in the mach code to allow declaring of these new devices.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The machs.c file is the best place for holding cpu-specific details, so
restructure the way the SIC manages its ports to do just that. Now the
SIC's have a standard set of input pins and the different line routing
from peripherals is kept in the device tree only. This better models
the hardware where the SIC doesn't care about the exact peripheral that
is sending it stuff, just which input pin it gets it on.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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return the other arch.
* elfcode.h (elf_object_p): Allow explicit match to generic ELF
target.
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