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2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel15-8/+708
* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196. (main): Recognize the new CPU string. * s390-opc.c: Add new instruction formats and masks. * s390-opc.txt: Add new z196 instructions. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/tc-s390.c: (md_parse_option): New option -march=z196. * doc/c-s390.texi: Document new option. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/s390.exp: Run the zarch-z196 test. * gas/s390/zarch-z196.d: Add new instructions. * gas/s390/zarch-z196.s: Likewise. * gas/s390/zarch-z9-109.d: Likewise. * gas/s390/zarch-z9-109.s: Likewise.
2010-09-272010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>Andreas Krebbel17-94/+144
* s390-dis.c (print_insn_s390): Pick instruction with most specific mask. * s390-opc.c: Add unused bits to the insn mask. * s390-opc.txt: Reorder some instructions to prefer more recent versions. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * gas/s390/esa-g5.d: Adjust serveral instructions. * gas/s390/esa-reloc.d: Likewise. * gas/s390/esa-z990.d: Likewise. * gas/s390/zarch-reloc.d: Likewise. * gas/s390/zarch-z10.d: Likewise. * gas/s390/zarch-z9-ec.d: Likewise. * gas/s390/zarch-z900.d: Likewise. 2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7. * ld-s390/tlsbin_64.dd: Likewise. * ld-s390/tlspic.dd: Likewise. * ld-s390/tlspic_64.dd: Likewise.
2010-09-272010-09-27 Tejas Belagod <tejas.belagod@arm.com>Matthew Gretton-Dann12-2/+89
* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative VSTR, issue an error in THUMB mode. * opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment correction to unaligned PCs while printing comment. * gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment. * gas/testsuite/gas/arm/vldr.d: Likewise. * gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR. * gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise. * gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise. * gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise. * gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
2010-09-27*** empty log message ***gdbadmin1-1/+1
2010-09-27daily updateAlan Modra1-1/+1
2010-09-26*** empty log message ***gdbadmin1-1/+1
2010-09-26daily updateAlan Modra1-1/+1
2010-09-25*** empty log message ***gdbadmin1-1/+1
2010-09-25daily updateAlan Modra1-1/+1
2010-09-24gdb/Jan Kratochvil5-3/+200
Fix lost siginfo_t for inferior calls. * infrun.c (struct inferior_thread_state) <siginfo_gdbarch, siginfo_data>: New. (save_inferior_thread_state): New variables regcache, gdbarch and siginfo_data. Initialize SIGINFO_DATA if gdbarch_get_siginfo_type_p. Move INF_STATE allocation later, pre-clear it. Initialize REGISTERS using REGCACHE. (restore_inferior_thread_state): New variables regcache and gdbarch. Restore SIGINFO_DATA for matching GDBARCH. Restore REGISTERS using REGCACHE. Free also SIGINFO_DATA. gdb/testsuite/ Fix lost siginfo_t for inferior calls. * gdb.base/siginfo-infcall.exp: New file. * gdb.base/siginfo-infcall.c: New file.
2010-09-24 * dwarf2read.c (dw2_expand_symtabs_matching): Add missingTom Tromey2-16/+19
MAYBE_SWAPs. (dw2_map_symbol_names): Likewise.
2010-09-24Fix find_oload_champ_namespace_loop memory leak.Sami Wagiaalla2-1/+6
2010-09-24 Sami Wagiaalla <swagiaal@redhat.com> * valops.c (find_oload_champ_namespace_loop): replace incorrect discard_cleanups do_cleanups.
2010-09-24 PR gdb/11842Pedro Alves2-0/+4
gdb/ * amd64-linux-nat.c (compat_siginfo_from_siginfo) (siginfo_from_compat_siginfo): Also copy si_pid and si_uid when si_code is < 0. Check for si_code == SI_TIMER before checking for si_code < 0. gdb/gdbserver/ * linux-x86-low.c (compat_siginfo_from_siginfo) (siginfo_from_compat_siginfo): Also copy si_pid and si_uid when si_code is < 0. Check for si_code == SI_TIMER before checking for si_code < 0.
2010-09-24 gdb/Pedro Alves4-16/+38
* amd64-linux-nat.c (compat_siginfo_from_siginfo) (siginfo_from_compat_siginfo): Also copy si_pid and si_uid when si_code is < 0. Check for si_code == SI_TIMER before checking for si_code < 0. gdb/gdbserver/ * linux-x86-low.c (compat_siginfo_from_siginfo) (siginfo_from_compat_siginfo): Also copy si_pid and si_uid when si_code is < 0. Check for si_code == SI_TIMER before checking for si_code < 0.
2010-09-242010-09-24 Thomas Schwinge <thomas@codesourcery.com>Thomas Schwinge23-59/+66
* elf32-arm.c, elf32-cris.c, elf32-hppa.c, elf32-i370.c, elf32-m32r.c, elf32-m68k.c, elf32-microblaze.c, elf32-ppc.c, elf32-score.c, elf32-score7.c, elf32-sh.c, elf32-vax.c, elf32-xtensa.c, elf64-alpha.c, elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-sparc.c, elfcode.h, elflink.c, elfxx-ia64.c, elfxx-mips.c: Use STN_UNDEF when referring to the zero symbol index.
2010-09-242010-09-24 Thomas Schwinge <thomas@codesourcery.com>Thomas Schwinge2-1/+6
* elflink.c (bfd_elf_reloc_symbol_deleted_p): Compare the symbol index to STN_UNDEF, not SHN_UNDEF.
2010-09-24 * objfiles.h (ALL_OBJSECTIONS): Handle breaks in the inner loop.Pedro Alves2-3/+42
2010-09-24Remove GOTOFF in ld-i386/nogot1.s.H.J. Lu2-1/+6
2010-09-23 H.J. Lu <hongjiu.lu@intel.com> PR ld/11812 * ld-i386/nogot1.s: Don't use GOTOFF.
2010-09-24 * rx.c (decode_opcode): Add cycle information for RXO_smovu.Kevin Buettner2-0/+8
2010-09-24Fix typo in ChangeLog entry.Kevin Buettner1-1/+1
2010-09-24 * scripttempl/armcoff.sc: Revert 2010-09-22 change.Dave Korn2-26/+5
2010-09-24*** empty log message ***gdbadmin1-1/+1
2010-09-24daily updateAlan Modra1-1/+1
2010-09-23 * cpu.h (reset_decoder): Declare.Kevin Buettner4-0/+15
* load.c (rx_load): Call `reset_decoder'. * rx.c (reset_decoder): New function.
2010-09-23 * rx.c (decode_opcode): Declare `rx' as unsigned.Kevin Buettner2-1/+3
2010-09-23 * fpu.c, gdb-if.c, load.c, misc.c, syscalls.c (config.h): Include.Kevin Buettner6-0/+9
2010-09-23bfd/Bernd Schmidt4-0/+97
* elf32-tic6x.c (elf32_tic6x_fake_sections): New function. (elf_backend_fake_sections): Define. ld/testsuite/ * ld-tic6x/pcrel-reloc-local-r-rel-rela.d: New test.
2010-09-23 * bfd/bfd-in2.h (BFD_RELOC_ARM_HVC): New enum value.Matthew Gretton-Dann15-51/+676
* gas/config/tc-arm.c (arm_ext_virt): New variable. (arm_reg_type): Add REG_TYPE_RNB for banked registers. (reg_entry): Allow registers to be larger than a byte. (reg_alias): Fix type warning. (parse_operands): Parse banked registers when appropriate. (do_mrs): Add support for Virtualization Extensions. (do_hvc): New function. (do_t_mrs): Add support for Virtualization Extensions. (do_t_msr): Likewise. (do_t_hvc): New function. (SPLRBANK): New define. (reg_names): Add banked registers. (insns): Add support for Virtualization Extensions. (md_apply_fixup): Likewise. (arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions. (arm_extensions): Add 'virt' extension. (aeabi_set_public_attributes): Add support for Virtualization Extensions. * gas/doc/c-arm.texi: Document 'virt' extension. * gas/testsuite/gas/arm/armv7-a+virt.d: New test. * gas/testsuite/gas/arm/armv7-a+virt.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions. * gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test. * gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise. * include/opcode/arm.h (ARM_EXT_VIRT): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Rename... (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization Extensions. * opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support. (thumb32_opcodes): Likewise. (banked_regname): New function. (print_insn_arm): Add Virtualization Extensions support. (print_insn_thumb32): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_adiv): New variable.Matthew Gretton-Dann12-10/+112
(do_div): New function. (insns): Accept UDIV and SDIV in ARM state. (arm_cpus): The cortex-a15 option has all current v7-A extensions. (arm_extensions): Add 'idiv' extension. (aeabi_set_public_attributes): Update Tag_DIV_use values for the Integer Divide extension. * gas/doc/c-arm.texi: Document the idiv extension. * gas/testsuite/gas/arm/armv7-a+idiv.d: New test. * gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension. * gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test. * include/opcode/arm.h (ARM_AEXT_ADIV): New define. (ARM_ARCH_V7A_IDIV_MP_SEC): Likewise. * opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in ARM state.
2010-09-23 * config/tc-arm.c (arm_ext_v6m): New variable.Matthew Gretton-Dann12-3/+104
(arm_ext_m): Add support for OS extension. (arm_ext_os): New variable. (do_t_swi): In v6-M ensure we have the OS extension. (arm_cpus): The cortex-m1 and cortex-m0 options have the OS extension by default. (arm_archs): Add armv6s-m. (arm_extensions): Add 'os' extension. (cpu_arch_ver): Add support for v6S-M. * gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m architecture options. * gas/testsuite/gas/arm/archv6s-m-bad.d: New test. * gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise. * gas/testsuite/gas/arm/archv6s-m.d: Likewise. * gas/testsuite/gas/arm/archv6s-m.s: Likewise. * gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise. * include/opcode/arm.h (ARM_EXT_OS): New define. (ARM_AEXT_V6SM): Likewise. (ARM_ARCH_V6SM): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_v6z): Remove.Matthew Gretton-Dann22-19/+135
(arm_ext_sec): New variable. (do_t_smc): In Thumb state SMC requires v7-A. (insns): Make SMC depend on Security Extensions. (arm_cpus): All -mcpu=cortex-a* options have the Security Extensions. (arm_extensions): Add 'sec' extension. (cpu_arch_ver): Reorder. (aeabi_set_public_attributes): Emit Tag_Virtualization_use as appropriate. * gas/doc/c-arm.texi: Document Security Extensions. * gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions.. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test. * gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test. * gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions. * gas/testsuite/gas/arm/thumb32.d: Likewise. * gas/testsuite/gas/arm/thumb32.s: Likewise. * include/opcode/arm.h (ARM_EXT_V6Z): Remove. (ARM_EXT_SEC): New define. (ARM_AEXT_V6Z): Use Security Extensions. (ARM_AEXT_V6ZK): Likeiwse. (ARM_AEXT_V6ZT2): Likewise. (ARM_AEXT_V6ZKT2): Likewise. (ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions. (ARM_ARCH_V7A_SEC): New define. (ARM_ARCH_V7A_MP): Rename... (ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions. * ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (arm_ext_mp): Add.Matthew Gretton-Dann16-5/+197
(do_pld): Update comment. (insns): Add support for pldw. (arm_cpus): Update cortex-a5, cortex-a9, and cortex-a15 to support MP extension. (arm_extensions): Add 'mp' extension. (aeabi_set_public_attributes): Emit correct build attribute when MP extension is enabled. * gas/doc/c-arm.texi: Update for MP extensions. * gas/testsuite/gas/arm/arch7a-mp.d: Add. * gas/testsuite/gas/arm/arch7ar-mp.s: Likewise. * gas/testsuite/gas/arm/arch7r-mp.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.d: Likewise. * gas/testsuite/gas/arm/armv2-mp-bad.l: Likewise. * gas/testsuite/gas/arm/attr-march-all.d: Update for MP extension. * gas/testsuite/gas/arm/attr-march-armv7-a+mp.d: Add. * gas/testsuite/gas/arm/attr-march-armv7-r+mp.d: Likewise. * include/opcode/arm.h (ARM_EXT_MP): Add. (ARM_ARCH_V7A_MP): Likewise. * opcodes/arm-dis.c (arm_opcodes): Add support for pldw. (thumb32_opcodes): Likewise.
2010-09-23 * gas/config/tc-arm.c (md_pseduo_table): Add .arch_extension directive.Matthew Gretton-Dann3-23/+199
(arm_option_extension_value_table): Add. (arm_extensions): Change type. (arm_option_cpu_table): Rename... (arm_option_fpu_table): ...to this. (arm_fpus): Change type. (arm_parse_extension): Enforce alphabetical order. Allow extensions to be removed. (arm_parse_arch): Allow extensions to be specified with -march. (s_arm_arch_extension): Add. (s_arm_fpu): Update for type changes. * gas/doc/c-arm.texi: Document changes to infrastructure.
2010-09-23 * ld-elf/elf.exp: Don't run --gc-sections tls var test on v850.Alan Modra10-35/+85
* ld-elf/group2.d: xfail xstormy. * ld-elf/group4.d: Likewise. * ld-elf/group5.d: Likewise. * ld-elf/group6.d: Likewise. * ld-elf/init-fini-arrays.d: xfail cr16 and crx. * ld-elf/orphan2.d: xfail xstormy. * ld-elf/sec64k.exp: Don't run on targets using generic linker. Allow a larger range for ld -r expected bar_1 section. Don't run final link test on a number of targets. Select avr6 for avr targets. * ld-elfcomm/elfcomm.exp: Don't attempt on hpux.
2010-09-23 * gas/all/gas.exp: Update "forward" and "redef3" xfails.Alan Modra4-7/+15
* gas/m68k/all.exp: Don't xfail pcrel on uclinux. * gas/sh/arch/arch.exp: Don't pass dashes to send_log.
2010-09-23 * config/tc-mn10300.c (tc_gen_reloc): Replace absolute symbolsAlan Modra2-8/+14
with the absolute section symbol.
2010-09-23 * binutils-all/ar.exp: Don't run unique_symbol on msp or hpux.Alan Modra5-4/+18
* binutils-all/copy-2.d: Update not-target list. * binutils-all/note-1.d: Don't run on h8300. * binutils-all/objcopy.exp: Don't run strip-10 on msp or hpux. (objcopy_test): Remove h8300-rtems from xfails.
2010-09-23 * ld-d10v/reloc-007.d: Don't error.Alan Modra6-7/+19
* ld-d10v/reloc-008.d: Likewise. * ld-d10v/reloc-015.d: Likewise. * ld-d10v/reloc-016.d: Likewise. * ld-d10v/reloc-012.ld: Use a sane offset.
2010-09-23 * cpu-d10v.c: Make bits_per_address 18 for all arch_info entries.Alan Modra2-10/+14
2010-09-23ld/Alan Modra4-4/+14
* ldlang.c (lang_add_section): Don't copy SEC_RELOC from input to output section on a final link. bfd/ * elf.c (_bfd_elf_init_private_section_data): Allow for SEC_RELOC difference between input and output section.
2010-09-23 * gas/mips/jal.d: Remove duplicate pattern.Maciej W. Rozycki2-1/+5
2010-09-23*** empty log message ***gdbadmin1-1/+1
2010-09-23daily updateAlan Modra1-1/+1
2010-09-22[Ada] Do not compute task ptid when debugging core fileJoel Brobecker2-3/+17
After thread support over core files was added for GNU/Linux was added, we started noticing the following type of crash when trying to perform task switches (this is a bit accademic, since task switching is not supported when debugging core files - this is what our testcase was verifying). (please check out the comment inside ada-tasks.c:task_command for more details on this topic) The reason for the crash comes from the fact that the GNU/Linux thread layer now gets pushed on the target stack, causing the associated to_get_ada_task_ptid target method to be activated. This routine makes the assumption that, for all threads, the private area is not NULL. This is incorrect in the case of core files, as the core layer creates some threads with no private data. But, taking a step back, we don't need to try to compute the task ptid, as we'll never be using it anyways (we only use it for task switching). So the fix is to avoid the ptid computation altogether when debugging a core file. gdb/ChangeLog: * ada-tasks.c (read_atcb): Do not compute the task ptid when debugging a core file.
2010-09-22opcodes: blackfin: fix decoding of 32bit addresses on 64bit systemsMike Frysinger2-0/+7
The Blackfin ISA is very exact with regards to address truncation when under/over flowing its 32bit range. On a 32bit system, things work the same and so addresses are decoded properly. On a 64bit system though, the decoded addresses may include the bits that are supposed to have been truncated. So force a 32bit truncation after the address has been calculated. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes: blackfin: fix decoding of all register move insnsMike Frysinger2-12/+34
Many register move insns were not being decoded properly, so rewrite the whole function to be a bit more manageable in terms of valid combinations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes: blackfin: fix decoding of many invalid insnsMike Frysinger2-21/+127
The Blackfin disassembler was originally based on the premise of parsing valid opcodes all the time, so some of the opcode checking can be a bit fuzzy. This is exemplified in decoding of parallel insns where many times things are decoded as invalid when in reality, they may not be used in parallel combinations. So add parallel checking to most insn decoding routines so we see ILLEGAL and not just whatever insn happens to be close to a valid mnemonic, as well as some additional sub-opcode checks. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes: blackfin: mark push/pop insns with a P6/P7 range as illegalMike Frysinger2-0/+7
The push/pop multiple insn has a 3 bit field for the P register range, but only values of 0...5 are valid (P0 - P5). There is no such P6 or P7 register, so mark these insns as illegal. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes: blackfin: fix decoding of vector shift insn w/saturationMike Frysinger2-1/+5
The saturation bit was missed when decoding a vector shift insn leading to the output looking the same as the non-saturating insn. Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-22opcodes: blackfin: decode all ASTAT bitsMike Frysinger2-8/+25
All ASTAT bits work in the hardware even though they aren't part of the official Blackfin ISA. So decode every ASTAT field to make the output a bit nicer when working with hand generated opcodes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
generated by cgit v1.1 at 2024-12-16 20:49:04 +0000