Age | Commit message (Collapse) | Author | Files | Lines |
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(decode_locdesc): Don't set it.
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* ld-ia64/ia64.exp: Undo the last change. Add support for *.d.
* ld-ia64/link-order.d: New file.
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2005-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/251
* binutils-all/group.s: New file.
* binutils-all/objcopy.exp (objcopy_test_readelf): New
procedure.
Use it to test ELF group.
ld/testsuite/
2005-10-20 H.J. Lu <hongjiu.lu@intel.com>
PR ld/251
* ld-elf/group.2d: New file.
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* Makefile.def (gcc) <target>: Fix thinko.
* Makefile.in: Regenerate.
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2005-10-19 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/1487
* binutils-all/objcopy.exp (objcopy_test): New procedure.
Use it to test simple copy, ia64 link order and ELF unknown
section type.
* binutils-all/unknown.s: New file.
ld/testsuite/
2005-10-19 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/1487
* ld-elf/unknown.d: New file.
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into jrc/jalrc versions if ISA_MIPS32+ and not doing the swap,
hence avoiding to emit a nop.
* gas/mips/mips.exp: Run new test.
* gas/testsuite/gas/mips/mips16e-jrc.s: New test for converting
jalr/jr to the compact jalrc/jrc instructions.
* gas/testsuite/gas/mips/mips16e-jrc.d: New.
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* ld-ia64/ia64.exp: Check link order for ld -r.
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PR binutils/1321
* binutils-all/link-order.s: New.
* binutils-all/objcopy.exp: Check ia64 link order.
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(get_arm_elf_section_data): Use it.
(unrecord_section_with_arm_elf_section_data): Use it.
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and multiply-and-add instructions.
* gas/s390/zarch-z9-109.d: Update expected result.
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instructions.
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* emulparams/armelf.sh: Add .ARM.attributes to OTHER_SECTIONS.
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LEX_BEGIN_NAME.
(bfin_start_line_hook): Remove the workaround for LSETUP(.
(bfin_name_is_register): Remove the workarounds for LSETUP(
and SAA(.
(bfin_start_label): Ditto.
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* gas/arm/eabi_attr_1.s: New test.
* gas/arm/eabi_attr_1.d: New test.
* gas/arm/arm7t.d: Only disassemble code sections.
* gas/arm/bignum1.d: Ignore Arm object attribute sections.
* gas/arm/mapping.d: Ditto.
* gas/arm/unwind.d: Ditto.
* gas/elf/section0.d: Ditto.
* gas/elf/section1.d: Ditto.
* gas/elf/elf.exp: Set target_machine for Arm EABI based targets.
* gas/elf/section2.e-armeabi: New file.
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default_lit_sections regardless of use_literal_section.
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reading instruction from memory.
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* Makefile.in: Regenerated.
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powerpc64.
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* dwarf2expr.c (dwarf_expr_fetch): Use correct comparison to
detect stack underflow.
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* gdb.arch/altivec-regs.exp: Adjust "info reg vrsave" and "info reg
vscr" tests to better match output.
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unsigned line number. Do not include "dwarf2dbg.h".
* config/tc-xtensa.c (md_pseudo_table): Remove entry for "loc".
(xtensa_dwarf2_directive_loc, xtensa_dwarf2_emit_insn): Delete.
(xg_build_to_insn, xg_build_token_insn): Update TInsn uses.
(md_assemble): Use as_where instead of dwarf2_where.
(xg_assemble_vliw_tokens): Use unsigned line numbers instead of
dwarf2_line_infos. Change to call new_logical_line followed by
dwarf2_emit_insn.
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'cfsh64lt'.
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* configure: Regenerate.
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Add FLAG_STRICT to pa10 ftest opcode.
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* coff-rs6000.c (rs6000coff_vec): Initialize
_bfd_match_sections_by_type with
_bfd_generic_match_sections_by_type.
(pmac_xcoff_vec): Likewise.
* coff64-rs6000.c (rs6000coff64_vec): Likewise.
(aix5coff64_vec): Likewise.
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2005-10-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/1467
* elf-bfd.h (_bfd_elf_match_sections_by_type): New.
(_bfd_generic_match_sections_by_type): New. Defined.
* elf.c (_bfd_elf_match_sections_by_type): New.
* libbfd-in.h (_bfd_generic_match_sections_by_type): New.
* bfd-in2.h: Regenerated.
* libbfd.h: Likewise.
* libbfd.c (_bfd_generic_match_sections_by_type): New.
* targets.c (BFD_JUMP_TABLE_LINK): Initialize
_bfd_match_sections_by_type with
_bfd_generic_match_sections_by_type.
(bfd_target): Add _bfd_match_sections_by_type.
ld/
2005-10-15 H.J. Lu <hongjiu.lu@intel.com>
PR ld/1467
* emultempl/elf32.em: Include "elf-bfd.h".
(gld${EMULATION_NAME}_place_orphan): Check section type and
don't use section name for ELF input sections.
* ld.texinfo: Document orphan section processing.
* ldlang.c (lang_output_section_find_by_flags): Match section
types by calling bfd_match_sections_by_type.
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* rs6000-tdep.c (rs6000_register_reggroup_p): Add vscr to test for
vector registers.
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