aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
1998-06-09* Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael1-0/+10
* of special values from signal_exception() in interp.c into mips.igen. * * Modified: ChangeLog gencode.c interp.c mips.igen sim-main.h
1998-06-09Disassemble 'add rX, rY, #0' as 'mov rX, rY'.Nick Clifton2-0/+6
1998-06-09 * symfile.c (symbol_file_add): Always call theKeith Seitz3-17/+29
pre/post_add_symbol_hooks. * gdbtk.c (gdb_get_vars_command): Return static variables and variables stored in registers.
1998-06-09 * config/tc-dvp.c (assemble_vu): Print better error message ifDoug Evans2-1/+14
lower insn is missing.
1998-06-09 * Makefile.am: Rebuild dependencies.Ian Lance Taylor1-0/+6
(DEP_INCLUDES): Fix reference to intl build directory. * Makefile.in: Rebuild.
1998-06-09* Updates to tx3904 peripheral simulations for ECC.Frank Ch. Eigler4-34/+73
Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com> * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE register upon non-zero interrupt event level, clear upon zero event value. * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal by passing zero event value. (*_io_{read,write}_buffer): Endianness fixes. * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes. (deliver_*_tick): Reduce sim event interval to 75% of count interval. * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based serial I/O and timer module at base address 0xFFFF0000.
1998-06-09* Handle 10 and 20-bit versions of Break instruction. Move handlingIan Carmichael4-45/+68
* of special values from signal_exception() in interp.c into mips.igen. * * Modified: gencode.c interp.c mips.igen sim-main.h
1998-06-09Make 'send' be CONST char * to avoid compiler warning.Nick Clifton1-0/+5
1998-06-09Add definition of EM_ARMNick Clifton2-7/+12
1998-06-09Tue Jun 9 12:20:05 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-0/+483
* doc/c-i386.texi: Update 16 bit documentation.
1998-06-09Tue Jun 9 12:20:05 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor3-7/+25
* config/tc-i386.h: Change Data16 to Size16, Data32 to Size32, IgnoreDataSize to IgnoreSize as they are used for address size as well as data size. * config/tc-i386.c: Likewise. Add code to reject addr32/data32 in 32-bit mode, similarly addr16/data16 and variants.
1998-06-09Tue Jun 9 12:16:01 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-41/+45
* i386.h: Change occurences of Data16 to Size16, Data32 to Size32, IgnoreDataSize to IgnoreSize. Flag address and data size prefixes with Size16|IgnoreSize or Size32|IgnoreSize.
1998-06-09 * sim/sky/dma.h: New file.Doug Evans1-0/+9
* sim/sky/vif.h: New file. * sim/sky/vu.h: New file. * sim/sky/sce_main.c: Move magic numbers to .h files.
1998-06-09sky.ld: Remove big endian stuff in OUTPUT_FORMATJames Lemke2-1/+5
1998-06-09 * mips.igen (SWC1) : Correct the handling of ReverseEndianGavin Romig-Koch2-6/+11
and BigEndianCPU.
1998-06-09 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mipsGavin Romig-Koch2-1/+7
parts. * configure: Update.
1998-06-09Updated to match latest assembler results.Nick Clifton1-0/+6
1998-06-09Foixes for PR16116 and ER15940 - improve parallel insn handling.Nick Clifton2-61/+118
1998-06-09Fix for PR16116 - remove FLAG_MUL32 attribute from MULX2H insn.Nick Clifton1-0/+4
1998-06-08 * sim/m32r/trap.cgs: Test trap 2.Doug Evans1-0/+4
1998-06-08Test trap 2.Doug Evans1-0/+30
1998-06-08 * config/tc-dvp.c (dvp_relax_frag): Adjust target address by stretch.Doug Evans2-0/+15
PR 16132.
1998-06-08 * gas/dvp/relax-1.[sd]: Test .org/relaxing interaction.Doug Evans1-0/+6
1998-06-08Use signed comparisons against addend.Nick Clifton1-0/+5
1998-06-08 * objfiles.c (add_to_objfile_sections): All targets to defineRon Unrau2-1/+13
TARGET_KEEP_SECTION to permit them to retain bfd sections that GDB would otherwise have discarded.
1998-06-08Support for timers for mn103002. Still needs more testing/debugging.Joyce Janczyn1-0/+823
1998-06-08add test to verify that changes made to the PSW in-parallel-with a trapDavid Taylor1-0/+35
instruction end up in the bPSW and not in the PSW. (PR 16026).
1998-06-08Add dv-mn103tim.c and dv-mn103ser.cJoyce Janczyn1-1/+1
1998-06-08Add timer and serial devices (mn103tim and mn103ser), supportJoyce Janczyn1-0/+22
--board=am32 for runtime control of device simulation, and adjust interrupt settings to support am32 instead of am30.
1998-06-08Skeleton file for mn1030002 serial device implementation.Joyce Janczyn1-0/+413
1998-06-08Fix typo.Joyce Janczyn1-3/+0
1998-06-08Fix interrupt settings for mn103002, not mn10300 implementation.Joyce Janczyn1-74/+60
1998-06-08 * interp.c: (mn10300_option_handler): New function parses argumentsJoyce Janczyn1-114/+156
using sim-options. start-sanitize-am30 * (board): Add --board option for specifying am32. * (sim_open): Create new timer and serial devices and control configuration of other am32 devices via board option. end-sanitize-am30
1998-06-08Add new devices: mn103tim and mn103ser.Joyce Janczyn2-155/+213
1998-06-08Mon Jun 8 12:20:30 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor3-403/+591
* config/tc-i386.c: REPNE renamed to REPNE_PREFIX_OPCODE, and likewise for REPE. * config/tc-i386.c (reloc): Add braces. * config/tc-i386.c (struct _i386_insn): Rename bi to sib to be consistent with Intel naming. * config/tc-i386.h (base_index_byte): Rename to sib_byte. Don't use bitfields in sib_byte. (modrm_byte): Don't use bitfields here either. * config/tc-i386.c (current_templates): Add const. (parse_register): Add const to return, param, and char *s. (i386_operand): Add const to reg_entry *r. * config/tc-i386.h (templates): Add const to start, end. Inspired by code for 16 bit gas support from Martynas Kunigelis <martynas@nm3.ktu.lt>: * config/tc-i386.c (md_assemble): Add full support for 16 bit modrm, and Jump, JumpByte, JumpDword, JumpInterSegment insns. (uses_mem_addrmode): Remove. (md_estimate_size_before_relax): Add support here too. (md_relax_table): Rewrite interface to md_relax for 16 bit support. (BYTE, WORD, DWORD, UNKNOWN_SIZE): Remove. (opcode_suffix_to_type): Remove. (CODE16, SMALL, SMALL16, BIG, BIG16): Define. (SIZE_FROM_RELAX_STATE): Modify to suit above. (md_convert_frag): Likewise. (i386_operand): Add support for 16 bit base/index regs, immediates, and displacements. Remove some unnecessary casts, and localise end_of_operand_string, displacement_string_start, displacement_string_end variables. Add GCC_ASM_O_HACK. * config/tc-i386.h (NO_BASE_REGISTER_16): Define. * config/tc-i386.c (prefix_hash): Remove. (md_begin): Rewrite without obstacks. Remove prefix hash table handling. Rewrite lexical table handling. (i386_print_statistics): Don't print prefix statistics. (md_assemble): Rewrite instruction parser so that line is not converted to lower case. Don't do a hash_find for prefixes, instead recognise them via opcode modifier. (expecting_operand, paren_not_balanced): Localise variables. * config/tc-i386.h (IsPrefix): Define. (prefix_entry): Remove. * config/tc-i386.h (PREFIX_SEPERATOR): Don't define. * config/tc-i386.c (PREFIX_SEPARATOR): Define here instead, using '\\' in case where comment_chars contains '/'. * config/tc-i386.c (MATCH): Ensure given operand and template match for JumpAbsolute. Makes e.g. `ljmp table(%ebx)' invalid; you must write `ljmp *table(%ebx)'. From H.J. Lu <hjl@gnu.org>: * config/tc-i386.c (BFD_RELOC_16, BFD_RELOC_16_PCREL): Define as 0 ifndef BFD_ASSEMBLER. (md_assemble): Allow immediate operands without suffix or other reg operand to default in size to the current code size.
1998-06-08Mon Jun 8 12:15:52 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-96/+83
* i386.h (REPNE): Rename to REPNE_PREFIX_OPCODE. (REPE): Rename to REPE_PREFIX_OPCODE. (i386_regtab_end): Remove. (i386_prefixtab, i386_prefixtab_end): Remove. (i386_optab): Use NULL as sentinel rather than "" to suit rewrite of md_begin. (MAX_OPCODE_SIZE): Define. (i386_optab_end): Remove. (sl_Suf): Define. (sl_FP): Use sl_Suf. * i386.h (i386_optab): Allow 16 bit displacement for `mov mem,acc'. Combine 16 and 32 bit forms of various insns. Allow 16 bit form of ljmp. Add IsPrefix modifier to prefixes. Add addr32, data32, dword, and adword prefixes. (i386_regtab): Add BaseIndex modifier to valid 16 bit base/index regs.
1998-06-08Mon Jun 8 09:45:00 1998 Catherine Moore <clm@cygnus.com>Catherine Moore2-0/+18
* config/tc-v850.c (md_begin): Restore creation of .call_table_text and .call_table_data sections.
1998-06-06Add prototypes.Nick Clifton1-0/+2
1998-06-06Add prototypes.Nick Clifton1-0/+4
1998-06-06Another fix for PR16116Nick Clifton2-0/+6
1998-06-06xIan Lance Taylor1-14/+34
1998-06-06Fri Jun 5 23:47:55 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-227/+238
* i386-dis.c: Combine aflag and dflag into sizeflag. Change OP_* functions to void. (OP_DSreg): Rename from OP_DSSI. (OP_ESreg): Rename from OP_ESDI. (Xb, Xv, Yb, Yv): Use index reg code, not b_mode or v_mode. (DSBX): Define. (append_seg): Rename from append_prefix. (ptr_reg): New function. (dis386): Add S suffix to pushf, popf, ret, lret, enter, leave. Add DSBX for xlat. (PREFIX_ADDR): Rename from PREFIX_ADR. (float_reg): Add non-broken opcodes for people who don't want UNIXWARE_COMPAT.
1998-06-06Fri Jun 5 23:42:43 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor2-736/+738
* i386.h (i386_regtab): Remove BaseIndex modifier from esp. * i386.h: Allow `l' suffix on fld, fst, fstp, fcom, fcomp with register operands, because this is a common idiom. Flag them with a warning. Allow illegal faddp, fsubp, fsubrp, fmulp, fdivp, fdivrp because gcc erroneously generates them. Also flag with a warning. * i386.h: Add suffix modifiers to most insns, and tighter operand checks in some cases. Fix a number of UnixWare compatibility issues with float insns. Merge some floating point opcodes, using new FloatMF modifier. (WORD_PREFIX_OPCODE): Rename to DATA_PREFIX_OPCODE for consistency. * i386.h: Change occurence of ShortformW to W|ShortForm. Add IgnoreDataSize where appropriate.
1998-06-06Fri Jun 5 23:27:04 1998 Alan Modra <alan@spri.levels.unisa.edu.au>Ian Lance Taylor3-261/+395
* config/tc-i386.c (mode_from_disp_size): Disp16 is mode 2. (i386_operand): Simplify checks for valid base/index combinations. Disallow `in 4(%dx),%al'. * config/tc-i386.c (struct _i386_insn): Make regs, base_reg, and index_reg const. (add_prefix): Change parameter from char to int. * config/tc-i386.h (Ugh): Define opcode modifier. * config/tc-i386.c (md_assemble): Print warnings for Ugh insns. * config/tc-i386.c (md_assemble): Rewrite MATCH and CONSISTENT_REGISTER_MATCH macros to check register types more thoroughly. Check for illegal suffix/operand combinations when matching insns with operands. Handle new `s' suffix, and associated FloatMF opcode modifier for float insns with memory operands. * config/tc-i386.h (FloatMF): Define new opcode modifier. (No_sSuf, No_bSuf, No_wSuf, No_lSuf): Likewise. (SHORT_OPCODE_SUFFIX, LONG_OPCODE_SUFFIX): Define. * config/tc-i386.c: Rename WORD_PREFIX_OPCODE to DATA_PREFIX_OPCODE throughout. * config/tc-i386.c (REGISTER_WARNINGS): Define. (md_assemble): Rewrite suffix/register operand checking code to be more thorough. Remove Abs8,16,32. Change occurrences of Mem to AnyMem, the better to grep. (pi): Remove Abs. (i386_operand): Don't set Mem bits in i.types[this_operand] when given a memory operand. Don't set Abs bits either. (type_names): Remove Mem*, Abs*. * config/tc-i386.h (Mem8, Mem16, Mem32, Abs8, Abs16, Abs32): Don't define opcode_modifiers as these cases are handled by Disp8, Disp16, Disp32 and suffix checks. (COMES_IN_BOTH_DIRECTIONS): Remove. (FloatR): Define. It's OK to share the bit with ReverseRegRegmem. * config/tc-i386.c (md_assemble): Don't emit operand size prefix if IgnoreDataSize modifier given. Remove ShortformW modifier test. Add test for ShortForm in W base_opcode modification. Merge Seg2ShortForm and Seg3ShortForm code. * config/tc-i386.h (ShortFormW): Remove. (IgnoreDataSize): Define.
1998-06-06sort sections by LMA then VMA.Nick Clifton2-5/+10
1998-06-06Add prototypes for static functions.Nick Clifton2-18/+55
Chnage type of addend from long to bfd_vma.
1998-06-05Fri Jun 5 19:15:59 1998 Andreas Schwab ↵Ian Lance Taylor1-0/+8
<schwab@issan.informatik.uni-dortmund.de> * gas/m68k/operands.s: For all pc relative addresses change tstl to pea since the former does not allow pcrel on m68000. Do not make label foo global, so that references to it can be relaxed on ELF targets. * gas/m68k/operands.d, gas/m68k/op68000.d: Updated.
1998-06-05Fri Jun 5 19:15:04 1998 Andreas Schwab ↵Ian Lance Taylor1-0/+5
<schwab@issan.informatik.uni-dortmund.de> * m68k-opc.c (tstb, tstw, tstl): Don't allow pcrel on 68000/68008/68010.
1998-06-05 * configure.tgt (dvp-*-*): Set targ_emul=elf32l5900.Doug Evans1-0/+1
1998-06-05 * emultempl/elf32.em (gld${EMULATION_NAME}_place_orphan): Set vma to 0Doug Evans2-0/+40
for .DVP.overlay.*.