Age | Commit message (Collapse) | Author | Files | Lines |
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on function descriptors.
(ELIMINATE_COPY_RELOCS): Expand comment.
(ppc64_elf_special_sections): Move. Don't include non-ppc64 sections.
Do include ".toc1".
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* m68hc11-tdep.c (m68hc11_gdbarch_init): Set non-deprecated
store_return_value and extract_struct_value_address.
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* minsyms.c (lookup_minimal_symbol_by_pc_section): If SECTION is
NULL, default to the section containing PC.
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2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (_bfd_elf_new_section_hook): Set the default section
type to SHT_NULL.
(elf_fake_sections): Set the section type based on asect->flags
if it is SHT_NULL. Don't abort on processor specific section
types.
gas/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (obj_elf_change_section): Update
elf_section_type and elf_section_flags only when they are
specified.
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* pshai.s, pshar.s, pshli.s, pshlr.s: New files.
* allinsn.exp: Add psha, pshl tests.
* pdec.s, pinc.s, padd.s, paddc.s: New files.
* allinsn.exp: Add pdec, pinc, padd, paddc tests.
* pand.s, pdmsb.s: New files.
* allinsn.exp: Add pand, pdmsb tests.
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* allinsn.exp, testutils.inc, add.s, fabs.s, fadd.s, fcmpeq.s,
fcmpgt.s, fcnvds.s, fcnvsd.s, fdiv.s, fldi0.s, fldi1.s, flds.s,
float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
shlr16.s, shlr2.s, shlr8.s, shlr.s, swap.s: New files.
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* gencode.c (pshl): Change < to <= (shift by 16 is allowed).
Cast argument of >> to unsigned to prevent sign extension.
(psha): Change < to <= (shift by 32 is allowed).
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* config/obj-elf.c (obj_elf_change_section): Always set section
type and flags.
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* bfd-in2.h: Regenerated.
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2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* elf-bfd.h (bfd_elf_special_section): New.
(elf_backend_data): Add special_sections, a pointer to
bfd_elf_special_section.
(elf_section_type). New.
(elf_section_flags): New.
(_bfd_elf_get_sec_type_attr): New.
* elf.c (_bfd_elf_make_section_from_shdr): Always use the
real section type/flags.
(special_sections): New.
(get_special_section): New.
(_bfd_elf_get_sec_type_attr): New.
(_bfd_elf_new_section_hook): Check special_section to set
elf_section_type and elf_section_flags.
(elf_fake_sections): Don't use section name to set ELF section
data.
* elf32-m32r.c (m32r_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-m68hc11.c (elf32_m68hc11_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-mcore.c (mcore_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-ppc.c (ppc_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-sh64.c (sh64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-v850.c (v850_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf32-xtensa.c (elf_xtensa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-alpha.c (elf64_alpha_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-hppa.c (elf64_hppa_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-ppc.c (ppc64_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elf64-sh64.c (sh64_elf64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-ia64.c (elfNN_ia64_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-mips.c (_bfd_mips_elf_special_sections): New.
* elfxx-mips.h (_bfd_mips_elf_special_sections): New.
(elf_backend_special_sections): Defined.
* elfxx-target.h (elf_backend_special_sections): New. Default
to NULL.
(elfNN_bed): Initialize special_sections.
* section.c (bfd_abs_section): Remove const.
(bfd_und_section): Likewise.
(bfd_com_section): Likewise.
(bfd_ind_section): Likewise.
gas/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* config/obj-elf.c (special_sections): Removed.
(obj_elf_change_section): Call _bfd_elf_get_sec_type_attr. Set
elf_section_type and elf_section_flags.
(elf_frob_file): Set SHT_GROUP.
* config/obj-elf.h (obj_sec_set_private_data): New.
* config/tc-alpha.h (ELF_TC_SPECIAL_SECTIONS): Removed.
* config/tc-ia64.h: Likewise.
* config/tc-m32r.h: Likewise.
* config/tc-m68hc11.h: Likewise.
* config/tc-mcore.h: Likewise.
* config/tc-mips.h: Likewise.
* config/tc-ppc.h: Likewise.
* config/tc-sh64.h: Likewise.
* config/tc-v850.h: Likewise.
* config/tc-xtensa.h: Likewise.
* config/tc-v850.h (SHF_V850_GPREL): Removed.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
* subsegs.c (subseg_get): Call obj_sec_set_private_data if it
is defined.
include/elf/
2003-07-25 H.J. Lu <hongjiu.lu@intel.com>
* v850.h (SHF_V850_GPREL): New.
(SHF_V850_EPREL): Likewise.
(SHF_V850_R0REL): Likewise.
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* elf32-sh64-com.c: Likewise.
* elf32-sh64.c: Likewise.
* elf32-sh64.h: Likewise.
* elf64-sh64.c: Likewise.
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* ld-powerpc/tlsexe.r: .sbss is NOBITS, not PROGBITS.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.r: Likewise.
* ld-powerpc/tlstocso.r: Likewise.
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* gencode.c: Fix typo in comment.
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debugging symbols so that we handle page memory correctly.
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window and give focus to a next window.
(tui_initialize_readline): Bind it to c-x o.
(tui_rl_next_keymap): Activate TUI mode when entering SingleKey mode.
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* m68hc11-tdep.c (_initialize_m68hc11_tdep): Deprecate "regs" command.
(m68hc11_print_register): New function to print out one register.
(m68hc11_print_registers_info): New function to print registers.
(show_regs): Deprecate and use the above.
(m68hc11_gdbarch_init): Install the print_registers_info.
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(the_low_target): Add arm_reinsert_addr.
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* gdb.base/relocate.c (dummy): New padding array.
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* ia64-linux-nat.c (ia64_linux_stopped_by_watchpoint): Verify
that we have a SIGTRAP before returning non-zero.
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Only print a message about disassembling a section if it contains some data.
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(allocate_dynrelocs): Likewise.
(sh_elf_relocate_section): Likewise. Use SYMBOL_REFERENCES_LOCAL.
(sh_elf_finish_dynamic_symbol): Use SYMBOL_REFERENCES_LOCAL.
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* gencode.c: A few more fix-ups of refs and defs.
(frchg): Raise SIGILL if in double-precision mode.
(ldtlb): We don't simulate cache, so this is a no-op.
(movsxy_tab): Correct a few bit pattern errors.
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near the beginning of the file. Swap order of arguments. Call
_bfd_elf_dynamic_symbol_p with "ignore_protected" set to 0.
(elf_xtensa_fix_refcounts): Adjust xtensa_elf_dynamic_symbol_p call.
(elf_xtensa_relocate_section): Likewise.
(shrink_dynamic_reloc_sections): Likewise.
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(elf_xtensa_size_dynamic_sections): Use elf_discarded_section.
(elf_xtensa_combine_prop_entries): Avoid returning non-zero without
first printing an error message.
(elf_xtensa_finish_dynamic_sections): Likewise.
(elf_xtensa_discard_info_for_section): Adjust size of .got.loc when
discarding literal table entries.
(elf_xtensa_merge_private_bfd_data): Remove newline from error message.
(elf_xtensa_do_asm_simplify): Likewise.
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* gencode.c (prnd): Clear LSW of result to zeros.
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* pmuls.s: New file.
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* gencode.c (pmuls): Expression is mis-parenthesized.
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* configure.in: Add testsuite to extra_subdirs for sh.
* configure: Regenerate.
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* sim/sh: New directory. Tests for Renesas sh family.
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is accurate.
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* allinsn.exp, testutils.inc, add.s, fabs.s, fadd.s, fcmpeq.s,
fcmpgt.s, fcnvds.s, fcnvsd.s, fdiv.s, fldi0.s, fldi1.s, flds.s,
float.s, fmac.s, fmov.s, fmul.s, fneg.s, frchg.s, fschg.s,
fsqrt.s, fsub.s, ftrc.s, shll16.s, shll2.s, shll8.s, shll.s,
shlr16.s, shlr2.s, shlr8.s, shlr.s, swap.s: New files.
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* gencode.c (ppi_gensim): For a conditional ppi insn, if the
condition is false, we want to return (not break). A break
will take us to the end of the function where registers will
be updated, whereas the desired outcome is for nothing to change.
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* gencode.c (op tab): Some fix-ups of refs and defs.
(ocbi, ocbp): Cache not simulated, but may cause memory fault.
(gensym_caselist): Add default case to switch statement.
(expand_ppi_code): Add default case to switch statement.
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* gencode.c (op tab): Implement movca.l.
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(tui_suspend): Remember in which TUI mode we are.
(_initialize_tui_interp): Use the tui interpreter even when no
other interpreter was set and define in which TUI mode to start.
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* gencode.c (op movsxy_tab): Fix an error in the bit pattern.
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