Age | Commit message (Collapse) | Author | Files | Lines |
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section for orphans handled here.
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(is_aout_format): Update target list.
(is_pecoff_format): Remove unnecessary line continuation.
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(is_aout_format): Copy from ld testsuite.
(is_pecoff_format): Merge with ld version.
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gdb/ChangeLog:
* configure.tgt (sparc-*-*): Set gdb_sim to ../sim/erc32/libsim.a.
(sparc-*-rtems*): Delete, now redundant with the sparc-*-* case.
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This announces the support for debugging Ada programs using
the Ravenscar Profile, as well as documents the new commands
introduced as part of this effort.
gdb/ChangeLog:
* NEWS: Announce Ravenscar Profile support.
gdb/doc/ChangeLog:
* gdb.texinfo (Ravenscar Profile): New node.
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gdb/ChangeLog (Jerome Guitton, Joel Brobecker):
* ravenscar-thread.c, ravenscar-thread.h, ravenscar-sparc-thread.c:
New files.
* configure.tgt (sparc-*-*): Add ravenscar-thread.o and
ravenscar-sparc-thread.o to gdb_target_obs.
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This new function is needed by the ravenscar-thread layer.
gdb/ChangeLog:
* ada-tasks.c (iterate_over_live_ada_tasks): New function.
* ada-lang.h (iterate_over_live_ada_tasks): Declare.
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* target.h (Target::can_icf_inline_merge_sections): New virtual
function.
* x86_64.cc (Target__x86_64::can_icf_inline_merge_sections): New
virtual function.
* i386.cc (Target_i386::can_icf_inline_merge_sections): New
virtual function.
* icf.cc (get_section_contents): Inline merge sections only when
target allows it.
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(amd64_windows_init_abi): Register amd64_skip_main_prologue as gdbarch
skip_main_prologue method.
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/:
Sync from GCC:
PR bootstrap/44621
* configure.ac: Fix unportable shell quoting.
* configure: Regenerate.
config/:
* po.m4 (AM_PO_SUBDIRS): Fix unportable shell quoting.
bfd/:
* configure: Regenerate.
gas/:
* configure: Regenerate.
gold/:
* configure: Regenerate.
intl/:
* configure: Regenerate.
ld/:
* configure: Regenerate.
opcodes/:
* configure: Regenerate.
binutils/:
* configure: Regenerate.
gprof/:
* configure: Regenerate.
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(write_psymbols): Add 'psyms_seen' and 'is_static' arguments.
Only emit a given psymbol once.
(struct signatured_type_index_data) <psyms_seen>: New field.
(write_one_signatured_type): Update.
(cleanup_htab): New function.
(write_psymtabs_to_index): Update. Create psyms_seen hash. Bump
version to 3.
(save_gdb_index_command): Update index documentation.
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* config/tc-tic6x.c (tic6x_fix_adjustable): New function.
* config/tc-tic6x.h (tic6x_fix_adjustable): Declare.
(tc_fix_adjustable): New macro.
gas/testsuite/
* gas/tic6x/got-reloc.s: New test.
* gas/tic6x/got-reloc.d: New test.
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* s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
(main): Recognize the new CPU string.
* s390-opc.c: Add new instruction formats and masks.
* s390-opc.txt: Add new z196 instructions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* opcode/s390.h: Add S390_OPCODE_Z196 to enum s390_opcode_cpu_val.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/tc-s390.c: (md_parse_option): New option -march=z196.
* doc/c-s390.texi: Document new option.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/s390.exp: Run the zarch-z196 test.
* gas/s390/zarch-z196.d: Add new instructions.
* gas/s390/zarch-z196.s: Likewise.
* gas/s390/zarch-z9-109.d: Likewise.
* gas/s390/zarch-z9-109.s: Likewise.
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* s390-dis.c (print_insn_s390): Pick instruction with most
specific mask.
* s390-opc.c: Add unused bits to the insn mask.
* s390-opc.txt: Reorder some instructions to prefer more recent
versions.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gas/s390/esa-g5.d: Adjust serveral instructions.
* gas/s390/esa-reloc.d: Likewise.
* gas/s390/esa-z990.d: Likewise.
* gas/s390/zarch-reloc.d: Likewise.
* gas/s390/zarch-z10.d: Likewise.
* gas/s390/zarch-z9-ec.d: Likewise.
* gas/s390/zarch-z900.d: Likewise.
2010-09-27 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* ld-s390/tlsbin.dd: bcr 0,%r7 -> nopr %r7.
* ld-s390/tlsbin_64.dd: Likewise.
* ld-s390/tlspic.dd: Likewise.
* ld-s390/tlspic_64.dd: Likewise.
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* gas/config/tc-arm.c (do_neon_ldr_str): Deprecate ARM-mode PC-relative
VSTR, issue an error in THUMB mode.
* opcodes/arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
correction to unaligned PCs while printing comment.
* gas/testsuite/gas/arm/vldr.s: New test for pc-relative VLDR disassembly comment.
* gas/testsuite/gas/arm/vldr.d: Likewise.
* gas/testsuite/gas/arm/vstr-bad.s: New test for PC-relative VSTR.
* gas/testsuite/gas/arm/vstr-thumb-bad.l: Likewise.
* gas/testsuite/gas/arm/vstr-thumb-bad.d: Likewise.
* gas/testsuite/gas/arm/vstr-arm-bad.l: Likewise.
* gas/testsuite/gas/arm/vstr-arm-bad.d: Likewise.
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Fix lost siginfo_t for inferior calls.
* infrun.c
(struct inferior_thread_state) <siginfo_gdbarch, siginfo_data>: New.
(save_inferior_thread_state): New variables regcache, gdbarch and
siginfo_data. Initialize SIGINFO_DATA if gdbarch_get_siginfo_type_p.
Move INF_STATE allocation later, pre-clear it. Initialize REGISTERS
using REGCACHE.
(restore_inferior_thread_state): New variables regcache and gdbarch.
Restore SIGINFO_DATA for matching GDBARCH. Restore REGISTERS using
REGCACHE. Free also SIGINFO_DATA.
gdb/testsuite/
Fix lost siginfo_t for inferior calls.
* gdb.base/siginfo-infcall.exp: New file.
* gdb.base/siginfo-infcall.c: New file.
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MAYBE_SWAPs.
(dw2_map_symbol_names): Likewise.
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2010-09-24 Sami Wagiaalla <swagiaal@redhat.com>
* valops.c (find_oload_champ_namespace_loop): replace incorrect
discard_cleanups do_cleanups.
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gdb/
* amd64-linux-nat.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
gdb/gdbserver/
* linux-x86-low.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
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* amd64-linux-nat.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
gdb/gdbserver/
* linux-x86-low.c (compat_siginfo_from_siginfo)
(siginfo_from_compat_siginfo): Also copy si_pid and si_uid when
si_code is < 0. Check for si_code == SI_TIMER before checking for
si_code < 0.
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* elf32-arm.c, elf32-cris.c, elf32-hppa.c, elf32-i370.c, elf32-m32r.c,
elf32-m68k.c, elf32-microblaze.c, elf32-ppc.c, elf32-score.c,
elf32-score7.c, elf32-sh.c, elf32-vax.c, elf32-xtensa.c, elf64-alpha.c,
elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-sparc.c, elfcode.h,
elflink.c, elfxx-ia64.c, elfxx-mips.c: Use STN_UNDEF when referring to
the zero symbol index.
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* elflink.c (bfd_elf_reloc_symbol_deleted_p): Compare the symbol index
to STN_UNDEF, not SHN_UNDEF.
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2010-09-23 H.J. Lu <hongjiu.lu@intel.com>
PR ld/11812
* ld-i386/nogot1.s: Don't use GOTOFF.
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* load.c (rx_load): Call `reset_decoder'.
* rx.c (reset_decoder): New function.
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* elf32-tic6x.c (elf32_tic6x_fake_sections): New function.
(elf_backend_fake_sections): Define.
ld/testsuite/
* ld-tic6x/pcrel-reloc-local-r-rel-rela.d: New test.
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* gas/config/tc-arm.c (arm_ext_virt): New variable.
(arm_reg_type): Add REG_TYPE_RNB for banked registers.
(reg_entry): Allow registers to be larger than a byte.
(reg_alias): Fix type warning.
(parse_operands): Parse banked registers when appropriate.
(do_mrs): Add support for Virtualization Extensions.
(do_hvc): New function.
(do_t_mrs): Add support for Virtualization Extensions.
(do_t_msr): Likewise.
(do_t_hvc): New function.
(SPLRBANK): New define.
(reg_names): Add banked registers.
(insns): Add support for Virtualization Extensions.
(md_apply_fixup): Likewise.
(arm_cpus): -mcpu=cortex-a15 implies the Virtualization Extensions.
(arm_extensions): Add 'virt' extension.
(aeabi_set_public_attributes): Add support for Virtualization
Extensions.
* gas/doc/c-arm.texi: Document 'virt' extension.
* gas/testsuite/gas/arm/armv7-a+virt.d: New test.
* gas/testsuite/gas/arm/armv7-a+virt.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Virtualization Extensions.
* gas/testsuite/gas/arm/attr-march-armv7-a+sec+virt.d: New test.
* gas/testsuite/gas/arm/attr-march-armv7-a+virt.d: Likewise.
* include/opcode/arm.h (ARM_EXT_VIRT): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Rename...
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): ...to this and include Virtualization
Extensions.
* opcodes/arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
(thumb32_opcodes): Likewise.
(banked_regname): New function.
(print_insn_arm): Add Virtualization Extensions support.
(print_insn_thumb32): Likewise.
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(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
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(arm_ext_m): Add support for OS extension.
(arm_ext_os): New variable.
(do_t_swi): In v6-M ensure we have the OS extension.
(arm_cpus): The cortex-m1 and cortex-m0 options have the OS
extension by default.
(arm_archs): Add armv6s-m.
(arm_extensions): Add 'os' extension.
(cpu_arch_ver): Add support for v6S-M.
* gas/doc/c-arm.texi: Document the OS Extension, and v6-m and v6s-m
architecture options.
* gas/testsuite/gas/arm/archv6s-m-bad.d: New test.
* gas/testsuite/gas/arm/archv6s-m-bad.l: Likewise.
* gas/testsuite/gas/arm/archv6s-m.d: Likewise.
* gas/testsuite/gas/arm/archv6s-m.s: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6-m+os.d: Likewise.
* gas/testsuite/gas/arm/attr-march-armv6s-m.d: Likewise.
* include/opcode/arm.h (ARM_EXT_OS): New define.
(ARM_AEXT_V6SM): Likewise.
(ARM_ARCH_V6SM): Likewise.
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