aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)AuthorFilesLines
2017-02-27 sveRichard Sandiford20-2097/+7909
[AArch64] Additional SVE instructions This patch supports some additions to the SVE architecture prior to its public release. include/ * opcode/aarch64.h (AARCH64_OPND_SVE_ADDR_RI_S4x16) (AARCH64_OPND_SVE_IMM_ROT1, AARCH64_OPND_SVE_IMM_ROT2) (AARCH64_OPND_SVE_Zm3_INDEX, AARCH64_OPND_SVE_Zm3_22_INDEX) (AARCH64_OPND_SVE_Zm4_INDEX): New aarch64_opnds. opcodes/ * aarch64-tbl.h (OP_SVE_HMH, OP_SVE_VMU_HSD, OP_SVE_VMVU_HSD) (OP_SVE_VMVV_HSD, OP_SVE_VMVVU_HSD, OP_SVE_VM_HSD, OP_SVE_VUVV_HSD) (OP_SVE_VUV_HSD, OP_SVE_VU_HSD, OP_SVE_VVVU_H, OP_SVE_VVVU_S) (OP_SVE_VVVU_HSD, OP_SVE_VVV_D, OP_SVE_VVV_D_H, OP_SVE_VVV_H) (OP_SVE_VVV_HSD, OP_SVE_VVV_S, OP_SVE_VVV_S_B, OP_SVE_VVV_SD_BH) (OP_SVE_VV_BHSDQ, OP_SVE_VV_HSD, OP_SVE_VZVV_HSD, OP_SVE_VZV_HSD) (OP_SVE_V_HSD): New macros. (OP_SVE_VMU_SD, OP_SVE_VMVU_SD, OP_SVE_VM_SD, OP_SVE_VUVV_SD) (OP_SVE_VU_SD, OP_SVE_VVVU_SD, OP_SVE_VVV_SD, OP_SVE_VZVV_SD) (OP_SVE_VZV_SD, OP_SVE_V_SD): Delete. (aarch64_opcode_table): Add new SVE instructions. (aarch64_opcode_table): Use imm_rotate{1,2} instead of imm_rotate for rotation operands. Add new SVE operands. * aarch64-asm.h (ins_sve_addr_ri_s4): New inserter. (ins_sve_quad_index): Likewise. (ins_imm_rotate): Split into... (ins_imm_rotate1, ins_imm_rotate2): ...these two inserters. * aarch64-asm.c (aarch64_ins_imm_rotate): Split into... (aarch64_ins_imm_rotate1, aarch64_ins_imm_rotate2): ...these two functions. (aarch64_ins_sve_addr_ri_s4): New function. (aarch64_ins_sve_quad_index): Likewise. (do_misc_encoding): Handle "MOV Zn.Q, Qm". * aarch64-asm-2.c: Regenerate. * aarch64-dis.h (ext_sve_addr_ri_s4): New extractor. (ext_sve_quad_index): Likewise. (ext_imm_rotate): Split into... (ext_imm_rotate1, ext_imm_rotate2): ...these two extractors. * aarch64-dis.c (aarch64_ext_imm_rotate): Split into... (aarch64_ext_imm_rotate1, aarch64_ext_imm_rotate2): ...these two functions. (aarch64_ext_sve_addr_ri_s4): New function. (aarch64_ext_sve_quad_index): Likewise. (aarch64_ext_sve_index): Allow quad indices. (do_misc_decoding): Likewise. * aarch64-dis-2.c: Regenerate. * aarch64-opc.h (FLD_SVE_i3h, FLD_SVE_rot1, FLD_SVE_rot2): New aarch64_field_kinds. (OPD_F_OD_MASK): Widen by one bit. (OPD_F_NO_ZR): Bump accordingly. (get_operand_field_width): New function. * aarch64-opc.c (fields): Add new SVE fields. (operand_general_constraint_met_p): Handle new SVE operands. (aarch64_print_operand): Likewise. * aarch64-opc-2.c: Regenerate. gas/ * doc/c-aarch64.texi: Document that sve implies fp16, simd and compnum. * config/tc-aarch64.c (parse_vector_type_for_operand): Allow .q to be used with SVE registers. (parse_operands): Handle new SVE operands. (aarch64_features): Make "sve" require F16 rather than FP. Also require COMPNUM. * testsuite/gas/aarch64/sve.s: Add tests for new instructions. Include compnum tests. * testsuite/gas/aarch64/sve.d: Update accordingly. * testsuite/gas/aarch64/sve-invalid.s: Add tests for new instructions. * testsuite/gas/aarch64/sve-invalid.l: Update accordingly. Also update expected output for new FMOV and MOV alternatives.
2017-02-27 sveRichard Sandiford9-7/+87
[AArch64] Add a "compnum" feature This patch adds a named "compnum" feature for the ARMv8.3-A FCADD and FCMLA extensions. include/ * opcode/aarch64.h (AARCH64_FEATURE_COMPNUM): New macro. (AARCH64_ARCH_V8_3): Include AARCH64_FEATURE_COMPNUM. opcodes/ * aarch64-tbl.h (aarch64_feature_simd_v8_3): Replace with... (aarch64_feature_compnum): ...this. (SIMD_V8_3): Replace with... (COMPNUM): ...this. (CNUM_INSN): New macro. (aarch64_opcode_table): Use it for the complex number instructions. gas/ * doc/c-aarch64.texi: Add a "compnum" entry. * config/tc-aarch64.c (aarch64_features): Likewise, * testsuite/gas/aarch64/advsimd-compnum.s: New test. * testsuite/gas/aarch64/advsimd-compnum.d: Likewise.
2017-02-27 sveRichard Sandiford7-0/+106
[AArch64] Add SVE system registers This patch adds the SVE-specific system registers. opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add SVE registers. (aarch64_sys_reg_supported_p): Handle them. gas/ * testsuite/gas/aarch64/sve-sysreg.s, testsuite/gas/aarch64/sve-sysreg.d, testsuite/gas/aarch64/sve-sysreg-invalid.d, testsuite/gas/aarch64/sve-sysreg-invalid.l: New tests.
2017-02-27 sveRichard Sandiford2-2/+6
[AArch64] Fix +sve documentation The documentation entry for the SVE feature incorrectly said that it was enabled by default for ARMv8-A or later. This patch fixes that and also mentions that +sve implies +simd. (It also implies +fp, but that follows by transitivity.) gas/ * doc/c-aarch64.texi: Fix sve entry.
2017-02-27[AArch64] Add separate feature flag for weaker release consistent load insnsRichard Sandiford9-4/+54
The weaker release consistency support of ARMv8.3-A is allowed as an optional extension for ARMv8.2-A, so separate command line option and feature flag is added: -march=armv8.2-a+rcpc turns LDAPR, LDAPRB, LDAPRH instructions on. opcodes/ 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com> * aarch64-tbl.h (RCPC, RCPC_INSN): Define. (aarch64_opcode_table): Use RCPC_INSN. include/ 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com> * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define. (AARCH64_ARCH_V8_3): Update. gas/ 2017-01-04 Szabolcs Nagy <szabolcs.nagy@arm.com> * config/tc-aarch64.c (aarch64_features): Add rcpc. * doc/c-aarch64.texi (AArch64 Extensions): Document rcpc. * testsuite/gas/aarch64/ldst-exclusive-armv8_3.d: Rename to ... * testsuite/gas/aarch64/ldst-rcpc.d: This. * testsuite/gas/aarch64/ldst-exclusive-armv8_3.s: Rename to ... * testsuite/gas/aarch64/ldst-rcpc.s: This. * testsuite/gas/aarch64/ldst-rcpc-armv8_2.d: New test.
2017-02-27Automatic date update in version.inGDB Administrator1-1/+1
2017-02-26Automatic date update in version.inGDB Administrator1-1/+1
2017-02-25Automatic date update in version.inGDB Administrator1-1/+1
2017-02-24Automatic date update in version.inGDB Administrator1-1/+1
2017-02-23S/390: Issue error for overflowing relocs.Andreas Krebbel1-0/+12
Building PIE executable from non-PIC code results in broken binaries. With this patch the problem is detected at link-time. bfd/ChangeLog: 2017-01-07 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * elf64-s390.c (elf_s390_relocate_section): Issue error for non-PLT relocs of shared libary symbol in exectuable.
2017-02-23S/390: Add support for new cpu architecture - arch12.Andreas Krebbel11-92/+726
This adds support of new instructions to the S/390 specific parts. The important feature of the new instruction set is the support of single and extended precision floating point vector operations. Note: arch12 is NOT the official name of the new CPU. It just continues the series of archXX options supported as alternate names. The archXX terminology refers to the edition number of the Principle of Operations manual. The official CPU name will be added later while keeping support of the arch12 for backwards compatibility. No testsuite regressions. Committed to mainline. Bye, -Andreas- opcodes/ChangeLog: 2017-02-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-mkopc.c (main): Accept arch12 as cpu string and vx2 as facility. * s390-opc.c: Add new operand description macros, new instruction types, instruction masks, and new .insn instruction types. * s390-opc.txt: Add new arch12 instructions. include/ChangeLog: 2017-02-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * opcode/s390.h (enum s390_opcode_cpu_val): New value S390_OPCODE_ARCH12. (S390_INSTR_FLAG_VX2): New macro definition. gas/ChangeLog: 2017-02-23 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/tc-s390.c (s390_parse_cpu): New entry for arch12. * doc/as.texinfo: Document arch12 as cpu type. * doc/c-s390.texi: Likewise. * testsuite/gas/s390/s390.exp: Run arch12 specific tests. * testsuite/gas/s390/zarch-arch12.d: New test. * testsuite/gas/s390/zarch-arch12.s: New test. * testsuite/gas/s390/zarch-z13.d: Rename some mnemonics in the output patterns.
2017-02-23Correct VLE 16D and SDAREL relocationsAlan Modra5-75/+79
PR 20744 bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Correct dst_mask on all VLE 16D relocations. (ppc_elf_vle_split16): Correct field mask and shift for 16D relocs. (ppc_elf_relocate_section): Correct calculation for VLE SDAREL relocs. ld/ * testsuite/ld-powerpc/vle-reloc-2.s: Use r6 for last insn of each group. * testsuite/ld-powerpc/vle-reloc-2.d: Update for above change and sdarel reloc fix.
2017-02-23Automatic date update in version.inGDB Administrator1-1/+1
2017-02-22Automatic date update in version.inGDB Administrator1-1/+1
2017-02-22PowerPC ld segfault on script discarding dynamic sectionsAlan Modra5-14/+33
bfd/ * elf64-ppc.c (ppc64_elf_finish_dynamic_sections): Don't segfault on .got or .plt output section being discarded by script. * elf32-ppc.c (ppc_elf_finish_dynamic_sections): Likewise. Move vxworks splt temp. gold/ * powerpc.cc (Target_powerpc::make_iplt_section): Check that output_section exists before attempting add_output_section_data. (Target_powerpc::make_brlt_section): Likewise.
2017-02-21Automatic date update in version.inGDB Administrator1-1/+1
2017-02-20Alpha executables segfault when linked with -z,nowAlan Modra2-15/+37
PR 21181 * elflink.c (bfd_elf_final_link): Make DT_REL/DT_RELA zero if DT_RELSZ/DT_RELASZ is zero.
2017-02-20Automatic date update in version.inGDB Administrator1-1/+1
2017-02-19Automatic date update in version.inGDB Administrator1-1/+1
2017-02-18Automatic date update in version.inGDB Administrator1-1/+1
2017-02-17Automatic date update in version.inGDB Administrator1-1/+1
2017-02-17xfail two ld-unique tests for hppaAlan Modra2-0/+6
HPPA doesn't use OSABI of SYSV. * testsuite/ld-unique/unique.exp: xfail two tests for hppa.
2017-02-17ld testsuite function pointer comparisons vs. hppaAlan Modra4-5/+12
ld/testsuite/ld-elf/check-ptr-eq.c fails for hppa, since function pointers may point at plabels. It isn't valid to cast two function pointers to void* and then compare the void pointers. * testsuite/ld-elf/check-ptr-eq.c (check_ptr_eq): Change params from void pointers to function pointers. * testsuite/ld-elf/pr18718.c: Update to suit. * testsuite/ld-elf/pr18720a.c: Update to suit.
2017-02-17hppa -z relro againAlan Modra10-8/+46
I misunderstood the hppa alias problem. File offsets of segments need to be such that no page is mapped twice with different permissions. (Which still seems to me like something the kernel could fix, but anyhow, this is not so difficult to achieve in ld.) PR 21000 bfd/ * elf-bfd.h (struct elf_backend_data): Add no_page_alias. * elfxx-target.h (elf_backend_no_page_alias): Define. (elfNN_bed): Init new field. * elf.c (assign_file_positions_for_load_sections): If no_page_alias ensure PT_LOAD segment starts on a new page. * elf32-hppa.c (elf_backend_no_page_alias): Define. ld/ * testsuite/ld-elf/loadaddr1.d: Adjust for hppa file offsets. * testsuite/ld-elf/loadaddr2.d: Likewise. * testsuite/ld-elf/loadaddr3a.d: Likewise. * testsuite/ld-scripts/rgn-at5.d: Likewise.
2017-02-17PR21132, hppa-linux pie support doesn't workAlan Modra2-0/+8
This fixes a long-standing hppa bug seen when generating PIEs, and I think possible to trigger with forced local symbols in shared libraries. Not allocating enough space for PLT relocs results in ld writing outside of the buffer. PR 21132 * elf32-hppa.c (allocate_plt_static): Allocate space for relocs if pic.
2017-02-17Fix more powerpc testsuite source errorsAlan Modra3-2/+7
* testsuite/ld-powerpc/vxworks1-lib.s: Correct addi to addic. * testsuite/ld-powerpc/vxworks1-lib.dd: Adjust to suit.
2017-02-16Automatic date update in version.inGDB Administrator1-1/+1
2017-02-15i386: Allow "lea foo@GOT, %reg" in PICH.J. Lu6-4/+86
"lea foo@GOT, %reg" is OK in PIC since it only loads the GOT offset into register, which can be used later with a GOT base register to get the value in the GOT entry. (cherry picked from commit 2a5684011edabf5804abb9e11253a9747587b284) bfd/ PR ld/21168 * elf32-i386.c (elf_i386_relocate_section): Allow "lea foo@GOT, %reg" in PIC. ld/ PR ld/21168 * testsuite/ld-i386/i386.exp: Run pr21168. * testsuite/ld-i386/pr21168a.c: New file. * testsuite/ld-i386/pr21168b.S: Likewise.
2017-02-15Automatic date update in version.inusers/ARM/embedded-binutils-2_28-branch-2017q1GDB Administrator1-1/+1
2017-02-14Fix powerpc testsuite source errorsAlan Modra4-22/+28
PR 21118 work exposed these errors in the testsuite. * testsuite/gas/ppc/cell.s: Correct invalid registers. * testsuite/gas/ppc/vle-simple-1.s: Likewise. * testsuite/gas/ppc/vle-simple-2.s: Likewise.
2017-02-14Update ppc64_elf_gc_mark_dynamic_refAlan Modra2-1/+8
* elf64-ppc.c (ppc64_elf_gc_mark_dynamic_ref): Support --gc-keep-exported, and test versioned field of sym rather than looking for @ in name.
2017-02-14Automatic date update in version.inGDB Administrator1-1/+1
2017-02-13Don't use "_gp" on RISC-V, use "_global_pointer$" insteadPalmer Dabbelt4-2/+12
"_gp" could conflict with ABI-complient code. While it's probably OK because MIPS uses this name, we figured it'd be good to clean this up before a release with RISC-V in it. ld/ChangeLog: 2017-02-13 Palmer Dabbelt <palmer@dabbelt.com> * emulparams/elf32lriscv-defs.sh (SDATA_START_SYMBOLS): Change _gp to __global_pointer$. bfd/ChangeLog: 2017-02-13 Palmer Dabbelt <palmer@dabbelt.com> * elfnn-riscv.c (riscv_global_pointer_value): Change _gp to __global_pointer$.
2017-02-13MIPS/BFD: Respect the ELF gABI dynamic symbol table sort requirementMaciej W. Rozycki2-3/+22
Ensure all local symbols precede external symbols in the dynamic symbol table. No local symbols are expected to make it to the dynamic symbol table except for section symbols already taken care of, so this is really a safeguard only against a potential BFD bug otherwise not so harmful, which may become a grave one due to a symbol table sorting requirement violation (see PR ld/20828 for an example). This means however that no test suite coverage is possible for this change as code introduced here is not normally expected to trigger. Logically split then the part of the dynamic symbol table which is not global offset table mapped, into a local area at the beginning and an external area following. By the time `mips_elf_sort_hash_table' is called we have the number of local dynamic symbol table entries (section and non-section) already counted in `local_dynsymcount', so use it to offset the external area from the beginning. bfd/ * elfxx-mips.c (mips_elf_hash_sort_data): Add `max_local_dynindx'. (mips_elf_sort_hash_table): Handle it. (mips_elf_sort_hash_table_f) <GGA_NONE>: For forced local symbols bump up `max_local_dynindx' rather than `max_non_got_dynindx'. (cherry picked from commit e17b0c351f0b22fb42edf34e5a6e486d72e9ee05)
2017-02-13MIPS/BFD: Use `bfd_size_type' for dynamic symbol table indicesMaciej W. Rozycki2-5/+11
Use the `bfd_size_type' data type for dynamic symbol table indices in the MIPS backend, in line with generic code and removing the need to use a cast. bfd/ * elfxx-mips.c (mips_elf_hash_sort_data): Convert the `min_got_dynindx', `max_unref_got_dynindx' and `max_non_got_dynindx' members to the `bfd_size_type' data type. (mips_elf_sort_hash_table): Adjust accordingly. (cherry picked from commit 55f8b9d243dbd879ffa585f7e0c7d8b6b819302d)
2017-02-13MIPS/BFD: Streamline hash table references in `mips_elf_sort_hash_table'Maciej W. Rozycki2-9/+10
Make all hash table references throughout `mips_elf_sort_hash_table' use `htab', simplifying code and improving readability. bfd/ * elfxx-mips.c (mips_elf_sort_hash_table): Use `htab' throughout to access the hash table. (cherry picked from commit 0f8c4b60ef3953a2373992e468106ae833049fff)
2017-02-13MIPS/BFD: Fix assertion in `mips_elf_sort_hash_table'Maciej W. Rozycki2-3/+8
Move the assertion on non-NULL `htab' in `mips_elf_sort_hash_table' to the beginning, before the pointer is dereferenced (`mips_elf_hash_table (info)' and `elf_hash_table (info)' both point to the same memory location, differently typed). bfd/ * elfxx-mips.c (mips_elf_sort_hash_table): Move assertion on non-NULL `htab' to the beginning. (cherry picked from commit 17a80fa80adbe79df39ba1fc70e611dff92df197)
2017-02-13Automatic date update in version.inGDB Administrator1-1/+1
2017-02-12Automatic date update in version.inGDB Administrator1-1/+1
2017-02-11Fix use after free in cgen instruction lookupAlan Modra2-15/+20
* cgen-opc.c (cgen_lookup_insn): Delete buf and base_insn temps. Use insn_bytes_value and insn_int_value directly instead. Don't free allocated memory until function exit.
2017-02-11POWER9 add scv/rfscv instruction supportNicholas Piggin5-1/+17
opcodes/ * ppc-opc.c (powerpc_opcodes) <scv, rfscv>: New mnemonics. gas/ * testsuite/gas/ppc/power9.d <scv, rfscv>: New tests.
2017-02-11Automatic date update in version.inGDB Administrator1-1/+1
2017-02-10Automatic date update in version.inGDB Administrator1-1/+1
2017-02-09Automatic date update in version.inGDB Administrator1-1/+1
2017-02-08Automatic date update in version.inGDB Administrator1-1/+1
2017-02-07Automatic date update in version.inGDB Administrator1-1/+1
2017-02-06Automatic date update in version.inGDB Administrator1-1/+1
2017-02-05Automatic date update in version.inGDB Administrator1-1/+1
2017-02-04Automatic date update in version.inGDB Administrator1-1/+1
2017-02-03[GOLD] PowerPC64 TOC indirect to TOC relative segfaultAlan Modra2-0/+11
* powerpc.cc (Powerpc_relobj::make_toc_relative): Don't crash when no .toc section exists.
generated by cgit v1.1 at 2024-11-25 23:39:22 +0000