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2017-05-18gdb.base/fileio.c: Fix several -Wmaybe-uninitialized warningsPedro Alves2-5/+10
src/gdb/testsuite/gdb.base/fileio.c: In function ‘test_write’: src/gdb/testsuite/gdb.base/fileio.c:158:5: warning: ‘ret’ may be used uninitialized in this function [-Wmaybe-uninitialized] printf ("write 1: ret = %d, errno = %d\n", ret, errno); ^ gdb/ChangeLog: 2017-05-18 Pedro Alves <palves@redhat.com> * gdb.base/fileio.c (test_write, test_read, test_close) (test_fstat): Don't print 'ret' in the fail path.
2017-05-18gdb.base/fileio.c: Fix several -Wreturn-type warningsPedro Alves3-26/+34
All the "test_" functions warn like: src/gdb/testsuite/gdb.base/fileio.c: In function ‘test_close’: src/gdb/testsuite/gdb.base/fileio.c:280:1: warning: control reaches end of non-void function [-Wreturn-type] } ^ Nothing looks at the return of these functions, so just make them return void. While at it, "()" is not the same as "(void)" in C - fix that too. gdb/ChangeLog: 2017-05-18 Pedro Alves <palves@redhat.com> * gdb.base/fileio.c (stop, test_open, test_write, test_read) (test_lseek, test_close, test_stat, test_fstat, test_isatty) (test_system, test_rename, test_unlink, test_time): Change prototypes. * gdb.base/fileio.exp (stop_msg): Adjust.
2017-05-18gdb.base/fileio.exp: Remove nowarningsPedro Alves3-2/+12
... and quiet -Wnonnull in a different way. gdb/testsuite/ChangeLog: 2017-05-18 Pedro Alves <palves@redhat.com> * gdb.base/fileio.c (null_str): New global. (test_stat): Use it. * gdb.base/fileio.exp: Remove nowarnings.
2017-05-18fix changelog typoAlan Modra1-1/+2
2017-05-18Don't compare boolean values against TRUE or FALSEAlan Modra34-96/+139
bfd/ * arc-got.h: Don't compare boolean values against TRUE or FALSE. * elf-m10300.c: Likewise. * elf.c: Likewise. * elf32-arc.c: Likewise. * elf32-bfin.c: Likewise. * elf32-m68k.c: Likewise. * elf32-nds32.c: Likewise. * elf32-tilepro.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-tilegx.c: Likewise. * mach-o.c: Likewise. * peXXigen.c: Likewise. * vms-alpha.c: Likewise. * vms-lib.c: Likewise. opcodes/ * aarch64-asm.c: Don't compare boolean values against TRUE or FALSE. * aarch64-dis.c: Likewise. * aarch64-gen.c: Likewise. * aarch64-opc.c: Likewise. binutils/ * strings.c: Don't compare boolean values against TRUE or FALSE. gas/ * config/tc-aarch64.c: Don't compare booleans against TRUE or FALSE. * config/tc-hppa.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-score7.c: Likewise. ld/ * emultempl/elf32.em: Don't compare boolean values against TRUE or FALSE. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/xtensaelf.em: Likewise.
2017-05-18pr20882 testcaseAlan Modra5-13/+12
-gdwarf-sections doesn't work on targets that lack support to emit address size relative relocs. The testcase as it was avoided -gdwarf-sections doing anything by providing a non-empty .debug_line. It's better to not use -gdwarf-sections. Also, the testcase failed to match the output for 16-bit address targets like avr. PR ld/20882 * testsuite/ld-gc/pr20882.d: Don't pass -gdwarf-sections to gas. Allow for 16-bit address targets and match expected data fully. * testsuite/ld-gc/pr20882a.s: Delete .debug_line section. * testsuite/ld-gc/pr20882b.s: Likewise. * testsuite/ld-gc/pr20882c.s: Likewise.
2017-05-18Automatic date update in version.inGDB Administrator1-1/+1
2017-05-17Mark debug sections referenced by kept debug sectionsH.J. Lu8-28/+108
If a debug section is referenced by a kept debug section, it should also be kept. Some targets, like mips, keep input files when there are some special sections, like .gnu.attributes, even if input file is unused otherwise. In this case, all debug sections are kept. The new test will fail on such targets. We can either fix those targets or XFAIL the test. bfd/ PR ld/20882 * elflink.c (elf_gc_mark_debug_section): New function. (_bfd_elf_gc_mark_extra_sections): Mark any debug sections referenced by kept debug sections. ld/ PR ld/20882 * testsuite/ld-gc/gc.exp: Run pr20882. * testsuite/ld-gc/pr20882.d: New file. * testsuite/ld-gc/pr20882a.s: Likewise. * testsuite/ld-gc/pr20882b.s: Likewise. * testsuite/ld-gc/pr20882c.s: Likewise.
2017-05-17Add nowarnings in gdb.base/fileio.expYao Qi2-1/+5
I see the following warning in gdb.base/fileio.c, testsuite/gdb.base/fileio.c:297:3: warning: null argument where non-null required (argument 1) [-Wnonnull] ret = stat (NULL, &st); ^ This patch adds "nowarnings" to the list passed to gdb_compile. gdb/testsuite: 2017-05-17 Yao Qi <yao.qi@linaro.org> * gdb.base/fileio.exp: Pass nowarnings to gdb_compile.
2017-05-17Add alias command to cmd_list_elementYao Qi6-15/+48
When we add alias command, we call add_alias_cmd and pass the alias name and command name. This implicitly requires the command and its prefix commands are already added to cmdlist. This may not be true, for example, add_com_alias ("tty", "set inferior-tty", class_alias, 0); "inferior-tty" command is added to setlist, but setlist may not be added to cmdlist (It depends on the order of related _initialize_XXX functions called) so that we can't find "set inferior-tty" from cmdlist. This patch fixes this problem by passing cmd_list_element of "inferior-tty" to add_alias_cmd, so that cmd_list_element of "inferior-tty" doesn't have to be reachable from cmdlist at that moment. gdb: 2017-05-17 Yao Qi <yao.qi@linaro.org> * cli/cli-decode.c (add_alias_cmd): New function. * command.h (add_alias_cmd): Declare. * infcmd.c (_initialize_infcmd): Don't call add_com_alias, instead call add_alias_cmd. gdb/testsuite: 2017-05-17 Simon Marchi <simon.marchi@ericsson.com> * gdb.base/set-inferior-tty.exp (test_set_inferior_tty): Add argument command. (top-level): Invoke test_set_inferior_tty.
2017-05-17nat_extra_makefile_frag -> nat_makefile_fragPedro Alves5-10/+19
gdb/ChangeLog: 2017-05-17 Pedro Alves <palves@redhat.com> * Makefile.in (nat_extra_makefile_frag): Rename to ... (nat_makefile_frag): ... this. All references updated. * configure.ac: Likewise. * configure.nat: Likewise. Enhance comments. * configure: Regenerate.
2017-05-17S/390: Fix arch level of pckmo instruction.Andreas Krebbel5-3/+3
Fix wrong architecture level of PCKMO instruction. Committed to mainline. opcodes/ChangeLog: 2017-05-17 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * s390-opc.txt: PCKMO change arch level to z196. gas/ChangeLog: 2017-05-17 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * testsuite/gas/s390/zarch-z10.d: Remove pckmo. * testsuite/gas/s390/zarch-z10.s: Remove pckmo. * testsuite/gas/s390/zarch-z196.d: Add pckmo. * testsuite/gas/s390/zarch-z196.s: Add pckmo.
2017-05-17Automatic date update in version.inGDB Administrator1-1/+1
2017-05-16Fix commit 0a7d38897b9fb1ec7a064ca3347cbac3ba49e5acH.J. Lu1-18/+22
2017-05-16Run PR ld/21481 tests only if IFUNC is supportedH.J. Lu2-18/+24
PR ld/21481 * testsuite/ld-x86-64/x86-64.exp: Run PR ld/21481 tests only if IFUNC is supported by run-time.
2017-05-16Allow target files access to default TC_FORCE_RELOCATION definesAlan Modra23-63/+103
* write.c (GENERIC_FORCE_RELOCATION_LOCAL): Define. (TC_FORCE_RELOCATION_LOCAL): Use it. (GENERIC_FORCE_RELOCATION_SUB_SAME): Define. (TC_FORCE_RELOCATION_SUB_SAME): Use it. * config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL, TC_FORCE_RELOCATION_SUB_SAME): Use GENERIC defines. * config/tc-aarch64.h: Similarly. * config/tc-avr.h: Similarly. * config/tc-cris.h: Similarly. * config/tc-i386.h: Similarly. * config/tc-i960.h: Similarly. * config/tc-ia64.h: Similarly. * config/tc-microblaze.h: Similarly. * config/tc-mips.h: Similarly. * config/tc-msp430.h: Similarly. * config/tc-nds32.h: Similarly. * config/tc-pru.h: Similarly. * config/tc-riscv.h: Similarly. * config/tc-rl78.h: Similarly. * config/tc-s390.h: Similarly. * config/tc-sh.h: Similarly. * config/tc-sh64.h: Similarly. * config/tc-sparc.h: Similarly. * config/tc-xtensa.h: Similarly. * config/tc-mn10300.h: Similarly. (GENERIC_FORCE_RELOCATION_LOCAL): Define. * config/tc-msp430.c (msp430_force_relocation_local): Modify to be addition to rather than replacement of standard TC_FORCE_RELOCATION_LOCAL.
2017-05-16Rename non_ir_ref to non_ir_ref_regularAlan Modra59-62/+128
Since the flag is now set only for regular object refs. include/ * bfdlink.h (struct bfd_link_hash_entry <non_ir_ref>): Rename to non_ir_ref_regular. bfd/ * elf-m10300.c: Rename occurrences of non_ir_ref. * elf32-arm.c: Likewise. * elf32-bfin.c: Likewise. * elf32-cr16.c: Likewise. * elf32-cris.c: Likewise. * elf32-d10v.c: Likewise. * elf32-dlx.c: Likewise. * elf32-fr30.c: Likewise. * elf32-frv.c: Likewise. * elf32-hppa.c: Likewise. * elf32-i370.c: Likewise. * elf32-i386.c: Likewise. * elf32-iq2000.c: Likewise. * elf32-lm32.c: Likewise. * elf32-m32c.c: Likewise. * elf32-m32r.c: Likewise. * elf32-m68hc1x.c: Likewise. * elf32-m68k.c: Likewise. * elf32-mcore.c: Likewise. * elf32-metag.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-moxie.c: Likewise. * elf32-msp430.c: Likewise. * elf32-mt.c: Likewise. * elf32-nios2.c: Likewise. * elf32-or1k.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-s390.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf32-tilepro.c: Likewise. * elf32-v850.c: Likewise. * elf32-vax.c: Likewise. * elf32-xstormy16.c: Likewise. * elf32-xtensa.c: Likewise. * elf64-alpha.c: Likewise. * elf64-hppa.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-mmix.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-sh64.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * elfnn-riscv.c: Likewise. * elfxx-mips.c: Likewise. * elfxx-sparc.c: Likewise. * elfxx-tilegx.c: Likewise. * linker.c: Likewise. ld/ * plugin.c: Rename occurrences of non_ir_ref.
2017-05-16non_ir_ref_dynamicAlan Modra8-41/+69
dynamic_ref_after_ir_def is a little odd compared to other symbol flags in that as the name suggests, it is set only for certain references after a definition. It turns out that setting a flag for any non-ir reference from a dynamic object can be used to solve the problem for which this flag was invented, which I think is a cleaner. This patch does that, and sets non_ir_ref only for regular object references. include/ * bfdlink.h (struct bfd_link_hash_entry): Update non_ir_ref comment. Rename dynamic_ref_after_ir_def to non_ir_ref_dynamic. ld/ * plugin.c (is_visible_from_outside): Use non_ir_ref_dynamic. (plugin_notice): Set non_ir_ref for references from regular objects, non_ir_ref_dynamic for references from dynamic objects. bfd/ * elf64-ppc.c (add_symbol_adjust): Transfer non_ir_ref_dynamic. * elflink.c (elf_link_add_object_symbols): Update to use non_ir_ref_dynamic. (elf_link_input_bfd): Test non_ir_ref_dynamic in addition to non_ir_ref. * linker.c (_bfd_generic_link_add_one_symbol): Likewise.
2017-05-16Automatic date update in version.inGDB Administrator1-1/+1
2017-05-152017-05-15 Eric Christopher <echristo@gmail.com>Eric Christopher2-0/+11
* layout.cc (Layout::segment_precedes): Add a case for testing pointer equality when determining which segment precedes another.
2017-05-152017-05-15 Jeff Law <law@redhat.com>Jeff Law2-3/+8
* readelf.c (display_arc_attribute): Avoid implicit fallthru.
2017-05-15Fix use of ARM ADR and ADRl pseudo-instructions with thumb function symbols.Nick Clifton4-1/+95
PR gas/21458 * config/tc-arm.c (do_adr): If the ADR involves a thumb function symbol, ensure that the T bit will be set. (do_adrl): Likewise. (do_t_adr): Likewise. * testsuite/gas/arm/pr21458.s: New test. * testsuite/gas/arm/pr21458.d: New test driver.
2017-05-15MIPS16e2: Add new MIPS16e2 relaxation GAS and LD testsMaciej W. Rozycki96-114/+1500
Verify MIPS16 PC-relative instruction relaxation using the MIPS16e2 LUI instruction rather than an LI/SLL instruction pair. gas/ * testsuite/gas/mips/mips16-pcrel-1.d: Remove `-mips3' from `as' flags. * testsuite/gas/mips/mips16-pcrel-pic-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-0.d: Likewise. * testsuite/gas/mips/mips16-pcrel-n64-sym32-1.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-reloc-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-5.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-pic-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-sym32-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-8.d: Likewise. * testsuite/gas/mips/mips16-pcrel-addend-n64-9.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-2.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-3.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-7.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n32-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-6.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-4.d: Likewise. * testsuite/gas/mips/mips16-pcrel-absolute-pic-n64-sym32-6.d: Likewise. * testsuite/gas/mips/mips16e2@mips16-pcrel-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-n64-sym32-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-0.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-delay-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-reloc-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-8.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-addend-n64-sym32-9.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-1.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-2.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-3.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-5.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-7.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n32-6.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-4.d: New test. * testsuite/gas/mips/mips16e2@mips16-pcrel-absolute-pic-n64-sym32-6.d: New test. * testsuite/gas/mips/mips16-pcrel-1.l: Adjust line numbers. * testsuite/gas/mips/mips16-pcrel-1.s: Adjust for alignment preservation between MIPS16 and MIPS16e2 code. * testsuite/gas/mips/mips.exp: Run MIPS16 relaxation tests over all MIPS16 architectures. ld/ * testsuite/ld-mips-elf/mips16e2-pcrel-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-2.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-addend-6.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n32-1.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-0.d: New test. * testsuite/ld-mips-elf/mips16e2-pcrel-n64-sym32-1.d: New test. * testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2017-05-15MIPS16e2: Add new MIPS16e2 ASE binutils and GAS testsMaciej W. Rozycki37-8/+3982
Verify MIPS16e2 ASE instruction assembly, disassembly and object file flags. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3' to `as' flags. * testsuite/binutils-all/mips/mips16e2-undecoded.d: New test. * testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: Remove `.module mips3'. * testsuite/binutils-all/mips/mips.exp: Run the new tests. gas/ * testsuite/gas/mips/mips16e2.d: New test. * testsuite/gas/mips/mips16e2-mt.d: New test. * testsuite/gas/mips/mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test. * testsuite/gas/mips/mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test. * testsuite/gas/mips/mips16e2-hilo.d: New test. * testsuite/gas/mips/mips16e2-hilo-n32.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.d: New test. * testsuite/gas/mips/mips16e2-imm-error.d: New test. * testsuite/gas/mips/elf_ase_mips16e2.d: New test. * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test. * testsuite/gas/mips/elf-rel9-mips16e2.d: New test. * testsuite/gas/mips/mips16e2-lui.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test. * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test. * testsuite/gas/mips/mips16e2@lui-2.d: New test. * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output. * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output. * testsuite/gas/mips/mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-mt.s: New test source. * testsuite/gas/mips/mips16e2-sub.s: New test source. * testsuite/gas/mips/mips16e2-mt-sub.s: New test source. * testsuite/gas/mips/mips16e2-hilo.s: New test source. * testsuite/gas/mips/mips16e2-reloc-error.s: New test source. * testsuite/gas/mips/mips16e2-imm-error.s: New test source. * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source. * testsuite/gas/mips/mips16e2-lui.s: New test source. * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync', `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2 architectures. Run the new tests.
2017-05-15MIPS16e2: Add MIPS16e2 ASE GAS test infrastructureMaciej W. Rozycki24-5/+410
Define a new 32-bit and 64-bit MIPS16e2 test architecture and adjust existing tests now run against these architectures accordingly. gas/ * testsuite/gas/mips/mips.exp (run_dump_test_arch): Add `mips16e2@' prefix. (run_list_test_arch): Likewise. (mips16e2-32, mips16e2-64): New architectures. * testsuite/gas/mips/mips16e2-32@mips16-macro.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64.d: New test. * testsuite/gas/mips/mips16e2-32@mips16-sub.d: New test. * testsuite/gas/mips/mips16e2-32@mips16e-64-sub.d: New test. * testsuite/gas/mips/mips16e2@relax-swap3.d: New test. * testsuite/gas/mips/mips16-32@mips16-asmacro.d: Remove `source' tag. Add `-I$srcdir/$subdir' to `as' flags. * testsuite/gas/mips/mips16-64@mips16-asmacro.d: Likewise. * testsuite/gas/mips/mips16e2-32@mips16-macro.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-macro-e.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-t.l: New stderr output. * testsuite/gas/mips/mips16e2-32@mips16-insn-e.l: New stderr output. * testsuite/gas/mips/mips16-sub.s: Add `.set nomips16e2'. * testsuite/gas/mips/mips16e-sub.s: Likewise. * testsuite/gas/mips/mips16e-64-sub.s: Likewise. * testsuite/gas/mips/mips16-asmacro.s: Remove `.set mips32'. * testsuite/gas/mips/mips16-32@mips16-asmacro.s: New test source. * testsuite/gas/mips/mips16-64@mips16-asmacro.s: New test source.
2017-05-15MIPS16e2: Add MIPS16e2 ASE supportMaciej W. Rozycki15-66/+446
Add MIPS16e2 ASE support as per the architecture specification[1], including in particular: 1. A new ELF ASE flag to mark MIPS16e2 binaries. 2. MIPS16e2 instruction assembly support, including a relaxation update to use LUI rather than an LI/SLL instruction pair for loading the high part of 32-bit addresses. 3. MIPS16e2 instruction disassembly support, including updated rules for extended forms of instructions that are now subdecoded and therefore do not alias to the original MIPS16 ISA revision instructions even for encodings that are not valid in the MIPS16e2 instruction set. Add `-mmips16e2' and `-mno-mips16e2' GAS command-line options and their corresponding `mips16e2' and `no-mips16e2' settings for the `.set' and `.module' pseudo-ops. Control the availability of the MT ASE subset of the MIPS16e2 instruction set with a combination of these controls and the preexisting MT ASE controls. Parts of this change by Matthew Fortune and Andrew Bennett. References: [1] "MIPS32 Architecture for Programmers: MIPS16e2 Application-Specific Extension Technical Reference Manual", Imagination Technologies Ltd., Document Number: MD01172, Revision 01.00, April 26, 2016 include/ * elf/mips.h (AFL_ASE_MIPS16E2): New macro. (AFL_ASE_MASK): Adjust accordingly. * opcode/mips.h: Document new operand codes defined. (mips_operand_type): Add OP_REG28 enum value. (INSN2_SHORT_ONLY): Update description. (ASE_MIPS16E2, ASE_MIPS16E2_MT): New macros. bfd/ * elfxx-mips.c (print_mips_ases): Handle MIPS16e2 ASE. opcodes/ * mips-dis.c (mips_arch_choices): Add ASE_MIPS16E2 and ASE_MIPS16E2_MT flags to the unnamed MIPS16 entry. (mips_convert_abiflags_ases): Handle the AFL_ASE_MIPS16E2 flag. (print_insn_arg) <OP_REG28>: Add handler. (validate_insn_args) <OP_REG28>: Handle. (print_mips16_insn_arg): Handle MIPS16 instructions that require 32-bit encoding and 9-bit immediates. (print_insn_mips16): Handle MIPS16 instructions that require 32-bit encoding and MFC0/MTC0 operand decoding. * mips16-opc.c (decode_mips16_operand) <'>', '9', 'G', 'N', 'O'> <'Q', 'T', 'b', 'c', 'd', 'r', 'u'>: Add handlers. (RD_C0, WR_C0, E2, E2MT): New macros. (mips16_opcodes): Add entries for MIPS16e2 instructions: GP-relative "addiu" and its "addu" spelling, "andi", "cache", "di", "ehb", "ei", "ext", "ins", GP-relative "lb", "lbu", "lh", "lhu", and "lw" instructions, "ll", "lui", "lwl", "lwr", "mfc0", "movn", "movtn", "movtz", "movz", "mtc0", "ori", "pause", "pref", "rdhwr", "sc", GP-relative "sb", "sh" and "sw" instructions, "swl", "swr", "sync" and its "sync_acquire", "sync_mb", "sync_release", "sync_rmb" and "sync_wmb" aliases, "xori", "dmt", "dvpe", "emt" and "evpe". Add split regular/extended entries for original MIPS16 ISA revision instructions whose extended forms are subdecoded in the MIPS16e2 ISA revision: "li", "sll" and "srl". binutils/ * readelf.c (print_mips_ases): Handle MIPS16e2 ASE. * NEWS: Mention MIPS16e2 ASE support. gas/ * config/tc-mips.c (RELAX_MIPS16_ENCODE): Add `e2' flag. (RELAX_MIPS16_E2): New macro. (RELAX_MIPS16_PIC, RELAX_MIPS16_SYM32, RELAX_MIPS16_NOMACRO) (RELAX_MIPS16_USER_SMALL, RELAX_MIPS16_USER_EXT) (RELAX_MIPS16_DSLOT, RELAX_MIPS16_JAL_DSLOT) (RELAX_MIPS16_EXTENDED, RELAX_MIPS16_MARK_EXTENDED) (RELAX_MIPS16_CLEAR_EXTENDED, RELAX_MIPS16_ALWAYS_EXTENDED) (RELAX_MIPS16_MARK_ALWAYS_EXTENDED) (RELAX_MIPS16_CLEAR_ALWAYS_EXTENDED, RELAX_MIPS16_MACRO) (RELAX_MIPS16_MARK_MACRO, RELAX_MIPS16_CLEAR_MACRO): Shift bits. (mips16_immed_extend): New prototype. (options): Add OPTION_MIPS16E2 and OPTION_NO_MIPS16E2 enum values. (md_longopts): Add "mmips16e2" and "mno-mips16e2" options. (mips_ases): Add "mips16e2" entry. (mips_set_ase): Handle MIPS16e2 ASE. (insn_insert_operand): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (is_opcode_valid_16): Pass enabled ASE bitmask on to `opcode_is_member'. (validate_mips_insn): Explicitly handle immediates with MIPS16 instructions that require 32-bit encoding. (operand_reg_mask) <OP_REG28>: Add handler. (match_reg28_operand): New function. (match_operand) <OP_REG28>: Add handler. (append_insn): Pass ASE_MIPS16E2 setting to RELAX_MIPS16_ENCODE. (match_mips16_insn): Handle MIPS16 instructions that require 32-bit encoding and `V' and `u' operand codes. (mips16_ip): Allow any characters except from `.' in opcodes. (mips16_immed_extend): Handle 9-bit immediates. Do not shuffle immediates whose width is not one of these listed. (md_estimate_size_before_relax): Handle MIPS16e2 relaxation. (mips_relax_frag): Likewise. (md_convert_frag): Likewise. (mips_convert_ase_flags): Handle MIPS16e2 ASE. * doc/as.texinfo (Target MIPS options): Add `-mmips16e2' and `-mno-mips16e2' options. (-mmips16e2, -mno-mips16e2): New options. * doc/c-mips.texi (MIPS Options): Add `-mmips16e2' and `-mno-mips16e2' options. (MIPS ASE Instruction Generation Overrides): Add `.set mips16e2' and `.set nomips16e2'.
2017-05-15MIPS16/GAS: Improve [32768,65535] out-of-range operand error diagnosticsMaciej W. Rozycki2-1/+10
Improve out-of-range operand error diagnostics for invalid values in the [32768,65535] range used for a signed 16-bit immediate, making the message consistent with that used for other invalid values, e.g.: foo.s:1: Error: operand 2 must be an immediate expression `addiu $2,$gp,32768' foo.s:2: Error: invalid operands `lw $2,32768($gp)' vs: foo.s:3: Error: operand 3 out of range `addiu $2,$gp,-32769' foo.s:4: Error: operand 2 out of range `lw $2,-32769($gp)' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for signed 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting signed 16-bit immediates will be added, so make the case work well right from the start: foo.s:1: Error: operand 3 out of range `addiu $2,$gp,32768' foo.s:2: Error: operand 2 out of range `lw $2,32768($gp)' gas/ * config/tc-mips.c (match_int_operand): Call `match_out_of_range' before returning failure for 0x8000-0xffff values conditionally allowed.
2017-05-15MIPS16/GAS: Improve non-constant operand error diagnosticsMaciej W. Rozycki2-1/+10
Improve operand error diagnostics for non-constant expressions used for a 16-bit immediate, making the message more descriptive and indicating the offending operand, e.g.: foo.s:1: Error: invalid operands `lui $2,foo-bar' will show as: foo.s:1: Error: operand 2 must be constant `lui $2,foo-bar' This case does not currently trigger however, for two reasons. First, for regular MIPS and microMIPS assembly in the case of no match caused by `match_int_operand' here, the function is always called again from `mips_ip' via `match_insns', `match_insn' and then `match_operand' for the same opcode table's entry with `lax_match' set to TRUE, in which case the attempt to match succeeds and no error is issued. Second, in the case of MIPS16 assembly no call to `match_int_operand' is made at all for 16-bit immediates, because such immediates are currently only matched with extensible instructions, and these are handled in `match_mips16_insn' via `match_expression' directly rather than via `match_operand'. This will change for MIPS16 code with MIPS16e2 support introduced, where non-extensible instructions accepting 16-bit immediates will be added, so make the case work well right from the start. gas/ * config/tc-mips.c (match_int_operand): Call `match_not_constant' before returning failure for a non-constant 16-bit immediate conditionally allowed.
2017-05-15MIPS/GAS: Improve bignum operand error diagnosticsMaciej W. Rozycki14-2/+109
Improve bignum operand error diagnostics for cases where a constant would be accepted and report them as range errors, also indicating the offending operand and instruction, e.g.: $ cat bignum.s addiu $2, 0x10000000000000000 break 0x10000000000000000 $ as -o bignum.o bignum.s bignum.s:1: Error: bignum invalid bignum.s:2: Error: operand 1 must be constant `break 0x10000000000000000' $ now show as: $ as -o bignum.o bignum.s bignum.s:1: Error: operand 2 out of range `addiu $2,0x10000000000000000' bignum.s:2: Error: operand 1 out of range `break 0x10000000000000000' $ gas/ * config/tc-mips.c (match_const_int): Call `match_out_of_range' rather than `match_not_constant' for unrelocated operands retrieved as an `O_big' expression. (match_int_operand): Call `match_out_of_range' for relocatable operands retrieved as an `O_big' expression. (match_mips16_insn): Call `match_out_of_range' for relaxable operands retrieved as an `O_big' expression. * testsuite/gas/mips/addiu-error.d: New test. * testsuite/gas/mips/mips16@addiu-error.d: New test. * testsuite/gas/mips/micromips@addiu-error.d: New test. * testsuite/gas/mips/break-error.d: New test. * testsuite/gas/mips/lui-1.l: Adjust error message. * testsuite/gas/mips/addiu-error.l: New stderr output. * testsuite/gas/mips/mips16@addiu-error.l: New stderr output. * testsuite/gas/mips/micromips@addiu-error.l: New stderr output. * testsuite/gas/mips/break-error.l: New stderr output. * testsuite/gas/mips/addiu-error.s: New test source. * testsuite/gas/mips/break-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2017-05-15MIPS16/GAS: Improve non-immediate operand error diagnosticsMaciej W. Rozycki10-40/+189
Improve non-immediate operand error diagnostics for extensible MIPS16 instructions and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat addiu.s addiu $4, $3, $2 $ as -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: invalid operands `addiu $4,$3,$2' $ To do so observe that for extensible MIPS16 instructions and a non-PC relative operand this case is handled by an explicit OT_INTEGER check in `match_mips16_insn' returning a failure right away and consequently preventing a call to `match_expression' from being made. As from commit d436c1c2e889 ("Improve error reporting for register expressions"), <https://sourceware.org/ml/binutils/2013-08/msg00134.html>, however the check has become redundant as `match_expression' now only ever returns success for OT_INTEGER argument tokens, and a special case of an OT_CHAR `(' token already handled by `match_mips16_insn' just ahead of the `match_expression' call. Previously it also returned success for OT_REG argument tokens. Let the call to `match_expression' always happen then, yielding the same failure for the affected cases, however with more accurate diagnostics provided by the call making reporting consistent: $ as -mips16 -o addiu.o addiu.s addiu.s: Assembler messages: addiu.s:1: Error: operand 3 must be an immediate expression `addiu $4,$3,$2' $ gas/ * config/tc-mips.c (match_mips16_insn): Remove the explicit OT_INTEGER check before the `match_expression' call. * testsuite/gas/mips/mips16-insn-e.l: Adjust messages. * testsuite/gas/mips/mips16-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-64@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16e-32@mips16-insn-e.l: Likewise. * testsuite/gas/mips/mips16-reg-error.d: New test. * testsuite/gas/mips/mips16-reg-error.l: New stderr output. * testsuite/gas/mips/mips16-reg-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15MIPS16/GAS: Improve disallowed relocation operand error diagnosticsMaciej W. Rozycki6-1/+98
Improve disallowed relocation operand error diagnostics for MIPS16 code and make it match corresponding regular MIPS and microMIPS handling, e.g: $ cat sltu.s sltu $2, %lo(foo) $ as -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: invalid operands `sltu $2,%lo(foo)' $ To do so call `match_not_constant' from `match_mips16_insn' whenever a disallowed relocation operation has been noticed, like `match_const_int' does, making reporting consistent: $ as -mips16 -o sltu.o sltu.s sltu.s: Assembler messages: sltu.s:1: Error: operand 2 must be constant `sltu $2,%lo(foo)' $ gas/ * config/tc-mips.c (match_mips16_insn): Call `match_not_constant' for a disallowed relocation operation. * testsuite/gas/mips/mips16-reloc-error.d: New test. * testsuite/gas/mips/mips16-reloc-error.l: New stderr output. * testsuite/gas/mips/mips16-reloc-error.s: New test source. * testsuite/gas/mips/mips.exp: Run the new test.
2017-05-15MIPS/GAS/testsuite: Convert LUI list tests to dump testsMaciej W. Rozycki4-2/+15
gas/ * testsuite/gas/mips/lui-1.d: New test. * testsuite/gas/mips/lui-2.d: New test. * gas/testsuite/gas/mips/mips.exp: Fold corresponding list tests into the new tests.
2017-05-15MIPS/opcodes: Remove an incorrect MT ASE reference in MFC0/MTC0 decodingMaciej W. Rozycki2-1/+6
The `sel' operand of CP0 move instructions is a part of the base ISA and has nothing to do with the MT ASE. opcodes/ * mips-dis.c (print_insn_args) <default>: Remove an MT ASE reference in CP0 move operand decoding.
2017-05-15MIPS/GAS: Update `match_const_int' descriptionMaciej W. Rozycki2-2/+5
Remove a stale reference to FALLBACK parameter from the description of `match_const_int', matching commit 1a00e61226b3 ("Remove soft_match"), <https://sourceware.org/ml/binutils/2013-08/msg00133.html>. gas/ * config/tc-mips.c (match_const_int): Update description.
2017-05-15MIPS/GAS/doc: Refer to `.module' rather than `.set'Maciej W. Rozycki3-12/+26
Complement commit 919731affbef ("Add MIPS .module directive") and update the GAS manual to refer to the `.module' rather than `.set' directive in command-line option descriptions, following an observation that unlike `.set' and like the respective command-line option the use of the `.module' directive affects the ISA and ASE flags recorded in the object file produced, and therefore it is `.module' rather than `.set' that corresponds to the respective command-line option. gas/ * doc/as.texinfo (-mips16, -no-mips16): Refer to `.module mips16' rather than `.set mips16'. (-mmicromips, -mno-micromips): Refer to `.module micromips' and `.module nomicromips' rather than `.set micromips' and `.set nomicromips'. (-msmartmips, -mno-smartmips): Refer to `.module smartmips' rather than `.set smartmips'. * doc/c-mips.texi (MIPS Options): Refer to `.module mips16', `.module micromips', `.module nomicromips' and `.module smartmips' rather than `.set mips16', `.set micromips', `.set nomicromips' and `.set smartmips' respectively.
2017-05-15Fix gdb procfs.c compilation on SolarisRainer Orth2-2/+7
Prompted by the creation of the gdb 8.0 branch, I tried to build it on x86_64-pc-solaris2.12, but failed: /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: In function `target_ops* procfs_target()': /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:186:27: error: invalid conversion from `void (*)(target_ops*, char*, char*, char**, int)' to `void (*)(target_ops*, const char*, const string&, char**, int) {aka void (*)(target_ops*, const char*, const std::__cxx11::basic_string<char>&, char**, int)}' [-fpermissive] t->to_create_inferior = procfs_create_inferior; ^~~~~~~~~~~~~~~~~~~~~~ /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c: At global scope: /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:125:13: warning: `void procfs_create_inferior(target_ops*, char*, char*, char**, int)' declared `static' but never defined [-Wunused-function] static void procfs_create_inferior (struct target_ops *, char *, ^~~~~~~~~~~~~~~~~~~~~~ /vol/src/gnu/gdb/gdb-8.0-branch/local/gdb/procfs.c:4529:1: warning: `void procfs_create_inferior(target_ops*, const char*, const string&, char**, int)' defined but not used [-Wunused-function] procfs_create_inferior (struct target_ops *ops, const char *exec_file, ^~~~~~~~~~~~~~~~~~~~~~ This can easily be fixed by the following patch. * procfs.c (procfs_create_inferior): Change prototype to match definition.
2017-05-15Add .debug_gdb_scripts section to PE linker scripts.Nick Clifton3-0/+26
PR ld/21459 * scripttempl/pe.sc: Add .debug_gdb_scripts section. * scripttempl/pep.sc: Likewise.
2017-05-15Automatic date update in version.inGDB Administrator1-1/+1
2017-05-14Fix match and mask for 64-bit bb opcode.John David Anglin2-1/+5
2017-05-14Automatic date update in version.inGDB Administrator1-1/+1
2017-05-13Fix assertion failure relaxing TLS for position-independent executables.James Clarke2-1/+9
gold/ PR gold/21444 * gold.cc (Target_sparc::Relocate::relocate_tls): Local variables are final for position-independent executables. This has to be consistent with Target_sparc::Scan::local otherwise they will disagree as to whether local-exec is used.
2017-05-13Avoid compiler warning in MinGW buildEli Zaretskii2-1/+6
gdb: 2017-05-13 Eli Zaretskii <eliz@gnu.org> * tui/tui.c (tui_enable): Cast "unknown" to 'char *' to avoid a C++ compiler warning.
2017-05-13Automatic date update in version.inGDB Administrator1-1/+1
2017-05-12Fix misplacement of a relaxed section on AArch64.Igor Kudrin6-4/+152
gold/ChangeLog PR gold/21430 * aarch64.cc (AArch64_relobj::convert_input_section_to_relaxed_section): Set the section offset to -1ULL. (Target_aarch64::relocate_section): Adjust the view in case of a relaxed input section. * testsuite/Makefile.am (pr21430): New test. * testsuite/Makefile.in: Regenerate * testsuite/pr21430.s: New test source file. * testsuite/pr21430.sh: New test script.
2017-05-12x86: Merge X86_ISA_1_USED/X86_ISA_1_NEEDED propertiesH.J. Lu10-2/+142
If there are more than GNU property note in an input, we should merge X86_ISA_1_USED and X86_ISA_1_NEEDED properties. bfd/ * elf32-i386.c (elf_i386_parse_gnu_properties): Merge GNU_PROPERTY_X86_ISA_1_USED and GNU_PROPERTY_X86_ISA_1_NEEDED properties. * elf64-x86-64.c (elf_x86_64_parse_gnu_properties): Likewise. ld/ * testsuite/ld-i386/i386.exp: Run property-x86-3. * testsuite/ld-x86-64/x86-64.exp: Likewise. * testsuite/ld-i386/property-x86-3.d: New file. * testsuite/ld-i386/property-x86-3.s: Likewise. * testsuite/ld-x86-64/property-x86-3.d: Likewise. * testsuite/ld-x86-64/property-x86-3.s: Likewise.
2017-05-12Avoid exponential behavior in rust_evaluate_subexpTom Tromey2-8/+13
The STRUCTOP_STRUCT case in rust_evaluate_subexp would evaluate its LHS, and then, if it did not need Rust-specific treatment, it would back up and re-evaluate the entire STRUCTOP_STRUCT part of the expression using evaluate_subexp_standard. This yields exponential behavior and causes some expressions to evaluate extremely slowly. The fix is to simply do the needed work inline. This is PR rust/21483. ChangeLog 2017-05-12 Tom Tromey <tom@tromey.com> PR rust/21483: * rust-lang.c (rust_evaluate_subexp) <STRUCTOP_STRUCT>: Don't recurse, just call value_struct_elt directly.
2017-05-12Fix rust_dump_subexp_bodyTom Tromey2-2/+8
rust_dump_subexp_body was not correct in a couple of cases. While debugging the bug I was really interested in, this caused a crash. This patch fixes the problems. No test case because, IIRC there generally aren't tests for expression dumping. ChangeLog 2017-05-12 Tom Tromey <tom@tromey.com> * rust-lang.c (rust_dump_subexp_body) <STRUCTOP_ANONYMOUS, OP_RUST_ARRAY>: Fix.
2017-05-12Replace "return" with "break"Tom Tromey2-1/+5
This replaces a "return" with a "break" in rust_print_subexp, for consistency. ChangeLog 2017-05-12 Tom Tromey <tom@tromey.com> * rust-lang.c (rust_print_subexp): Replace "return" with "break".
2017-05-12MIPS/GAS: Unify GP-relative percent-opsMaciej W. Rozycki6-1/+38
For a reason that is unclear commit d6f165938798 ("Support for MIPS16 HI16/LO16 relocations"), <https://sourceware.org/ml/binutils/2005-02/msg00332.html>, which has added support for the R_MIPS16_GPREL relocation, has spelled its corresponding MIPS16 percent-op as `%gprel', rather than `%gp_rel' which is how its regular MIPS counterpart is spelled. To make assembly code sharing easier between the regular MIPS and the MIPS16 ISA make both percent-op spellings acceptable in both kinds of code now. Parts of this change by Matthew Fortune. gas/ * config/tc-mips.c (mips_percent_op): Add "%gprel". (mips16_percent_op): Add "%gp_rel". * testsuite/gas/mips/elf-rel8.s:: Add `%gprel' forms. * testsuite/gas/mips/elf-rel8-mips16.s: Add `%gp_rel' forms. * testsuite/gas/mips/elf-rel8.d: Adjust accordingly. * testsuite/gas/mips/elf-rel8-mips16.d: Likewise.
2017-05-12MIPS16/opcodes: Make the handling of BREAK and SDBBP consistentMaciej W. Rozycki13-61/+85
Disassemble the MIPS16 BREAK and SDBBP instruction's immediate operand in the hexadecimal rather than decimal numeral system and add respective operandless variants with an implicit 0 operand, making our handling of these instructions consistent with how we have processed their regular MIPS and microMIPS counterparts since forever. opcodes/ * mips16-opc.c (decode_mips16_operand) <'6'>: Switch the operand type to hexadecimal. (mips16_opcodes): Add operandless "break" and "sdbbp" entries. binutils/ * testsuite/binutils-all/mips/mips16-extend-insn.d: Adjust BREAK and SDBBP disassembly. gas/ * testsuite/gas/mips/mips16.d: Adjust BREAK disassembly. * testsuite/gas/mips/mips16-64@mips16.d: Likewise. * testsuite/gas/mips/mips16-64.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-64.d: Likewise. * testsuite/gas/mips/mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-64@mips16-macro.d: Likewise. * testsuite/gas/mips/mips16-sub.d: Likewise. * testsuite/gas/mips/mips16-32@mips16-sub.d: Likewise.
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