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2016-07-01Optimize memory_xfer_partial for remoteDon Breazeal5-2/+58
Some analysis we did here showed that increasing the cap on the transfer size in target.c:memory_xfer_partial could give 20% or more improvement in remote load across JTAG. Transfer sizes were capped to 4K bytes because of performance problems encountered with the restore command, documented here: https://sourceware.org/ml/gdb-patches/2013-07/msg00611.html and in commit 67c059c29e1f ("Improve performance of large restore commands"). The 4K cap was introduced because in a case where the restore command requested a 100MB transfer, memory_xfer_partial would repeatedy allocate and copy an entire 100MB buffer in order to properly handle breakpoint shadow instructions, even though memory_xfer_partial would actually only write a small portion of the buffer contents. A couple of alternative solutions were suggested: * change the algorithm for handling the breakpoint shadow instructions * throttle the transfer size up or down based on the previous actual transfer size I tried implementing the throttling approach, and my implementation reduced the performance in some cases. This patch implements a new target function that returns that target's limit on memory transfer size. It defaults to ULONGEST_MAX bytes, because for native targets there is no marshaling and thus no limit is needed. For remote targets it uses get_memory_write_packet_size. gdb/ChangeLog: * remote.c (remote_get_memory_xfer_limit): New function. * target-delegates.c: Regenerate. * target.c (memory_xfer_partial): Call target_ops.to_get_memory_xfer_limit. * target.h (struct target_ops) <to_get_memory_xfer_limit>: New member.
2016-07-01[AArch64] Fix +nofp16 handlingSzabolcs Nagy7-21/+105
Feature flag handling was not perfect, +nofp16 disabled fp instructions too. New feature flag macros were added to check features with multiple bits set (matters for FP_F16 and SIMD_F16 opcode feature tests). The unused AARCH64_OPCODE_HAS_FEATURE was removed, all checks should use one of the AARCH64_CPU_HAS_* macros. AARCH64_CPU_HAS_FEATURE now checks all feature bits. The aarch64_features table now contains the dependencies as a separate field (so when the feature is enabled all dependencies are enabled and when it is disabled everything that depends on it is disabled). Note that armv8-a+foo+nofoo is not equivalent to armv8-a if +foo turns on dependent features that nofoo does not turn off. gas/ * config/tc-aarch64.c (struct aarch64_option_cpu_value_table): Add require field. (aarch64_features): Initialize require fields. (aarch64_parse_features): Handle dependencies. (aarch64_feature_enable_set, aarch64_feature_disable_set): New. (md_assemble): Use AARCH64_CPU_HAS_ALL_FEATURES. * testsuite/gas/aarch64/illegal-nofp16.s: New. * testsuite/gas/aarch64/illegal-nofp16.l: New. * testsuite/gas/aarch64/illegal-nofp16.d: New. include/ * opcode/aarch64.h (AARCH64_CPU_HAS_ALL_FEATURES): New. (AARCH64_CPU_HAS_ANY_FEATURES): New. (AARCH64_CPU_HAS_FEATURE): Define as AARCH64_CPU_HAS_ALL_FEATURES. (AARCH64_OPCODE_HAS_FEATURE): Remove.
2016-07-01Fake VFORK_DONE events when following only the parent after a vfork.John Baldwin2-9/+121
FreeBSD does not currently report a ptrace event for a parent process after it resumes due to the child exiting the shared memory region after a vfork. Take the same approach used in linux-nat.c in this case of sleeping for a while and then reporting a fake VFORK_DONE event. gdb/ChangeLog: * fbsd-nat.c (struct fbsd_fork_child_info): Rename to ... (struct fbsd_fork_info): ... this. (struct fbsd_fork_info) <child>: Rename to ... (struct fbsd_fork_info) <ptid>: ... this. (fbsd_pending_children): Update type. (fbsd_remember_child): Update type and field name. (fbsd_is_child_pending): Likewise. (fbsd_pending_vfork_done): New variable. (fbsd_is_vfork_done_pending): New function. (fbsd_next_vfork_done): New function. (fbsd_resume): Don't resume processes with a pending vfork done event. (fbsd_wait): Report pending vfork done events. (fbsd_follow_fork): Delay and record a pending vfork done event for a vfork parent when detaching the child.
2016-07-01Move fbsd_resume and related functions below fork following helper code.John Baldwin2-64/+70
gdb/ChangeLog: * fbsd-nat.c (super_resume): Move earlier next to "super_wait". (resume_one_thread_cb): Move below fork following helper code. (resume_all_threads_cb): Likewise. (fbsd_resume): Likewise.
2016-07-01Honor detach-on-fork on FreeBSD.John Baldwin2-1/+6
Only detach from the new child process in the follow fork callback if detach_fork is true. gdb/ChangeLog: * fbsd-nat.c (fbsd_follow_fork): Only detach child if "detach_fork" is true.
2016-07-01Fix Thumb-2 BL detectionThomas Preud'homme6-9/+46
2016-07-01 Thomas Preud'homme <thomas.preudhomme@arm.com> bfd/ * elf32-arm.c (using_thumb2_bl): New function. (arm_type_of_stub): Declare thumb2 variable together and change type to bfd_boolean. Use using_thumb2_bl () to determine whether THM_MAX_FWD_BRANCH_OFFSET or THM2_MAX_FWD_BRANCH_OFFSET should be checked for BL range. (elf32_arm_final_link_relocate): Use using_thumb2_bl () to determine the bit size of BL offset. ld/ * testsuite/ld-arm/arm-elf.exp (Thumb-2 BL): Assemble for ARMv7. (Thumb-2 BL on ARMv6-M): New testcase. * testsuite/ld-arm/thumb2-bl.d: Do not try to match testcase filename. * testsuite/ld-arm/thumb2-bl.s: Do not select architecture.
2016-07-01Set debug registers on all threads belonging to the current inferior.John Baldwin2-3/+15
gdb/ChangeLog: * x86bsd-nat.c: Include 'gdbthread.h'. (x86bsd_dr_set): Set debug registers on all threads belonging to the current inferior.
2016-07-01Consolidate x86 debug register code for BSD native targets.John Baldwin15-255/+246
Move the debug register support code from amd64bsd-nat.c and i386bsd-nat.c into a shared x86bsd-nat.c. Instead of setting up x86_dr_low in amd64fbsd-nat.c and i386fbsd-nat.c, add a x86bsd_target function that creates a new target that inherits from inf_ptrace and sets up x86 debug registers if supported. In addition to initializing x86_dr_low, the x86bsd target installs a custom mourn_inferior target operation to clean up the x86 debug register state. Previously this was only done on amd64. Now it will be done for both i386 and amd64. The i386bsd_target and amd64bsd_target functions create targets that inherit from x86bsd rather than inf_ptrace. gdb/ChangeLog: * Makefile.in [HFILES_NO_SRCDIR]: Replace 'amd64bsd-nat.h' with 'x86bsd-nat.h'. * amd64bsd-nat.c: Include 'x86bsd-nat.h' instead of 'amd64bsd-nat.h'. (amd64bsd_xsave_len): Rename and move to x86bsd-nat.c. (amd64bsd_fetch_inferior_registers): Replace 'amd64bsd_xsave_len' with 'x86bsd_xsave_len'. (amd64bsd_store_inferior_registers): Likewise. (amd64bsd_target): Inherit from x86bsd_target. (amd64bsd_dr_get): Rename and move to x86bsd-nat.c. (amd64bsd_dr_set): Likewise. (amd64bsd_dr_set_control): Likewise. (amd64bsd_dr_set_addr): Likewise. (amd64bsd_dr_get_addr): Likewise. (amd64bsd_dr_get_status): Likewise. (amd64bsd_dr_get_control): Likewise. * amd64fbsd-nat.c: Include 'x86bsd-nat.h' instead of 'amd64bsd-nat.h'. (super_mourn_inferior): Move to x86bsd-nat.c. (amd64fbsd_mourn_inferior): Rename and move to x86bsd-nat.c. (amd64fbsd_read_description): Replace 'amd64bsd_xsave_len' with 'x86bsd_xsave_len'. (_initialize_amd64fbsd_nat): Remove x86 watchpoint setup and mourn_inferior' target op. * config/i386/fbsd.mh (NATDEPFILES): Add x86bsd-nat.o. * config/i386/fbsd64.mh: Likewise. * config/i386/nbsd64.mh: Likewise. * config/i386/nbsdelf.mh: Likewise. * config/i386/obsd.mh: Likewise. * config/i386/obsd64.mh: Likewise. * i386bsd-nat.c: Include 'x86bsd-nat.h'. (i386bsd_xsave_len): Rename and move to x86bsd-nat.c. (i386bsd_fetch_inferior_registers): Replace 'i386bsd_xsave_len' with 'x86bsd_xsave_len'. (i386bsd_store_inferior_registers): Likewise. (i386bsd_target): Inherit from x86bsd_target. (i386bsd_dr_get): Rename and move to x86bsd-nat.c. (i386bsd_dr_set): Likewise. (i386bsd_dr_set_control): Likewise. (i386bsd_dr_set_addr): Likewise. (i386bsd_dr_get_addr): Likewise. (i386bsd_dr_get_status): Likewise. (i386bsd_dr_get_control): Likewise. * i386bsd-nat.h (i386bsd_xsave_len): Remove. (i386bsd_dr_set_control): Remove. (i386bsd_dr_set_addr): Remove. (i386bsd_dr_get_addr): Remove. (i386bsd_dr_get_status): Remove. (i386bsd_dr_get_control): Remove. * i386fbsd-nat.c: Include 'x86bsd-nat.h'. (i386fbsd_read_description): Replace 'i386bsd_xsave_len' with 'x86bsd_xsave_len'. (_initialize_i386fbsd_nat): Remove x86 watchpoint setup and mourn_inferior' target op. * x86bsd-nat.c: New file. * x86bsd-nat.h: New file.
2016-07-01Fix potential buffer overflows with sprintf and very large integer values.Nick Clifton4-19/+46
binutuils* prdbg.c (pr_enum_type): Use a buffer big enough to hold an extremely large decimal value. (pr_range_type): Likewise. (pr_array_type): Likewise. (pr_struct_field): Likewise. (pr_class_baseclass): Likewise. (pr_class_method_variant): Likewise. (pr_tag_type): Likewise. (pr_int_constant): Likewise. (pr_typed_constant): Likewise. (pr_variable): Likewise. (pr_function_parameter): Likewise. (pr_start_block): Likewise. (pr_lineno): Likewise. (pr_end_block): Likewise. (tg_enum_type): Likewise. (tg_int_constant): Likewise. (tg_typed_constant): Likewise. (tg_start_block): Likewise. gas * macro.c (macro_expand_body): Use a buffer big enough to hold an extremely large integer.
2016-07-01Extend JIT-reader test and fix GDB problems that exposesPedro Alves9-42/+347
The jit-reader.exp test isn't really exercising the jit-reader's unwinder API at all. This commit address that, and then fixes GDB problems exposed. - The custom JIT reader provided for the jit-reader.exp testcase always rejects the jitted function's frame... This is because the custom JIT reader in the testcase never ever sets state->code_begin/end, so the bounds check in gdb.base/jitreader.c:unwind_frame: if (this_ip >= state->code_end || this_ip < state->code_begin) return GDB_FAIL; tends to fail, unless you're "lucky" (because it references uninitialized data). The result is that GDB is always actually using a built-in unwinder for the jitted function. - The provided unwinder doesn't do anything that GDB's built-in unwinder can't do. IOW, we can't really tell whether the JIT reader's unwinder is working or not. I fixed that by making the jitted function mangle its own stack pointer with a xor, and then teaching the jit unwinder to demangle it back (another xor). So now "backtrace" with GDB's built-in unwinder fails while with the jit unwinder, it succeeds. - GDB crashes after unloading the JIT reader, and flushing frames... I made the testcase use the "flushregs" command after unloading the JIT reader, to force the JIT frames to be flushed. However, that crashes GDB... When reinit_frame_cache tears down a frame's cache, it calls its unwinder's dealloc_cache method, which for JIT frames ends up in jit.c:jit_dealloc_cache. This function calls each of the frame's gdb_reg_value's "free" pointer: for (i = 0; i < gdbarch_num_regs (frame_arch); i++) if (priv_data->registers[i] && priv_data->registers[i]->free) priv_data->registers[i]->free (priv_data->registers[i]); and the problem is these gdb_reg_value instances have been returned by the JIT reader that has been already unloaded, and their "free" function pointers likely point to functions in the DSO that has already been unloaded... A fix for that could be to call reinit_frame_cache in jit_reader_unload_command _before_ unloading the jit reader DSO so that the jit reader is given a chance to clean up the gdb_reg_values before it is unloaded. However, the fix for the point below makes this unnecessary, because it stops jit.c from keeping around gdb_reg_values in the first place. - However, it still makes sense to clear the frame cache when loading or unloading a JIT unwinder. This makes testing a JIT unwinder a bit simpler. - Not only the frame cache actually -- gdb is not unloading the jit-registered objfiles when the JIT reader is unloaded, and not loading the already-registered descriptors when a JIT reader is loaded. The new test exercises unloading the jit reader, loading it back again, and then making sure the JIT reader's unwinder works again. Without the unload/re-load of already-read descriptors, the newly loaded JIT would have no idea where the new function is, because it's stored at symbol read time. - I added a couple "info frame" calls to the test, and that crashes GDB... The problem is that jit_frame_prev_register assumes it'll only be called for raw registers, so when it gets a pseudo register number, the "priv->registers[reg]" access is really an out-of-bounds access. To fix that, I made jit_frame_prev_register use gdbarch_pseudo_register_read_value for reading the pseudo-registers. However, that works with a regcache and we don't have one. To fix that, I made the JIT unwinder store a regcache in its cache instead of an array of gdb_reg_value pointers. gdb/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> Tom Tromey <tom@tromey.com> * jit.c (jit_reader_load_command): Call reinit_frame_cache and jit_inferior_created_hook. (jit_reader_unload_command): Call reinit_frame_cache and jit_inferior_exit_hook. * jit.c (struct jit_unwind_private) <registers>: Delete field. <regcache>: New field. (jit_unwind_reg_set_impl): Set the register's value in the regcache. Free the passed-in gdb_reg_value. (jit_dealloc_cache): Adjust to free the regcache. (jit_frame_sniffer): Allocate a regcache instead of an array of gdb_reg_value pointers. (jit_frame_this_id): Adjust. (jit_frame_prev_register): Read raw registers off of the regcache instead of from the gdb_reg_value pointer array. Use gdbarch_pseudo_register_read_value to read pseudo registers. * regcache.c (regcache_raw_set_cached_value): New function, factored out from ... (regcache_raw_write): ... here. * regcache.h (regcache_raw_set_cached_value): Declare. gdb/testsuite/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> * gdb.base/jit-reader.exp (info_registers_current_frame): New procedure. (jit_reader_test): Test the jit reader's unwinder. * gdb.base/jithost.c (jit_function_00_code): New global. (main): Use memcpy to fill in the mmapped code, instead of poking bytes manually here. * gdb.base/jitreader.c (enum register_mapping) <AMD64_RBP>: New value. (read_debug_info): Save the function's range. (read_sp): New function. (unwind_frame): Use it. Also unwind RBP. (get_frame_id): Use read_sp. (gdb_init_reader): Use calloc instead of malloc. * lib/gdb.exp (get_hexadecimal_valueof): Add optional 'test' parameter. Use gdb_test_multiple.
2016-07-01Fix failure to detach if process exits while detaching on LinuxPedro Alves9-70/+689
This commit fixes detaching on Linux when some thread exits the whole thread group (process) just while we're detaching. On Linux, a ptracer must detach from each LWP individually, with PTRACE_DETACH. Since PTRACE_DETACH sets the thread running free, if one of the already-detached threads causes the whole thread group to exit (e.g., simply calls exit), the kernel force-kills the other threads in the group, making them zombie, just as we're still detaching them. Since PTRACE_DETACH against a zombie thread fails with ESRCH, and gdb/gdbserver are not expecting this, the detach fails with an error like: "Can't detach process: No such process.". This patch detects this detach failure as normal, and instead of erroring out, reaps the now-dead thread. New test included, that exercises several different scenarios that cause GDB/GDBserver to error out when it should not. Tested on x86-64 GNU/Linux with {unix, native-gdbserver, native-extended-gdbserver} Note: without the previous fix, the "single-process + continue" variant of the new test would fail with: (gdb) PASS: gdb.threads/process-dies-while-detaching.exp: single-process: continue: watchpoint: switch to parent continue Continuing. Warning: Could not insert hardware watchpoint 3. Could not insert hardware breakpoints: You may have requested too many hardware breakpoints/watchpoints. Command aborted. (gdb) FAIL: gdb.threads/process-dies-while-detaching.exp: single-process: continue: watchpoint: continue gdb/gdbserver/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> Antoine Tremblay <antoine.tremblay@ericsson.com> * linux-low.c: Change interface to take the target lwp_info pointer directly and return void. Handle detaching from a zombie thread. (linux_detach_lwp_callback): New function. (linux_detach): Detach from the leader thread after detaching from the clone threads. gdb/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> Antoine Tremblay <antoine.tremblay@ericsson.com> * inf-ptrace.c (inf_ptrace_detach_success): New function, factored out from ... (inf_ptrace_detach): ... here. * inf-ptrace.h (inf_ptrace_detach_success): New declaration. * linux-nat.c (get_pending_status): Rename to ... (get_detach_signal): ... this, and return a host signal instead of filling in a wait status. (detach_one_lwp): New function, factored out from detach_callback and adjusted to handle detaching from a zombie thread. (detach_callback): Skip the leader thread. (linux_nat_detach): No longer defer to inf_ptrace_detach to detach the leader thread, nor build a signal string to pass down. Instead, use target_announce_detach, detach_one_lwp and inf_ptrace_detach_success. gdb/testsuite/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> Antoine Tremblay <antoine.tremblay@ericsson.com> * gdb.threads/process-dies-while-detaching.c: New file. * gdb.threads/process-dies-while-detaching.exp: New file.
2016-07-01Forget watchpoint locations when inferior exits or is killed/detachedPedro Alves6-8/+189
If you have two inferiors (or more), set watchpoints in one of the inferiors, and then that inferior exits, until you manually delete the watchpoint (or something forces a breakpoint re-set), you can't resume the other inferior. This is exercised by the test added by this commit. Without the GDB fix, this test fails like this: FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=kill: continue to marker in inferior 1 FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=detach: continue to marker in inferior 1 FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=exit: continue to marker in inferior 1 and gdb.log shows (in all three cases): (gdb) continue Continuing. Warning: Could not insert hardware watchpoint 2. Could not insert hardware breakpoints: You may have requested too many hardware breakpoints/watchpoints. Command aborted. (gdb) FAIL: gdb.multi/watchpoint-multi-exit.exp: dispose=kill: continue to marker in inferior 1 The problem is that GDB doesn't forget about the locations of watchpoints set in the inferior that is now dead. When we try to continue the inferior that is still alive, we reach insert_breakpoint_locations, which has the the loop that triggers the error: /* If we failed to insert all locations of a watchpoint, remove them, as half-inserted watchpoint is of limited use. */ That loop finds locations that are not marked inserted, but which according to should_be_inserted should have been inserted, and so errors out. gdb/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> * breakpoint.c (breakpoint_init_inferior): Discard watchpoint locations. * infcmd.c (detach_command): Call breakpoint_init_inferior. gdb/testsuite/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> * gdb.multi/watchpoint-multi-exit.c: New file. * gdb.multi/watchpoint-multi-exit.exp: New file.
2016-07-01Factor out "Detaching from program" message printingPedro Alves7-36/+41
Several targets have a copy of the same code that prints "Detaching from program ..." in their target_detach implementation. Factor that out to a common function. (For now, I left the couple targets that print this a bit differently alone. Maybe this could be further pulled out into infcmd.c. If we did that, and those targets want to continue printing differently, this new function could be converted to a target method.) gdb/ChangeLog: 2016-07-01 Pedro Alves <palves@redhat.com> * darwin-nat.c (darwin_detach): Use target_announce_detach. * inf-ptrace.c (inf_ptrace_detach): Likewise. * nto-procfs.c (procfs_detach): Likewise. * remote.c (remote_detach_1): Likewise. * target.c (target_announce_detach): New function. * target.h (target_announce_detach): New declaration.
2016-07-01Fix formatting of some previous gdb/testsuite/ChangeLog entriesPedro Alves1-10/+15
2016-07-01Fix formatting of some previous gdb/ChangeLog entriesPedro Alves1-4/+2
2016-07-01Expect the objcopy without global symbols test to fail for ARM and AArch64 ↵Nick Clifton2-0/+11
targets. * testsuite/binutils-all/objcopy.exp (objcopy_test_without_global_symbol): Expect this test to fail on the AArch64 and ARM targets, since they preserve their mapping symbols.
2016-07-01x86-64/MPX: relax no-RIP-relative-addressing testcaseJan Beulich2-4/+8
... for COFF targets.
2016-07-01Add marker for 2.27 branch.Tristan Gingold7-3/+22
binutils/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27. gas/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27. ld/ 2016-07-01 Tristan Gingold <gingold@adacore.com> * NEWS: Add marker for 2.27.
2016-07-01Fix mis-placement in binutils.texiTristan Gingold2-2/+6
binutils/ * doc/binutils.texi (objdump): Fix mis-placement.
2016-07-01x86-64/MPX: bndmk, bndldx, and bndstx don't allow RIP-relative addressingJan Beulich4-132/+227
Additionally warn about scaling factors other than 1 for the latter two, as those get ignored by the hardware.
2016-07-01x86/MPX: fix address size handlingJan Beulich5-4/+223
While address overrides are ignored in 64-bit mode (and hence shouldn't really result in an error, but upon v1 converting this to a warning I was told otherwise), trying to use 16-bit addressing is documented to result in #UD, and hence the assembler should reject the attempt. (The added test case at once also checks that bndc{l,n,u} won't accept 16-bit register operands.)
2016-07-01x86/Intel: don't accept bogus instructionsJan Beulich5-5/+72
... due to their last byte looking like a suffix, when after its stripping a matching instruction can be found. Since memory operand size specifiers in Intel mode get converted into suffix representation internally, we need to keep track of the actual mnemonic suffix which may have got trimmed off, and check its validity while looking for a matching template. I tripper over this quite some time again after support for AMD's SSE5 instructions got removed, as at that point some of the SSE5 mnemonics, other than expected, didn't fail to assemble. But the problem affects many more instructions, namely (almost) all MMX, SSE, and AVX ones as it looks. I don't think it makes sense to add a testcase covering all of them, nor do I think it makes sense to pick out some random examples for a new test case.
2016-07-01x86: allow suffix-less movzw and 64-bit movzbJan Beulich8-80/+108
... just like is already the case for 16- and 32-bit movzb: I can't see why omitting suffixes on this (and movs{b,w,l}) is not allowed, when it is allowed for all other instructions where the suffix is redundant with (one of) the operands.
2016-07-01x86: remove stray instruction attributesJan Beulich3-88/+103
- with Cpu64 Disp16 makes no sense for memory operands - with CpuNo64 Disp32S makes no sense - non-64-bit lgdt doesn't allow 10-byte operands
2016-07-01x86/Intel: fix operand checking for MOVSDJan Beulich10-6/+143
The dual purpose mnemonic (string move vs scalar double move) breaks the assumption that the isstring flag would be set on both the first and last entry in the current set of templates, which results in bogus or missing diagnostics for the string move variant of the mnemonic. Short of mostly rewriting i386_index_check() and its interaction with the rest of the code, simply shrink the template set to just string instructions when encountering the second memory operand, and run i386_index_check() a second time for the first memory operand after that reduction.
2016-07-01Automatic date update in version.inGDB Administrator1-1/+1
2016-06-30MIPS/GAS: Fix a comment typo in `get_append_method'Maciej W. Rozycki2-1/+5
gas/ * config/tc-mips.c (get_append_method): Fix a comment typo.
2016-06-30ChangeLog entry for the --with-cpu patch for ARC configuration.Andrew Burgess1-0/+8
2016-06-30Fix typo in commentYao Qi2-1/+5
This patch fixes the typo "uf" in the comment. I'll push it in as the change is obvious. 2016-06-30 Yao Qi <yao.qi@linaro.org> * arm-dis.c (print_insn): Fix typo in comment.
2016-06-30MIPS16/GAS: Fix delay slot filling across fragsMatthew Fortune10-7/+186
Fix an assertion failure like: test.s: Assembler messages: test.s:3: Internal error! Assertion failure in append_insn at .../gas/config/tc-mips.c:7523. Please report this bug. triggered by assembling MIPS16 code like: hello: addiu $4, $4, 4 jr $31 with the generation of a listing file enabled, e.g.: $ as -mips16 -O2 -aln=test.lst The cause of the problem is the lack of support for moving instructions across frags in MIPS16 jump swapping, which triggers more easily with listing enabled as in that case every instruction gets placed in its own frag. It would trigger even with listing disabled though if the instruction to swap a MIPS16 jump with was unfortunately enough placed as last in a frag that became full. This scenario is already handled correctly with branch swapping in regular MIPS and microMIPS code, so reuse it for MIPS16 code as well, and now that all MIPS16 handling has become the same as the regular MIPS and microMIPS cases remove MIPS16 special casing altogether. This effectively complements: commit 464ab0e55ade01d2bb0b4fa45c429af7a2f85a26 Author: Maciej W. Rozycki <macro@linux-mips.org> Date: Mon Aug 6 20:33:00 2012 +0000 <https://sourceware.org/ml/binutils/2012-08/msg00043.html>, ("MIPS/GAS: Correct microMIPS branch swapping assertion") for the MIPS16 case. The assertion itself was introduced with: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"), but its introduction merely noted our existing lack of support for MIPS16 jump swapping across frags. gas/ * config/tc-mips.c (append_insn) <APPEND_SWAP>: Do not special case MIPS16 handling. * testsuite/gas/mips/branch-swap-3.d: New test. * testsuite/gas/mips/branch-swap-4.d: New test. * testsuite/gas/mips/mips16@branch-swap-3.d: New test. * testsuite/gas/mips/mips16@branch-swap-4.d: New test. * testsuite/gas/mips/micromips@branch-swap-3.d: New test. * testsuite/gas/mips/micromips@branch-swap-4.d: New test. * testsuite/gas/mips/branch-swap-3.s: New test source. * testsuite/gas/mips/mips.exp: Run the new tests.
2016-06-30MIPS/GAS: Simplify non-MIPS16 branch swapping sequenceMaciej W. Rozycki2-3/+9
Simplify non-MIPS16 branch swapping by copying the MIPS16 variant, which sets the new position for the current instruction first and reduces the calculation of the new position of the previous instruction. Also refer to previous instruction's frag and position via `delay' for consistency. Reintroduce an explanatory comment, updated, previously removed with: commit 1e91584932efd70020c8c98037d0cb93a0552a20 Author: Richard Sandiford <rdsandiford@googlemail.com> Date: Wed Mar 9 09:17:02 2005 +0000 <https://sourceware.org/ml/binutils/2005-03/msg00217.html>, ("Rework MIPS nop-insertion code, add -mfix-vr4130 [5/11]"). gas/ * config/tc-mips.c (append_insn): Simplify non-MIPS16 branch swapping sequence.
2016-06-30PR gas/20312: Do not pad sections to alignment on failed assemblyMaciej W. Rozycki5-16/+33
Correct a regression from commit 85024cd8bcb9 ("Run write_object_file after errors") causing unsuccessful assembly, which may be due to any reason, such as supplying a valid source like this: .text .byte 0 .err to terminate with an assertion failure like: test.s: Assembler messages: test.s:3: Error: .err encountered ../as-new: BFD (GNU Binutils) 2.24.51.20140628 internal error, aborting at .../gas/write.c line 608 in size_seg ../as-new: Please report this bug. on targets whose default text section alignment is above 0, typically RISC machines. This is due to an attempt to set last text section's frag alignment to 0, requested from `subsegs_finish_section' where `frag_align_code (alignment, 0)' is called with `alignment' set to 0 rather than the section alignment if `had_errors' has returned true. The call to `subsegs_finish_section' is made from `subsegs_finish' from `write_object_file' at unsuccessful completion, which previously wasn't made. Always set last section's frag alignment from the section alignment then, forcing no section padding instead if completing unsuccessfully, so that in that case alignment padding is still suppressed from any listing generated, fixing assertion failures for these targets: alpha-linuxecoff -FAIL: all pr20312 arm-aout -FAIL: all pr20312 mips-freebsd -FAIL: all pr20312 mips-img-linux -FAIL: all pr20312 mips-linux -FAIL: all pr20312 mips-mti-linux -FAIL: all pr20312 mips-netbsd -FAIL: all pr20312 mips-sgi-irix5 -FAIL: all pr20312 mips-sgi-irix6 -FAIL: all pr20312 mips-vxworks -FAIL: all pr20312 mips64-freebsd -FAIL: all pr20312 mips64-img-linux -FAIL: all pr20312 mips64-linux -FAIL: all pr20312 mips64-mti-linux -FAIL: all pr20312 mips64-openbsd -FAIL: all pr20312 mips64el-freebsd -FAIL: all pr20312 mips64el-img-linux -FAIL: all pr20312 mips64el-linux -FAIL: all pr20312 mips64el-mti-linux -FAIL: all pr20312 mips64el-openbsd -FAIL: all pr20312 mipsel-freebsd -FAIL: all pr20312 mipsel-img-linux -FAIL: all pr20312 mipsel-linux -FAIL: all pr20312 mipsel-mti-linux -FAIL: all pr20312 mipsel-netbsd -FAIL: all pr20312 mipsel-vxworks -FAIL: all pr20312 mipsisa32-linux -FAIL: all pr20312 mipsisa32el-linux -FAIL: all pr20312 mipsisa64-linux -FAIL: all pr20312 mipsisa64el-linux -FAIL: all pr20312 sh-pe -FAIL: all pr20312 sparc-aout -FAIL: all pr20312 gas/ PR gas/20312 * write.c (subsegs_finish_section): Force no section padding to alignment on failed assembly, always set last frag's alignment from section. * testsuite/gas/all/pr20312.l: New list test. * testsuite/gas/all/pr20312.s: New test source. * testsuite/gas/all/gas.exp: Run the new test
2016-06-30Fix gdbserver/MI testing regressionPedro Alves2-4/+7
Commit 51f77c3704a6 ("Add testing infrastruture bits for running with MI on a separate UI") broke MI testing with native-gdbserver: $ make check RUNTESTFLAGS="--target_board=native-gdbserver mi-var-child.exp" ... Running .../src/binutils-gdb/gdb/testsuite/gdb.mi/mi-var-child.exp ... can't unset "inferior_spawn_id": no such variable while executing "unset inferior_spawn_id" (procedure "close_gdbserver" line 20) invoked from within "close_gdbserver" ... When testing with gdbserver, gdb_exit is overridden with a special version that calls close_gdbserver, which clears inferior_spawn_id. The problem is that the commit mentioned above made gdb_exit/mi_gdb_exit clear inferior_spawn_id too, and clearing a non-existing variable is a tcl error. Since gdb_exit/mi_gdb_exit always clears inferior_spawn_id now, the fix is simply to stop clearing it in close_gdbserver. gdb/testsuite/ 2016-06-30 Pedro Alves <palves@redhat.com> * lib/gdbserver-support.exp (close_gdbserver, gdb_exit): Don't unset inferior_spawn_id.
2016-06-30Make testing gdb with FORCE_SEPARATE_MI_TTY=1 actually workPedro Alves2-1/+6
Runing the whole gdb testsuite with MI on a separate tty, with: make check RUNTESTFLAGS="FORCE_SEPARATE_MI_TTY=1" Doesn't actually work because commit 51f77c3704a6 ("Add testing infrastruture bits for running with MI on a separate UI") included a last-minute rename typo, now fixed with this commit. gdb/testsuite/ChangeLog: 2016-06-30 Pedro Alves <palves@redhat.com> * lib/mi-support.exp (default_mi_gdb_start): Declare global FORCE_SEPARATE_MI_TTY, not SEPARATE_MI_TTY.
2016-06-30Allow ARC target to be configured with --with-cpu=<cpu-name>.Andrew Burgess6-4/+46
gas * config.in (TARGET_WITH_CPU): Undefine. * configure.ac: Add --with-cpu support, and define in config.h. * configure: Regenerate. * config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU. * NEWS: Mention new configure option.
2016-06-30[ARM][GAS] ARMv8.2 should enable ARMv8.1 NEON instructions.Matthew Wahab4-1/+89
GAS fails to recognize march=armv8.2-a as a superset of march=armv8.1-a when assembling NEON instructions. The patch corrects this, making -march=armv8.2-a -mfpu=neon-fp-armv8 enable the NEON intructions introduced with ARMv8.1-A. include/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * opcode/arm.h (ARM_ARCH_V8_2a): Add FPU_NEON_EXT_RDMA to the set of enabled FPU features. gas/ 2016-06-30 Matthew Wahab <matthew.wahab@arm.com> * testsuite/gas/arm/armv8_2+rdma.d: New.
2016-06-30Add support for simulating big-endian AArch64 binaries.Jim Wilson3-9/+30
* cpustate.h: Include config.h. (union GRegisterValue): Add WORDS_BIGENDIAN check. For big endian code use anonymous structs to align members. * simulator.c (aarch64_step): Use sim_core_read_buffer and endian_le2h_4 to read instruction from pc.
2016-06-29Fix gold testsuite failure with GCC 6.Cary Coutant2-1/+6
With GCC 6 when not using -static-libstdc++, the operator delete(void*) function is defined in the shared C++ support library, rather than in the main program. The test script is too aggressive in checking for this symbol's presence among the exported symbols. This patch removes the check for that symbol. gold/ PR gold/20310 * testsuite/dynamic_list.sh: Remove check for _ZdlPv.
2016-06-29Update "make clean" in gold/testsuite.Cary Coutant3-2/+7
gold/ * testsuite/Makefile.am (MOSTLYCLEANFILES): Add eh_test_2. * testsuite/Makefile.in: Regenerate.
2016-06-30[GOLD] Pass -Wl,-z to gcc, not plain -zAlan Modra3-4/+10
* testsuite/Makefile.am (memory_test, memory_test_2): Pass -Wl,-z to gcc, not plain -z. * testsuite/Makefile.in: Regenerate.
2016-06-30Automatic date update in version.inGDB Administrator1-1/+1
2016-06-29Add copyright header in gdb.base/return.cYao Qi2-0/+21
gdb/testsuite: 2016-06-29 Yao Qi <yao.qi@linaro.org> * gdb.base/return.c: Add copyright header.
2016-06-29Default to --enable-compressed-debug-sections=gas for Linux/x86H.J. Lu3-0/+18
--enable-compressed-debug-sections=gas added to binutils 2.26. Make it default for Linux/x86 targets in 2.27. * NEWS: Mention --enable-compressed-debug-sections=gas is the default for Linux/x86 targets. * configure.tgt (ac_default_compressed_debug_sections): Default to yes for Linux/x86 targets.
2016-06-29Fix PR python/20129 - use of non-existing variableTom Tromey4-2/+21
PR python/20129 concerns the error message one gets from a command like "disable frame-filter global NoSuchFilter". Currently this throws a second, unexpected, exception due to the use of a non-existing variable named "name". This patch adds regression tests and fixes a couple of spots to use the correct variable name. Built and regtested on x86-64 Fedora 23. 2016-06-29 Tom Tromey <tom@tromey.com> PR python/20129: * python/lib/gdb/command/frame_filters.py (_do_enable_frame_filter) (SetFrameFilterPriority._set_filter_priority): Use "frame_filter", not "name". 2016-06-29 Tom Tromey <tom@tromey.com> PR python/20129: * gdb.python/py-framefilter.exp: Add tests for setting priority and disabling of non-existent frame filter.
2016-06-29PR gdb/17210 - fix possible memory leak in read_memory_robustTom Tromey3-5/+20
PR gdb/17210 concerns a possible memory leak in read_memory_robust. The bug can happen because read_memory_robust allocates memory, does not install any cleanups, and invokes QUIT. Similarly, target_read calls QUIT, so it too can potentially throw. The fix is to install cleanups to guard the allocated memory. Built and regtested on x86-64 Fedora 23. I couldn't think of a way to test this, so no new test; and of course this means it should have more careful review. 2016-06-29 Tom Tromey <tom@tromey.com> PR gdb/17210: * target.c (free_memory_read_result_vector): Take a pointer to the VEC as an argument. (read_memory_robust): Install a cleanup for "result". * mi/mi-main.c (mi_cmd_data_read_memory_bytes): Update.
2016-06-29gold: Support 386 TLS code sequences without PLTH.J. Lu8-126/+663
There are extensions to 386 psABI: https://groups.google.com/forum/#!topic/ia32-abi/awsRSvJOJfs to call tls_get_addr via GOT: call *___tls_get_addr@GOT(%reg) where EBX register isn't required as GOT base. Since direct call is 4-byte long and indirect call, is 5-byte long, the extra one byte must be handled properly. For general dynamic model, 7-byte lea instruction before call instruction is replaced by 6-byte one to make room for indirect call. For local dynamic model, we simply use 5-byte indirect call. TLS linker optimization is updated to recognize new instruction patterns. For local dynamic model to local exec model transition, we generate a 6-byte lea instruction as nop, instead of a 1-byte nop plus a 4-byte lea instruction. PR gold/20308 * i386.cc (Target_i386::Relocate::relocate): Allow R_386_GOT32X relocation against ___tls_get_addr. (Target_i386::Relocate::tls_gd_to_ie): Support indirect call to __tls_get_addr. (Target_i386::Relocate::tls_gd_to_le): Likewise. (Target_i386::Relocate::tls_ld_to_le): Likewise. * testsuite/Makefile.am (check_PROGRAMS): Add pr20308a_test, pr20308b_test, pr20308c_test, pr20308d_test, pr20308e_test. (pr20308a_test_SOURCES): New. (pr20308a_test_DEPENDENCIES): Likewise. (pr20308a_test_CFLAGS): Likewise. (pr20308a_test_LDFLAGS): Likewise. (pr20308a_test_LDADD): Likewise. (pr20308b_test_SOURCES): Likewise. (pr20308b_test_DEPENDENCIES): Likewise. (pr20308b_test_CFLAGS): Likewise. (pr20308b_test_LDFLAGS): Likewise. (pr20308b_test_LDADD): Likewise. (pr20308c_test_SOURCES): Likewise. (pr20308c_test_DEPENDENCIES): Likewise. (pr20308c_test_CFLAGS): Likewise. (pr20308c_test_LDFLAGS): Likewise. (pr20308c_test_LDADD): Likewise. (pr20308d_test_SOURCES): Likewise. (pr20308d_test_DEPENDENCIES): Likewise. (pr20308d_test_CFLAGS): Likewise. (pr20308d_test_LDFLAGS): Likewise. (pr20308d_test_LDADD): Likewise. (pr20308e_test_SOURCES): Likewise. (pr20308e_test_DEPENDENCIES): Likewise. (pr20308e_test_CFLAGS): Likewise. (pr20308e_test_LDFLAGS): Likewise. (pr20308e_test_LDADD): Likewise. (pr20308a.so): Likewise. (pr20308b.so): Likewise. (pr20308_gd.o): Likewise. (pr20308_ld.o): Likewise. (MOSTLYCLEANFILES): Add pr20308a.so pr20308b.so. * testsuite/Makefile.in: Regenerated. * testsuite/pr20308_def.c: New file. * testsuite/pr20308_gd.S: Likewise. * testsuite/pr20308_ld.S: Likewise. * testsuite/pr20308_main.c: Likewise.
2016-06-29gold: Support x86-64 TLS code sequences without PLTH.J. Lu10-121/+639
There are extensions to x86-64 psABI: https://groups.google.com/forum/#!topic/x86-64-abi/de5_KnLHxtI to call tls_get_addr via GOT: call *__tls_get_addr@GOTPCREL(%rip) Since direct call is 4-byte long and indirect call, is 5-byte long, the extra one byte must be handled properly. For general dynamic model, one 0x66 prefix before call instruction is removed to make room for indirect call. For local dynamic model, we simply use 5-byte indirect call. TLS linker optimization is updated to recognize new instruction patterns. For local dynamic model to local exec model transition, we generate 4 0x66 prefixes, instead of 3, before mov instruction in 64-bit and generate a 5-byte nop, instead of 4-byte, before mov instruction in 32-bit. PR gold/20216 * configure.ac (DEFAULT_TARGET_X86_64_OR_X32): New AM_CONDITIONAL. * configure: Regenerated. * x86_64.cc (Target_x86_64<size>::Relocate::relocate): Allow R_X86_64_GOTPCRELX relocation against __tls_get_addr. (Target_x86_64<size>::Relocate::tls_gd_to_ie): Support indirect call to __tls_get_addr. (Target_x86_64<size>::Relocate::tls_gd_to_le): Likewise. (Target_x86_64<size>::Relocate::tls_ld_to_le): Likewise. * testsuite/Makefile.am (check_PROGRAMS): Add pr20216a_test, pr20216b_test, pr20216c_test, pr20216d_test, pr20216e_test. (pr20216a_test_SOURCES): New. (pr20216a_test_DEPENDENCIES): Likewise. (pr20216a_test_CFLAGS): Likewise. (pr20216a_test_LDFLAGS): Likewise. (pr20216a_test_LDADD): Likewise. (pr20216b_test_SOURCES): Likewise. (pr20216b_test_DEPENDENCIES): Likewise. (pr20216b_test_CFLAGS): Likewise. (pr20216b_test_LDFLAGS): Likewise. (pr20216b_test_LDADD): Likewise. (pr20216c_test_SOURCES): Likewise. (pr20216c_test_DEPENDENCIES): Likewise. (pr20216c_test_CFLAGS): Likewise. (pr20216c_test_LDFLAGS): Likewise. (pr20216c_test_LDADD): Likewise. (pr20216d_test_SOURCES): Likewise. (pr20216d_test_DEPENDENCIES): Likewise. (pr20216d_test_CFLAGS): Likewise. (pr20216d_test_LDFLAGS): Likewise. (pr20216d_test_LDADD): Likewise. (pr20216e_test_SOURCES): Likewise. (pr20216e_test_DEPENDENCIES): Likewise. (pr20216e_test_CFLAGS): Likewise. (pr20216e_test_LDFLAGS): Likewise. (pr20216e_test_LDADD): Likewise. (pr20216a.so): Likewise. (pr20216b.so): Likewise. (pr20216_gd.o): Likewise. (pr20216_ld.o): Likewise. (MOSTLYCLEANFILES): Add pr20216a.so pr20216b.so. * testsuite/Makefile.in: Regenerated. * testsuite/pr20216_def.c: New file. * testsuite/pr20216_gd.S: Likewise. * testsuite/pr20216_ld.S: Likewise. * testsuite/pr20216_main.c: Likewise.
2016-06-29Initialize strtok_r's saveptr to NULLManish Goregaokar2-1/+6
Building gdb with --enable-build-with-cxx=no trips on a warning: ../../binutils-gdb/gdb/rust-lang.c:173:15: error: saveptr may be used uninitialized in this function [-Werror=maybe-uninitialized] ret.name = concat (TYPE_NAME (type), "::", token, (char *) NULL); The problem is that gcc doesn't understand that "tail" can never be NULL in the call to strtok_r: name = xstrdup (TYPE_FIELD_NAME (type, 0)); cleanup = make_cleanup (xfree, name); tail = name + strlen (RUST_ENUM_PREFIX); ... for (token = strtok_r (tail, "$", &saveptr); Fix this by always initializing saveptr. 2016-06-29 Manish Goregaokar <manish@mozilla.com> gdb/ChangeLog: * rust-lang.c (rust_get_disr_info): Initialize saveptr to NULL.
2016-06-29Set unknown_syscall differently on arm linuxYao Qi2-0/+13
Currently, we use 123456789 as unknown or illegal syscall number, and expect program return ENOSYS. Although 123456789 is an illegal syscall number on arm linux, kernel sends SIGILL rather than returns -ENOSYS. However, arm linux kernel returns -ENOSYS if syscall number is within 0xf0001..0xf07ff, so we can use 0xf07ff for unknown_syscall in test. gdb/testsuite: 2016-06-29 Yao Qi <yao.qi@linaro.org> * gdb.base/catch-syscall.c [__arm__]: Set unknown_syscall to 0x0f07ff.
2016-06-29sparc: make SPARC_OPCODE_ARCH_MAX part of its enumTrevor Saunders2-2/+6
include/ChangeLog: 2016-06-29 Trevor Saunders <tbsaunde+binutils@tbsaunde.org> * opcode/sparc.h (enum sparc_opcode_arch_val): Move SPARC_OPCODE_ARCH_MAX into the enum.