Age | Commit message (Collapse) | Author | Files | Lines |
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* i386-dis.c (three_byte_table): Expand to 256 elements.
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PR ld/3052
* ld-elf/loadaddr1.t: Add "AT (ADDR(.data))".
* ld-elf/loadaddr2.t: Likewise.
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PR ld/3103
* ld-elf/overlay.d: New file.
* ld-elf/overlay.s: Likewise.
* ld-elf/overlay.t: Likewise.
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rather than a section relative value.
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other variables.
(gdbmi-send): Ensure any text properties can be removed.
(gdbmi-prompt1): Update to gdb-ui.el
(gud-gdbmi-marker-filter): Defer setting of gud-running.
Keep gdb-done-regexp for partial-output-buffer.
(gdb-stack-list-frames-handler): Add face to function names.
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violation.
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(alpha_push_dummy_call, alpha_extract_return_value)
(alpha_breakpoint_from_pc, alpha_read_insn)
(alpha_get_longjmp_target, alpha_supply_int_regs)
(alpha_fill_int_regs, alpha_supply_fp_regs, alpha_fill_fp_regs)
(alpha_next_pc): Use gdb_byte instead of (unsigned) char where
appropriate.
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(sparc64_fprs_type): New variables.
(sparc64_init_types): New function.:
(sparc64_register_info): Use appropriate flag types for %fsr and
%fprs.
(sparc64_pseudo_register_info): Use appropriate type for %pstate.
(_initialize_sparc64_tdep): New function.
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than 32 bits.
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just the first one.
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(INTERNAL_CFLAGS_BASE): Use it.
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* MAINTAINERS: Update my email address.
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plt_thumb_refcount from indirect symbols.
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reloc handling.
* elf64-ppc.c (ppc64_elf_relocate_section): Likewise.
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* ld.texinfo (Output Section LMA): Update default description.
(Location Counter): Clarify backward movement.
* ldlang.c (lang_size_sections_1): Leave non-alloc sections with
default lma equal to vma. Warn on backward movement of dot.
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* config/tc-arm.c (s_arm_unwind_save_mmxwr): Correct condition for
merging with previous long opcode.
gas/testsuite:
* gas/arm/unwind.s: Test not merging iWMMXt register save with
previous long opcode.
* gas/arm/unwind.d, gas/arm/unwind_vxworks.d: Update.
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* elf32-arm.c (elf32_arm_link_hash_table): Correct typo in
comment for target1_is_rel.
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* Makefile.am: Add rules to build pe-arm-wince.lo and pei-arm-wince.lo objects.
* Makefile.in: Regenerate.
* pe-arm-wince.c: New file.
* pei-arm-wince.c: New file.
* pei-arm.c: Remove ARM_WINCE block.
* pe-arm.c: Remove ARM_WINCE block. Rename
bfd_arm_pe_allocate_interworking_sections,
bfd_arm_pe_get_bfd_for_interworking, and
bfd_arm_pe_process_before_allocation to
bfd_armpe_allocate_interworking_sections,
bfd_armpe_get_bfd_for_interworking, and
bfd_armpe_process_before_allocation. Move them before including bfd.h.
* bfd.c: ARM wince bfd format names were renamed. Adjust.
* coff-arm.c [ARM_WINCE]: Adjust so Windows CE doesn't end up with unexpected/conflicting relocs.
* targets.c: The arm-wince-pe target got its own new vector. Adjust.
* config.bfd: Likewise.
* configure.in: Likewise.
* configure: Regenerate.
binutils
* configure.in: Split arm-pe and arm-wince-pe. Build dlltool with -DDLLTOOL_ARM_WINCE for Windows CE case.
* configure: Regenerate.
* dlltool.c: Add support for arm-wince.
gas
* Makefile.am (TARG_ENV_HFILES): Add te-wince-pe.h.
* Makefile.in: Regenerate.
* config/tc-arm.h [TARGET_FORMAT]: ARM wince bfd names were renamed. Adjust.
ld
* Makefile.am: Split arm-wince into its own emulation.
* Makefile.in: Regenerate.
* configure.tgt: Set targ_emul to arm_wince_pe for ARM Windows CE targets.
* pe-dll.c : Define PE_ARCH_arm_wince.
(pe_detail_list): Add PE_ARCH_arm_wince case.
(make_one): Handle PE_ARCH_arm_epoc and PE_ARCH_arm_wince cases.
* emulparams/arm_wince_pe.sh: New file.
* emultempl/pe.em: Handle new TARGET_IS_arm_wince_pe define.
Remap bfd_arm_allocate_interworking_sections, bfd_arm_get_bfd_for_interworking and
bfd_arm_process_before_allocation for arm-pe and arm-wince-pe targets too.
(gld_${EMULATION_NAME}_recognized_file): Handle arm-wince and arm-epoc bfd format names.
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* Makefile.in (amd64_linux_tdep_h): New.
(amd64-linux-nat.o, amd64-linux-tdep.o): Update.
* amd64-linux-nat.c (amd64_linux_gregset64_reg_offset): Add
ORIG_RAX.
(_initialize_amd64_linux_nat): Set amd64_native_gregset64_num_regs.
* amd64-linux-tdep.c (amd64_linux_register_name)
(amd64_linux_register_type, amd64_linux_register_reggroup_p)
(amd64_linux_write_pc): New.
(amd64_linux_init_abi): Use them, and update num_regs.
* amd64-linux-tdep.h: New file.
* amd64-tdep.c (amd64_register_name, amd64_register_type): Make
public.
* amd64-tdep.h (amd64_register_name, amd64_register_type): New
prototypes.
* regformats/reg-x86-64-linux.dat: New file.
gdb/testsuite/
* Makefile.in (clean): Clean reg-x86-64-linux.c.
(reg-x86-64-linux.o, reg-x86-64-linux.c): New.
* configure.srv (x86_64-*-linux*): Use reg-x86-64-linux.o.
* linux-x86-64-low.c (x86_64_regmap): Include ORIG_RAX.
(x86_64_fill_gregset, x86_64_store_gregset): Skip floating
point registers.
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before unwinding to the previous frame.
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point of symbol resolution and can now issue a multiple definition
error. Also added target selection infrastructure.
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2006-08-18 Fred Fish <fnf@specifix.com>
* lib/gdb.exp (skip_altivec_tests): Fix apparent typo,
'$' in front of skip_vmx_tests_saved when setting that.
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bfd/
* elf32-arm.c (elf32_arm_link_hash_entry): Add export_glue.
(elf32_arm_link_hash_newfunc): Initialize export_glue.
(record_arm_to_thumb_glue): Return stub symbol.
(elf32_arm_create_thumb_stub): New function.
(elf32_arm_to_thumb_stub): Use it.
(elf32_arm_to_thumb_export_stub): New function.
(elf32_arm_begin_write_processing): New function.
(allocate_dynrelocs): Allocate Arm stubs.
(elf_backend_begin_write_processing): Define.
(elf32_arm_symbian_begin_write_processing): Remove ATTRIBUTE_UNUSED.
Call elf32_arm_begin_write_processing.
ld/
* emultempl/armelf.em (arm_elf_before_allocation): Call
gld${EMULATION_NAME}_before_allocation after setting interworking bfd.
ld/testsuite/
* ld-arm/arm-elf.exp (armelftests): Add armthumb-lib.so. Add
-use-blx to mixed-lib.so
* ld-arm/armthumb-lib.d: New file.
* ld-arm/armthumb-lib.sym: New file.
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PR ld/3052
* ld-elf/loadaddr.s: New file.
* ld-elf/loadaddr1.d: Likewise.
* ld-elf/loadaddr1.t: Likewise.
* ld-elf/loadaddr2.d: Likewise.
* ld-elf/loadaddr2.t: Likewise.
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number in a comment.
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(read_structure_type): Call it.
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responses.
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(generate_reloc): Revert to skipping sections without a SEC_LOAD flag, and to
not skipping .idata* sections.
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* elf64-ppc.c (create_linkage_sections): Align .glink to 8 bytes.
(ppc64_elf_build_stubs): Use new lazy linking stub.
ld/testsuite/
* ld-powerpc/tlsexe.d: Update for lazy link stub change.
* ld-powerpc/tlsexe.r: Likewise.
* ld-powerpc/tlsexetoc.d: Likewise.
* ld-powerpc/tlsexetoc.r: Likewise.
* ld-powerpc/tlsso.d: Likewise.
* ld-powerpc/tlstocso.d: Likewise.
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2006-08-16 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3015
* elf.c (get_program_header_size): Add a PT_GNU_RELRO segment
only if there is a PT_DYNAMIC segment.
(_bfd_elf_map_sections_to_segments): Likewise.
(assign_file_positions_for_load_sections): Set PT_GNU_RELRO
segment alignment to 1.
ld/testsuite/
2006-08-16 H.J. Lu <hongjiu.lu@intel.com>
PR ld/3015
* ld-elf/binutils.exp: Add tests for "-z relro".
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