Age | Commit message (Collapse) | Author | Files | Lines |
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not fit in 32 bits.
(_bfd_relocate_contents): Likewise.
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with a shift count of 0.
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write data in sparc_handle_align.
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error message.
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debug_sym links
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function start addresses, reset function_start_address whenever a new
source file is seen.
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* ldlang.c (wild_sort): Correct order of sort.
* scripttempl/elf.sc: Put *crtbegin.o before other .ctors and
.dtors.
* scripttempl/elfd10v.sc: Likewise.
start-sanitize-d30v
* scripttempl/elfd30v.sc: Likewise.
end-sanitize-d30v
* scripttempl/elfppc.sc: Likewise.
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(mips_ip): Likewise.
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completer.
* vu0.d: Corresponding changes.
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Mon May 18 14:27:06 1998 Frank Ch. Eigler <fche@cygnus.com>
* mips-opc.c (mult1): Add two-operand variety of mult1 for R5900.
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(_print_insn_mips): Likewise.
* vu0.h (vopmula, vopmsub): Correctly handle opcode/operand
completers.
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Removed documentation about the switch.
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* Followup patch for SCEI PR 15853
* First check-in of TX3904 interrupt controller devices for ECC. [sanitized]
* First implementation of MIPS hardware interrupt emulation.
Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
* configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
modules. Recognize TX39 target with "mips*tx39" pattern.
* configure: Rebuilt.
* sim-main.h (*): Added many macros defining bits in
TX39 control registers.
(SignalInterrupt): Send actual PC instead of NULL.
(SignalNMIReset): New exception type.
* interp.c (board): New variable for future use to identify
a particular board being simulated.
(mips_option_handler,mips_options): Added "--board" option.
(interrupt_event): Send actual PC.
(sim_open): Make memory layout conditional on board setting.
(signal_exception): Initial implementation of hardware interrupt
handling. Accept another break instruction variant for simulator
exit.
(decode_coproc): Implement RFE instruction for TX39.
(mips.igen): Decode RFE instruction as such.
start-sanitize-tx3904
* configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
* interp.c: Define "jmr3904" and "jmr3904debug" board types and
bbegin to implement memory map.
* dv-tx3904cpu.c: New file.
* dv-tx3904irc.c: New file.
end-sanitize-tx3904
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Mon May 18 12:37:38 1998 Frank Ch. Eigler <fche@cygnus.com>
* config/tc-mips.c (macro): For R5900, use "B" operand format for
"break" instructions generated in macro (div etc.) instructions.
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Mon May 18 13:11:45 1998 Frank Ch. Eigler <fche@cygnus.com>
* gas/mips/{div,ld,mul}.d: Add assembler -mcpu= flag to match
disassembler.
start-sanitize-r5900
* gas/mips/break5900.[sd]: Test that break instructions generated
in div/etc. macro instructions are of 20-bit variety for R5900.
end-sanitize-r5900
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(elf64_alpha_can_merge_gots, elf64_alpha_merge_gots,
elf64_alpha_size_got_sections): Rewrite, handling multiple got
subsections during relaxation more correctly.
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* gdb.base/reread1.c: New file.
* gdb.base/reread2.c: New file.
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SPARClite programs.
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* gdb.base/structs2.c: New file.
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* genmloop.sh: Use them rather than static locals.
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(byte_swap_words): New function.
* sis.h: (byte_swap_words): Declare.
* interf.c (run_sim): Always fetch instructions as big-endian.
* sis.c (run_sim): Ditto.
Move this c/l entry from ../ChangeLog.
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Also, fixed a small third-party sanitize typo in ChangeLog.
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(sim_sync_stop): New function.
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* sim-engine.h (sim_engine_set_run_state): Declare.
* genmloop.sh (pending_reason,pending_sigrc): New static locals.
(@cpu@_engine_stop): New args reason,sigrc. All callers updated.
(engine_resume): Reorganize. Allow synchronous exit from main loop.
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* sim/m32r/misc.exp: Ditto.
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* arch.h,cpu.c,cpu.h,cpuall.h: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
* cpux.c,cpux.h,modelx.c,semx.c: Regenerate.
* m32rx.c (m32rx_model_mark_{busy,unbusy}_reg): New functions.
* mloopx.in (execute): Update calls to TRACE_INSN_{INIT,FINI}.
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All callers updated.
(trace_insn_fini): New arg last_p. All callers updated.
* cgen-trace.h (trace_insn_init,trace_insn_fini): Update.
(TRACE_INSN_INIT,TRACE_INSN_FINI): Update.
* genmloop.sh (engine_resume): Update.
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(cgen_hw_lookup_by_enum): New function.
* m32r-opc.c, m32r-opc.h: Regenerate, delete h-abort.
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* gas/mips/ld-ilocks-addr32.d : New.
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* ldgram.y (current_file): Change to struct wildcard_spec.
(%union): Add new fields cname and wildcard.
(wildcard_name, wildcard_spec): New nonterminals.
(file_NAME_list): Use wildcard_spec.
(input_section_spec): Change current_file usage.
* ld.h (struct wildcard_spec): Define.
* ldlang.h (lang_wild_statement_struct): Add new fields
sections_sorted and filenames_sorted.
(lang_add_wild): Update declaration.
* ldlang.c (wild_sort): New static function.
(wild_section): Use wild_sort.
(print_wild_statement): Print sorting information.
(lang_add_wild): Add new parameters sections_sorted and
filenames_sorted. Change all callers.
* mri.c (mri_draw_tree): Update calls to lang_add_wild.
* scripttempl/elf.sc: Sort .ctors.* and .dtors.* by section name.
* scripttempl/elfd10v.sc: Likewise.
* scripttempl/elfd30v.sc: Likewise.
* scripttempl/elfppc.sc: Likewise.
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* exec.c (SDIV, SDIVCC, UDIV, UDIVCC): Define new opcodes.
* (mul64): Simplify calculation of negative result.
* (div64): New helper function for 64-bit division.
* (dispatch_instruction): Add emulation of SDIV, SDIVCC, UDIV,
and UDIVCC.
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* sky-defs.tcl (LDSCRIPT,SIM): Delete.
(run_trc_test): Use sim_compile, sim_run. Only delete temp files
if testcase passed.
(run_brn_test): Ditto.
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Added internationalisation to emulation templates.
Added --support-old-code command line option to armcoff and pe emulations.
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