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2021-11-18gdb: include gdbarch.h in all files extending gdbarch_tdepSimon Marchi24-0/+31
Commit 345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") made a bunch of files define a *_gdbarch_tdep class that inherits from a gdbarch_tdep base. But some of these files don't include gdbarch.h, where gdbarch_tdep is defined. This may cause build errors if gdbarch.h isn't already included by chance by some other header file. Avoid this by making them include gdbarch.h. Change-Id: If433d302007e274daa4f656cfc94f769cf1aa68a
2021-11-18gdbsupport: make gdb_assert_not_reached accept a format stringSimon Marchi19-39/+39
Change gdb_assert_not_reached to accept a format string plus corresponding arguments. This allows giving more precise messages. Because the format string passed by the caller is prepended with a "%s:" to add the function name, the callers can no longer pass a translated string (`_(...)`). Make the gdb_assert_not_reached include the _(), just like the gdb_assert_fail macro just above. Change-Id: Id0cfda5a57979df6cdaacaba0d55dd91ae9efee7
2021-11-18gdb fix for catch-syscall.expCarl Love1-2/+4
Remove check_continue "execve" from Proc test_catch_syscall_execve. The check_continue proceedure checs that the command, execve, starts and checks for the return from the command. The execve command starts a new program and thus the return from the command causing the test to fail. The call to proc check_continue "execve" is removed and replaced with just the call to check_call_to_syscall "execve" to verify the command executed. The next test in proc test_catch_syscall_execve verifies that the new program started and hit the break point in main. Update the check for the PowerPC architecture. Power Little Endian systems include "le" in the name. The istarget "power64-*-linux*" check fails to match LE sytems. The expected string is updated to capture both Big Endian and Little Endian systems. Power 10 LE istarget prints as: powerpc64le-unknown-linux-gnu. This patch fixes three failures and the error: ERROR: can't read "arch1": no such variable Patch tested on Power 10 ppc64le GNU/Linux platform.
2021-11-18gdb: PowerPC fix gdb.base/break-interp.expCarl Love3-9/+33
This patch fixes eight test failures on PowerPC for the test gdb.base/break-interp.exp. The patch adds a funtion and registers it to setup the displaced stepping for ppc-linux platform. The patch moves the struct ppc_inferior_data to the ppc-tdep.h include file to make it visible to the ppc-linux-tdep.c and rs6000-tdep.c files. Additionally the function get_ppc_per_inferior is made external in ppc-tdep.h to make it visible in both files. Tested on Power 10 ppc64le-linux with no regressions.
2021-11-18gdb fix PowerPC test gdb.arch/ppc-longdouble.expCarl Love1-1/+1
The test complains of duplicate tests. DUPLICATE: gdb.arch/ppc-longdouble.exp: continue to breakpoint: return The do_test calls gdb_continue_to_breakpoint "return". The duplicates are the result of calling do_test three times with different arguments. This patch fixes the duplicate tests by adding $name to the gdb_continue_to_breakpoint argument. Patch tested on Power 10 ppc64le GNU/Linux, no duplicate tests reported, no new regression errors.
2021-11-18elf/x86: Issue an error on discarded output .plt sectionH.J. Lu5-0/+37
Issue an error, instead of crash, on discarded output .plt section. bfd/ PR ld/28597 * elf32-i386.c (elf_i386_finish_dynamic_sections): Issue an error on discarded output .plt section. * elf64-x86-64.c (elf_x86_64_finish_dynamic_sections): Likewise. ld/ PR ld/28597 * testsuite/ld-elf/pr28597.d: New file. * testsuite/ld-elf/pr28597.s: Likewise. * testsuite/ld-elf/pr28597.t: Likewise.
2021-11-18[gdb/testsuite] Add missing wait in gdb.base/signals-state-child.expTom de Vries1-3/+11
On OBS I ran into: ... (gdb) shell diff -s outputs/gdb.base/signals-state-child/standalone.txt \ outputs/gdb.base/signals-state-child/gdb.txt^M diff: outputs/gdb.base/signals-state-child/standalone.txt: \ No such file or directory^M (gdb) FAIL: gdb.base/signals-state-child.exp: signals states are identical ... I managed to reproduce this by adding "sleep (5)" at the start of main in signals-state-child.c. Fix this by waiting on the result of the spawned command. Tested on x86_64-linux.
2021-11-18Re: Don't compile some opcodes files when bfd is 32-bit onlyAlan Modra2-10/+10
Put bpf back in the 32-bit targets, even though bpf requires a 64-bit bfd. bpf sim support apparently works without being 64-bit. * Makefile.am (TARGET64_LIBOPCODES_CFILES): Move bpf files.. (TARGET32_LIBOPCODES_CFILES): ..to here. * Makefile.in: Regenerate.
2021-11-18Pass DEBUGINFOD_CFLAGS when compiling dwarf.cAlan Modra2-2/+22
Pick up the elfutils/debuginfod.h install location -I flags from a variable set by debuginfod.m4 (via pkg.m4 and pkg-config). * Makefile.am (DEBUGINFOD_CFLAGS): Define. (dwarf.@OBJECT@): New rule.
2021-11-18RISC-V: Add testcases for z[fdq]inxjiawei6-0/+222
Use gpr when the zfinx enable, the testcases contain float instructions that reuse by z[fdq]inx. gas/ChangeLog: * testsuite/gas/riscv/zdinx.d: New test. * testsuite/gas/riscv/zdinx.s: New test. * testsuite/gas/riscv/zfinx.d: New test. * testsuite/gas/riscv/zfinx.s: New test. * testsuite/gas/riscv/zqinx.d: New test. * testsuite/gas/riscv/zqinx.s: New test. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2021-11-18RISC-V: Add instructions and operand set for z[fdq]inxjiawei5-149/+167
Reuse float instructions in INSN_CLASS_F/D/Q, use riscv_subset_supports to verify if z*inx enabled and use gpr instead of fpr when z*inx is enable. bfd/ChangeLog: * elfxx-riscv.c (riscv_multi_subset_supports): Added support for z*inx extension. gas/ChangeLog: * config/tc-riscv.c (riscv_ip): Added register choice for z*inx. include/ChangeLog: * opcode/riscv.h (enum riscv_insn_class): Reused INSN_CLASS_* for z*inx. opcodes/ChangeLog: * riscv-dis.c (riscv_disassemble_insn): Added disassemble check for z*inx. * riscv-opc.c: Reused INSN_CLASS_* for z*inx. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2021-11-18RISC-V: Add mininal support for z[fdq]inxjiawei1-0/+12
Minimal support for zfinx, zdinx, zqinx. Like f/d/q, the zqinx imply zdinx and zdinx imply zfinx, where zfinx are not compatible with f/d/q. bfd/ChangeLog: * elfxx-riscv.c (riscv_implicit_subsets): Added implicit rules for z*inx extensions. (riscv_supported_std_z_ext): Added entries for z*inx. (riscv_parse_check_conflicts): Added conflict check for z*inx. Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2021-11-18Automatic date update in version.inGDB Administrator1-1/+1
2021-11-17aarch64: [SME] SVE2 instructions added to support SMEPrzemyslaw Wirkus17-191/+736
This patch is adding new SVE2 instructions added to support SME extension. The following SVE2 instructions are added by the SME architecture: * PSEL, * REVD, SCLAMP and UCLAMP. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_pred_reg_with_index): New parser. (parse_operands): New parser. * testsuite/gas/aarch64/sme-9-illegal.d: New test. * testsuite/gas/aarch64/sme-9-illegal.l: New test. * testsuite/gas/aarch64/sme-9-illegal.s: New test. * testsuite/gas/aarch64/sme-9.d: New test. * testsuite/gas/aarch64/sme-9.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operand AARCH64_OPND_SME_PnT_Wm_imm. opcodes/ChangeLog: * aarch64-asm.c (aarch64_ins_sme_pred_reg_with_index): New inserter. * aarch64-dis.c (aarch64_ext_sme_pred_reg_with_index): New extractor. * aarch64-opc.c (aarch64_print_operand): Printout of OPND_SME_PnT_Wm_imm. * aarch64-opc.h (enum aarch64_field_kind): New bitfields FLD_SME_Rm, FLD_SME_i1, FLD_SME_tszh, FLD_SME_tszl. * aarch64-tbl.h (OP_SVE_NN_BHSD): New qualifier. (OP_SVE_QMQ): New qualifier. (struct aarch64_opcode): New instructions PSEL, REVD, SCLAMP and UCLAMP. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
2021-11-17aarch64: [SME] Add new SME system registersPrzemyslaw Wirkus6-1/+72
This patch is adding miscellaneous SME related system registers. gas/ChangeLog: * testsuite/gas/aarch64/sme-sysreg.d: New test. * testsuite/gas/aarch64/sme-sysreg.s: New test. * testsuite/gas/aarch64/sme-sysreg-illegal.d: New test. * testsuite/gas/aarch64/sme-sysreg-illegal.l: New test. * testsuite/gas/aarch64/sme-sysreg-illegal.s: New test. opcodes/ChangeLog: * aarch64-opc.c: New system registers id_aa64smfr0_el1, smcr_el1, smcr_el12, smcr_el2, smcr_el3, smpri_el1, smprimap_el2, smidr_el1, tpidr2_el0 and mpamsm_el1.
2021-11-17aarch64: [SME] Add SME mode selection and state access instructionsPrzemyslaw Wirkus17-1522/+1766
This patch is adding new SME mode selection and state access instructions: * Add SMSTART and SMSTOP instructions. * Add SVCR system register. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_sm_za): New parser. (parse_operands): New parser. * testsuite/gas/aarch64/sme-8-illegal.d: New test. * testsuite/gas/aarch64/sme-8-illegal.l: New test. * testsuite/gas/aarch64/sme-8-illegal.s: New test. * testsuite/gas/aarch64/sme-8.d: New test. * testsuite/gas/aarch64/sme-8.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operand AARCH64_OPND_SME_SM_ZA. (enum aarch64_insn_class): New instruction classes sme_start and sme_stop. opcodes/ChangeLog: * aarch64-asm.c (aarch64_ins_pstatefield): New inserter. (aarch64_ins_sme_sm_za): New inserter. * aarch64-dis.c (aarch64_ext_imm): New extractor. (aarch64_ext_pstatefield): New extractor. (aarch64_ext_sme_sm_za): New extractor. * aarch64-opc.c (operand_general_constraint_met_p): New pstatefield value for SME instructions. (aarch64_print_operand): Printout for OPND_SME_SM_ZA. (SR_SME): New register SVCR. * aarch64-opc.h (F_REG_IN_CRM): New register endcoding. * aarch64-opc.h (F_IMM_IN_CRM): New immediate endcoding. (PSTATE_ENCODE_CRM): Encode CRm field. (PSTATE_DECODE_CRM): Decode CRm field. (PSTATE_ENCODE_CRM_IMM): Encode CRm immediate field. (PSTATE_DECODE_CRM_IMM): Decode CRm immediate field. (PSTATE_ENCODE_CRM_AND_IMM): Encode CRm and immediate field. * aarch64-tbl.h (struct aarch64_opcode): New SMSTART and SMSTOP instructions. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
2021-11-17aarch64: [SME] Add LD1x, ST1x, LDR and STR instructionsPrzemyslaw Wirkus26-245/+1417
This patch is adding new loads and stores defined by SME instructions. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_address): New parser. (parse_sme_za_hv_tiles_operand_with_braces): New parser. (parse_sme_za_array): New parser. (output_operand_error_record): Print error details if present. (parse_operands): Support new operands. * testsuite/gas/aarch64/sme-5-illegal.d: New test. * testsuite/gas/aarch64/sme-5-illegal.l: New test. * testsuite/gas/aarch64/sme-5-illegal.s: New test. * testsuite/gas/aarch64/sme-5.d: New test. * testsuite/gas/aarch64/sme-5.s: New test. * testsuite/gas/aarch64/sme-6-illegal.d: New test. * testsuite/gas/aarch64/sme-6-illegal.l: New test. * testsuite/gas/aarch64/sme-6-illegal.s: New test. * testsuite/gas/aarch64/sme-6.d: New test. * testsuite/gas/aarch64/sme-6.s: New test. * testsuite/gas/aarch64/sme-7-illegal.d: New test. * testsuite/gas/aarch64/sme-7-illegal.l: New test. * testsuite/gas/aarch64/sme-7-illegal.s: New test. * testsuite/gas/aarch64/sme-7.d: New test. * testsuite/gas/aarch64/sme-7.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operands. (enum aarch64_insn_class): Added sme_ldr and sme_str. (AARCH64_OPDE_UNTIED_IMMS): New operand error kind. opcodes/ChangeLog: * aarch64-asm.c (aarch64_ins_sme_za_hv_tiles): New inserter. (aarch64_ins_sme_za_list): New inserter. (aarch64_ins_sme_za_array): New inserter. (aarch64_ins_sme_addr_ri_u4xvl): New inserter. * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): Added ins_sme_za_list, ins_sme_za_array and ins_sme_addr_ri_u4xvl. * aarch64-dis.c (aarch64_ext_sme_za_hv_tiles): New extractor. (aarch64_ext_sme_za_list): New extractor. (aarch64_ext_sme_za_array): New extractor. (aarch64_ext_sme_addr_ri_u4xvl): New extractor. * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): Added ext_sme_za_list, ext_sme_za_array and ext_sme_addr_ri_u4xvl. * aarch64-opc.c (operand_general_constraint_met_p): (aarch64_match_operands_constraint): Handle sme_ldr, sme_str and sme_misc. (aarch64_print_operand): New operands supported. * aarch64-tbl.h (OP_SVE_QUU): New qualifier. (OP_SVE_QZU): New qualifier. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
2021-11-17aarch64: [SME] Add ZERO instructionPrzemyslaw Wirkus13-140/+539
This patch is adding ZERO (a list of 64-bit element ZA tiles) instruction. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_list_of_64bit_tiles): New parser. (parse_operands): Handle OPND_SME_list_of_64bit_tiles. * testsuite/gas/aarch64/sme-4-illegal.d: New test. * testsuite/gas/aarch64/sme-4-illegal.l: New test. * testsuite/gas/aarch64/sme-4-illegal.s: New test. * testsuite/gas/aarch64/sme-4.d: New test. * testsuite/gas/aarch64/sme-4.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operand AARCH64_OPND_SME_list_of_64bit_tiles. opcodes/ChangeLog: * aarch64-opc.c (print_sme_za_list): New printing function. (aarch64_print_operand): Handle OPND_SME_list_of_64bit_tiles. * aarch64-opc.h (enum aarch64_field_kind): New bitfield FLD_SME_zero_mask. * aarch64-tbl.h (struct aarch64_opcode): New ZERO instruction. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
2021-11-17aarch64: [SME] Add MOV and MOVA instructionsPrzemyslaw Wirkus26-176/+952
This patch is adding new MOV (alias) and MOVA SME instruction. gas/ChangeLog: * config/tc-aarch64.c (enum sme_hv_slice): new enum. (struct reloc_entry): Added ZAH and ZAV registers. (parse_sme_immediate): Immediate parser. (parse_sme_za_hv_tiles_operand): ZA tile parser. (parse_sme_za_hv_tiles_operand_index): Index parser. (parse_operands): Added ZA tile parser calls. (REGNUMS): New macro. Regs with suffix. (REGSET16S): New macro. 16 regs with suffix. * testsuite/gas/aarch64/sme-2-illegal.d: New test. * testsuite/gas/aarch64/sme-2-illegal.l: New test. * testsuite/gas/aarch64/sme-2-illegal.s: New test. * testsuite/gas/aarch64/sme-2.d: New test. * testsuite/gas/aarch64/sme-2.s: New test. * testsuite/gas/aarch64/sme-2a.d: New test. * testsuite/gas/aarch64/sme-2a.s: New test. * testsuite/gas/aarch64/sme-3-illegal.d: New test. * testsuite/gas/aarch64/sme-3-illegal.l: New test. * testsuite/gas/aarch64/sme-3-illegal.s: New test. * testsuite/gas/aarch64/sme-3.d: New test. * testsuite/gas/aarch64/sme-3.s: New test. * testsuite/gas/aarch64/sme-3a.d: New test. * testsuite/gas/aarch64/sme-3a.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New enums AARCH64_OPND_SME_ZA_HV_idx_src and AARCH64_OPND_SME_ZA_HV_idx_dest. (struct aarch64_opnd_info): New ZA tile vector struct. opcodes/ChangeLog: * aarch64-asm.c (aarch64_ins_sme_za_hv_tiles): New inserter. * aarch64-asm.h (AARCH64_DECL_OPD_INSERTER): New inserter ins_sme_za_hv_tiles. * aarch64-dis.c (aarch64_ext_sme_za_hv_tiles): New extractor. * aarch64-dis.h (AARCH64_DECL_OPD_EXTRACTOR): New extractor ext_sme_za_hv_tiles. * aarch64-opc.c (aarch64_print_operand): Handle SME_ZA_HV_idx_src and SME_ZA_HV_idx_dest. * aarch64-opc.h (enum aarch64_field_kind): New enums FLD_SME_size_10, FLD_SME_Q, FLD_SME_V and FLD_SME_Rv. (struct aarch64_operand): Increase fields size to 5. * aarch64-tbl.h (OP_SME_BHSDQ_PM_BHSDQ): New qualifiers aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
2021-11-17aarch64: [SME] Add SME instructionsPrzemyslaw Wirkus17-134/+1423
Patch is adding new SME matrix instructions. Please note additional instructions will be added in following patches. gas/ChangeLog: * config/tc-aarch64.c (parse_sme_zada_operand): New parser. * config/tc-aarch64.c (parse_reg_with_qual): New reg parser. * config/tc-aarch64.c (R_ZA): New egister type. (parse_operands): New parser. * testsuite/gas/aarch64/sme-illegal.d: New test. * testsuite/gas/aarch64/sme-illegal.l: New test. * testsuite/gas/aarch64/sme-illegal.s: New test. * testsuite/gas/aarch64/sme.d: New test. * testsuite/gas/aarch64/sme.s: New test. * testsuite/gas/aarch64/sme-f64.d: New test. * testsuite/gas/aarch64/sme-f64.s: New test. * testsuite/gas/aarch64/sme-i64.d: New test. * testsuite/gas/aarch64/sme-i64.s: New test. include/ChangeLog: * opcode/aarch64.h (enum aarch64_opnd): New operands AARCH64_OPND_SME_ZAda_2b, AARCH64_OPND_SME_ZAda_3b and AARCH64_OPND_SME_Pm. (enum aarch64_insn_class): New instruction class sme_misc. opcodes/ChangeLog: * aarch64-opc.c (aarch64_print_operand): Print OPND_SME_ZAda_2b and OPND_SME_ZAda_3b operands. (verify_constraints): Handle OPND_SME_Pm. * aarch64-opc.h (enum aarch64_field_kind): New bit fields FLD_SME_ZAda_2b, FLD_SME_ZAda_3b and FLD_SME_Pm. * aarch64-tbl.h (OP_SME_ZADA_PN_PM_ZN_S): New qualifier set. (OP_SME_ZADA_PN_PM_ZN_D): New qualifier. (OP_SME_ZADA_PN_PM_ZN_ZM): New qualifier. (OP_SME_ZADA_S_PM_PM_S_S): New qualifier. (OP_SME_ZADA_D_PM_PM_D_D): New qualifier. (OP_SME_ZADA_S_PM_PM_H_H): New qualifier. (OP_SME_ZADA_S_PM_PM_B_B): New qualifier. (OP_SME_ZADA_D_PM_PM_H_H): New qualifier. (SME_INSN): New instruction macro. (SME_F64_INSN): New instruction macro. (SME_I64_INSN): New instruction macro. (SME_INSNC): New instruction macro. (struct aarch64_opcode): New SME instructions. aarch64-asm-2.c: Regenerate. aarch64-dis-2.c: Regenerate. aarch64-opc-2.c: Regenerate.
2021-11-17aarch64: [SME] Add +sme option to -marchPrzemyslaw Wirkus5-0/+33
This series of patches (tagged [SME]) add support for the Scalable Matrix Extension. Patch introduces new command line options: +sme, +sme-f64 and +sme-i64 to -march command line options. gas/ChangeLog: * NEWS: Updated docs. * config/tc-aarch64.c: New SME command line options. * doc/c-aarch64.texi: Update docs. include/ChangeLog: * opcode/aarch64.h (AARCH64_FEATURE_SME): New flag. (AARCH64_FEATURE_SME_F64): New flag. (AARCH64_FEATURE_SME_I64): New flag. opcodes/ChangeLog: * aarch64-tbl.h (SME): New feature object.
2021-11-17Set the default DLL chracteristics to 0 for Cygwin based targets.Jeremy Drake3-3/+23
* emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Set to 0 for Cygwin targets. * emultempl/pep.em (DEFAULT_DLL_CHARACTERISTICS): Likewise.
2021-11-17Fix the linker script parser so that it will recognise the PT_GNU_RELRO ↵Nick Clifton4-3/+24
segment type, and the linker itself so that it will gracefully handle being unable to assign any sections to such a segment. PR 28452 bfd * elf.c (assign_file_positions_for_non_load_sections): Replace assertion with a warning message. ld * ldgram.y: Add support for PT_GNU_RELRO and PT_GNU_PROPERTY. * ldgram.c: Regenerate.
2021-11-17[gdb/build, s390x] Fix build after gdbarch_tdep changesAndreas Arnez1-1/+1
Commit 345bd07cce33 ("gdb: fix gdbarch_tdep ODR violation") changes a declaration in s390-tdep.h from struct gdbarch_tdep { ... }; to struct s390_gdbarch_tdep : gdbarch_tdep { ... }; and now requires that gdbarch_tdep has been declared before. Which is usually the case, except when compiling s390-linux-nat.c, where s390-tdep.h is included before gdbarch.h. Thus the s390x build errors out with the compiler complaining about a missing class name after the colon. Fix this in s390-linux-nat.c, by including gdbarch.h before s390-tdep.h.
2021-11-17Expose the BTI BTYPE more explicitly in the registersLuis Machado2-0/+4
Augment the register description XML to expose the BTI BTYPE field contained in the CPSR register. It will be displayed like so: cpsr 0x60001000 [ EL=0 BTYPE=0 SSBS C Z ]
2021-11-17elfedit: Add --output-abiversion option to update ABIVERSIONH.J. Lu5-3/+83
* NEWS: Mention --output-abiversion. * elfedit.c (input_elf_abiversion): New. (output_elf_abiversion): Likewise. (update_elf_header): Update EI_ABIVERSION. (command_line_switch): Add OPTION_INPUT_ABIVERSION and OPTION_OUTPUT_ABIVERSION. (options): Add --input-abiversion and --output-abiversion. (usage): Likewise. (main): Handle --input-abiversion and --output-abiversion. * doc/binutils.texi: Document --input-abiversion and --output-abiversion. * testsuite/binutils-all/elfedit.exp: Run elfedit-6. * testsuite/binutils-all/elfedit-6.d: New file.
2021-11-17RISC-V: Support rvv extension with released version 1.0.Nelson Chu24-15/+6615
2021-11-17 Jim Wilson <jimw@sifive.com> Kito Cheng <kito.cheng@sifive.com> Nelson Chu <nelson.chu@sifive.com> This patch is porting from the following riscv github, https://github.com/riscv/riscv-binutils-gdb/tree/rvv-1.0.x And here is the vector spec, https://github.com/riscv/riscv-v-spec bfd/ * elfxx-riscv.c (riscv_implicit_subsets): Added imply rules of v, zve and zvl extensions. (riscv_supported_std_ext): Updated verison of v to 1.0. (riscv_supported_std_z_ext): Added zve and zvl extensions. (riscv_parse_check_conflicts): The zvl extensions need to enable either v or zve extension. (riscv_multi_subset_supports): Check the subset list to know if the INSN_CLASS_V and INSN_CLASS_ZVEF instructions are supported. gas/ * config/tc-riscv.c (enum riscv_csr_class): Added CSR_CLASS_V. (enum reg_class): Added RCLASS_VECR and RCLASS_VECM. (validate_riscv_insn): Check whether the rvv operands are valid. (md_begin): Initialize register hash for rvv registers. (macro_build): Added rvv operands when expanding rvv pseudoes. (vector_macro): Expand rvv macros into one or more instructions. (macro): Likewise. (my_getVsetvliExpression): Similar to my_getVsetvliExpression, but used for parsing vsetvli operands. (riscv_ip): Parse and encode rvv operands. Besides, The rvv loads and stores with EEW 64 cannot be used when zve32x is enabled. * testsuite/gas/riscv/priv-reg-fail-version-1p10.d: Updated -march to rv32ifv_zkr. * testsuite/gas/riscv/priv-reg-fail-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg-fail-version-1p9p1.d: Likewise. * testsuite/gas/riscv/priv-reg.s: Added rvv csr testcases. * testsuite/gas/riscv/priv-reg-version-1p10.d: Likewise. * testsuite/gas/riscv/priv-reg-version-1p11.d: Likewise. * testsuite/gas/riscv/priv-reg-version-1p9p1.d: Likewise. * testsuite/gas/riscv/march-imply-v.d: New testcase. * testsuite/gas/riscv/vector-insns-fail-zve32xf.d: Likewise. * testsuite/gas/riscv/vector-insns-fail-zve32xf.l: Likewise. * testsuite/gas/riscv/vector-insns-fail-zvl.d: Likewise. * testsuite/gas/riscv/vector-insns-fail-zvl.l: Likewise. * testsuite/gas/riscv/vector-insns-vmsgtvx.d: Likewise. * testsuite/gas/riscv/vector-insns-vmsgtvx.s: Likewise. * testsuite/gas/riscv/vector-insns-zero-imm.d: Likewise. * testsuite/gas/riscv/vector-insns-zero-imm.s: Likewise. * testsuite/gas/riscv/vector-insns.d: Likewise. * testsuite/gas/riscv/vector-insns.s: Likewise. include/ * opcode/riscv-opc.h: Defined mask/match encodings and csrs for rvv. * opcode/riscv.h: Defined rvv immediate encodings and fields. (enum riscv_insn_class): Added INSN_CLASS_V and INSN_CLASS_ZVEF. (INSN_V_EEW64): Defined. (M_VMSGE, M_VMSGEU): Added for the rvv pseudoes. opcodes/ * riscv-dis.c (print_insn_args): Dump the rvv operands. * riscv-opc.c (riscv_vecr_names_numeric): Defined rvv registers. (riscv_vecm_names_numeric): Likewise. (riscv_vsew): Likewise. (riscv_vlmul): Likewise. (riscv_vta): Likewise. (riscv_vma): Likewise. (match_vs1_eq_vs2): Added for rvv Vu operand. (match_vd_eq_vs1_eq_vs2): Added for rvv Vv operand. (riscv_opcodes): Added rvv v1.0 instructions.
2021-11-17gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow)Sergei Trofimovich1-9/+4
On gcc-12 build fails as: ../../gdbserver/../gdb/nat/linux-osdata.c: In function 'void linux_xfer_osdata_processes(buffer*)': ../../gdbserver/../gdb/nat/linux-osdata.c:330:39: error: '__builtin___sprintf_chk' may write a terminating nul past the end of the destination [-Werror=format-overflow=] 330 | sprintf (core_str, "%d", i); | ^ It's an off-by-one case in an infeasible scenario for negative huge core count. The change switches to std::string for memory handling. Tested by running 'info os processes' and checking CPU cores column.
2021-11-16gdb: Add aliases for read_core_file_mappings callbacksAaron Merey7-37/+46
Add aliases read_core_file_mappings_loop_ftype and read_core_file_mappings_pre_loop_ftype. Intended for use with read_core_file_mappings. Also add build_id parameter to read_core_file_mappings_loop_ftype.
2021-11-16sim: testsuite: add support for $pwd replacementsMike Frysinger19-20/+18
Extend the common test framework to support $pwd replacements in settings. This allows replacing the custom cris @exedir@ with it.
2021-11-16sim: cris: replace @srcdir@ test extension with $srcdir/$subdirMike Frysinger6-11/+9
The common framework supports $srcdir & $subdir replacements already, so replace the custom @srcdir@ logic with those. Since the replace happens in slurp_options that cris already uses, we don't have any logic to port over there. We have to duplicate that into the cris slurp_rv helper though.
2021-11-16sim: cris: drop custom "dynamic" test fieldMike Frysinger7-17/+0
This tag is used to force tests to be built dynamically (i.e. without -static linking). This is because cris-sim.exp in dejagnu turns on static linking in ldflags. The default configs and runtest flags shouldn't load these boards. If these settings are still needed, we should figure out a different way of suppressing the stock settings wholesale. We want these to all pass out of the box with little to no configuration so that they can run in a multitarget build. With dropping "dynamic", it'll be easier to merge the custom cris test logic with the common sim test logic.
2021-11-16sim: testsuite: add more silent build rulesMike Frysinger2-4/+16
site.exp is still verbose, but that comes from automake, so have to get it fixed upstream.
2021-11-17Automatic date update in version.inGDB Administrator1-1/+1
2021-11-16sim: cr16: fix build on gcc-12 (NULL comparison)Sergei Trofimovich2-4/+3
On gcc-12 build fails as: sim/cr16/interp.c: In function 'lookup_hash': sim/cr16/interp.c:89:25: error: the comparison will always evaluate as 'true' for the address of 'mnimonic' will never be NULL [-Werror=address] 89 | if ((h->ops->mnimonic != NULL) && | ^~ 'mnimonic' is a sharr array within ops. It can never be NULL. While at it renamed 'mnimonic' to 'mnemonic'.
2021-11-16gdb: fix length of array view returned by some value_contents functionsSimon Marchi1-3/+3
In commit 50888e42dcd3 ("gdb: change functions returning value contents to use gdb::array_view"), I believe I made a mistake with the length of the array views returned by some functions. All functions return a view of `TYPE_LENGTH (value_type (type))` length. This is not correct when the value's enclosing type is larger than the value's type. In that case, the value's contents buffer is of the size of the enclosing type, and the value's actual contents is a slice of that (as returned by value_contents). So, functions value_contents_all_raw, value_contents_for_printing and value_contents_for_printing_const are not correct. Since they are meant to return the value's contents buffer as a whole, they should have the size of the enclosing type. There is nothing that uses the returned array view size at the moment, so this didn't cause a problem. But it became apparent when trying to adjust some callers. Change-Id: Ib4e8837e1069111d2b2784d3253d5f3002419e68
2021-11-16readelf: Support SHT_RELR/DT_RELR for -rFangrui Song6-30/+153
The -r output for SHT_RELR looks like: Relocation section '.relr.dyn' at offset 0x530 contains 4 entries: 7 offsets 00000000000028c0 00000000000028c8 0000000000003ad0 0000000000003ad8 0000000000003ae0 0000000000003ae8 0000000000003af0 For --use-dynamic, the header looks like 'RELR' relocation section at offset 0x530 contains 32 bytes: include/ * elf/common.h (DT_ENCODING): Bump to 38. * elf/external.h (Elf32_External_Relr): New. (Elf64_External_Relr): New. binutils/ * readelf.c (enum relocation_type): New. (slurp_relr_relocs): New. (dump_relocations): Change is_rela to rel_type. Dump RELR. (dynamic_relocations): Add DT_RELR. (process_relocs): Check SHT_RELR and DT_RELR. (process_dynamic_section): Store into dynamic_info for DT_RELR/DT_RELRENT/DT_RELRSZ.
2021-11-16gdbsupport: remove FUNCTION_NAMESimon Marchi3-40/+3
__func__ is standard C++11: https://en.cppreference.com/w/cpp/language/function Also, in C++11, __func__ expands to the demangled function name, so the mention in the comment above FUNCTION_NAME doesn't apply anymore. Finally, in places where FUNCTION_NAME is used, I think it's enough to print the function name, no need to print the whole signature. Therefore, I propose to just remove FUNCTION_NAME and update users to use the standard __func__. Change-Id: I778f28155422b044402442dc18d42d0cded1017d
2021-11-16gdb/gdbsupport: make xstrprintf and xstrvprintf return a unique_ptrAndrew Burgess34-151/+119
The motivation is to reduce the number of places where unmanaged pointers are returned from allocation type routines. All of the callers are updated. There should be no user visible changes after this commit.
2021-11-16gdbsupport: move xfree into its own fileAndrew Burgess4-16/+43
In the next commit I'd like to reference gdb_unique_ptr within the common-utils.h file. However, this requires that I include gdb_unique_ptr.h, which requires that xfree be defined. Interestingly, gdb_unique_ptr.h doesn't actually include anything that defines xfree, but I was finding that when I added a gdb_unique_ptr.h include to common-utils.h I was getting a dependency cycle; before my change xfree was defined when gdb_unique_ptr.h was processed, while after my change it was not, and this made g++ unhappy. To break this cycle, I propose to move xfree into its own header file, gdb-xfree.h, which I'll then include into gdb_unique_ptr.h and common-utils.cc.
2021-11-16gdb: throw OPTIMIZED_OUT_ERROR rather than GENERIC_ERRORAndrew Burgess1-2/+3
While reviewing this patch: https://sourceware.org/pipermail/gdb-patches/2021-November/183227.html I spotted that the patch could be improved if we threw OPTIMIZED_OUT_ERROR rather than GENERIC_ERROR in a few places. This commit updates error_value_optimized_out and require_not_optimized_out to throw OPTIMIZED_OUT_ERROR. I ran the testsuite and saw no regressions. This doesn't really surprise me, we don't usually write code like: catch (const gdb_exception_error &ex) { (if ex.error == GENERIC_ERROR) ... else ... } There are a three places where we write something like: catch (const gdb_exception_error &ex) { (if ex.error == OPTIMIZED_OUT_ERROR) ... } In frame.c:unwind_pc, stack.c:info_frame_command_core, and value.c:value_optimized_out, but if we are hitting these cases then it's not significantly changing GDB's behaviour.
2021-11-16Remove config.cache in gdbserver's "distclean"Tom Tromey1-2/+1
PR gdb/28586 points out that "make distclean" fails to delete config.cache from gdbserver/. This patch fixes the bug, and removes a duplicate "Makefile" deletion that was also pointed out in the PR.
2021-11-16[gdb/testsuite] Remove inferior output in gdb.base/foll-vfork.expTom de Vries4-12/+11
Test-case gdb.base/foll-vfork.exp has inferior output that is not needed, but which makes the regexp matching more difficult (see commit 1f28b70def1 "[gdb/testsuite] Fix regexp in gdb.base/foll-vfork.exp"). Remove the inferior output, and revert commit 1f28b70def1 to make the matching more restrictive. Tested on x86_64-linux.
2021-11-16x86: Don't allow KMOV in TLS code sequencesH.J. Lu6-5/+35
Don't allow KMOV in TLS code sequences which require integer MOV instructions. PR target/28595 * config/tc-i386.c (match_template): Don't allow KMOV in TLS code sequences. * testsuite/gas/i386/i386.exp: Run inval-tls and x86-64-inval-tls tests. * testsuite/gas/i386/inval-tls.l: New file. * testsuite/gas/i386/inval-tls.s: Likewise. * testsuite/gas/i386/x86-64-inval-tls.l: Likewise. * testsuite/gas/i386/x86-64-inval-tls.s: Likewise.
2021-11-16sim: run: support concise env var settingsMike Frysinger2-2/+23
Support the same syntax as other common utilities where env vars can be specified before the program to be run without an explicit option. This behavior can be suppressed by using the -- marker.
2021-11-16sim: nrun: add --env-{set,unset,clear} command line optionsMike Frysinger5-10/+107
Provide explicit control over the program's environment with the basic set/unset/clear options. These are a bit clunky to use, but they're functional. The env set operation is split out into a separate function as it'll be used in the next commit. With these in place, we can adjust the custom cris testsuite to use the now standard options and not its one-off hack.
2021-11-16sim: syscall: hoist argc/argn/argnlen to common codeMike Frysinger2-33/+40
Now that the callback framework supports argv & envp, we can move the Blackfin implementation of these syscalls to the common code.
2021-11-16sim: syscall: fix argvlen & argv implementationMike Frysinger1-42/+50
Now that we have access to the argv & envp strings, finish implementing these syscalls. Delete unused variables, fix tbuf by incrementing the pointer instead of setting to the length, and make sure we don't write more data than the bufsize says is available.
2021-11-16sim: callback: expose argv & environMike Frysinger14-10/+79
Pass the existing strings data to the callbacks so that common libgloss syscalls can be implemented (which we'll do shortly).
2021-11-16sim: keep track of program environment stringsMike Frysinger14-7/+85
We've been passing the environment strings to sim_create_inferior, but most ports don't do anything with them. A few will use ad-hoc logic to stuff the stack for user-mode programs, but that's it. Let's formalize this across the board by storing the strings in the normal sim state. This will allow (in future commits) supporting more functionality in the run interface, and to unify some of the libgloss syscalls.
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