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-rw-r--r--sim/common/ChangeLog7
-rw-r--r--sim/common/sim-signal.c6
-rw-r--r--sim/mips/ChangeLog8
-rw-r--r--sim/mips/interp.c12
-rw-r--r--sim/mips/sim-main.h10
5 files changed, 25 insertions, 18 deletions
diff --git a/sim/common/ChangeLog b/sim/common/ChangeLog
index c879057..84c62b6 100644
--- a/sim/common/ChangeLog
+++ b/sim/common/ChangeLog
@@ -1,3 +1,10 @@
+Thu Nov 20 20:35:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * sim-signal.h: Start simulator signals at 64 so that host signal
+ numbers can be detected and reported.
+
+ * sim-signal.h (SIM_SIGFPE), sim-signal.h: Add signal.
+
Wed Nov 19 12:02:41 1997 Doug Evans <devans@seba.cygnus.com>
* callback.c (cb_host_to_target_stat): Fix return values.
diff --git a/sim/common/sim-signal.c b/sim/common/sim-signal.c
index 23d4c97..e546ae7 100644
--- a/sim/common/sim-signal.c
+++ b/sim/common/sim-signal.c
@@ -72,6 +72,12 @@ sim_signal_to_host (SIM_DESC sd, SIM_SIGNAL sig)
return SIGXCPU;
#endif
break;
+
+ case SIM_SIGFPE:
+#ifdef SIGXCPU
+ return SIGFPE;
+#endif
+ break;
}
sim_io_eprintf (sd, "sim_signal_to_host: unknown signal: %d\n", sig);
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index f6c4c1a..2b107c4 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,8 +1,12 @@
Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
- * sim-main.h (Config): New register.
+ * interp.c (signal_exception): Report internal errors with SIGABRT
+ not SIGQUIT.
- * interp.c (decode_coproc): Allow access to Config register.
+ * sim-main.h (C0_CONFIG): New register.
+ (signal.h): No longer include.
+
+ * interp.c (decode_coproc): Allow access C0_CONFIG to register.
Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index 49395f8..899cf86 100644
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1683,7 +1683,7 @@ signal_exception (SIM_DESC sd,
else
PC = cia;
sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, cia,
- sim_stopped, SIGTRAP);
+ sim_stopped, SIM_SIGTRAP);
default:
/* Store exception code into current exception id variable (used
@@ -1738,25 +1738,25 @@ signal_exception (SIM_DESC sd,
exception address on breakpoint operations. */
PC = EPC;
sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA,
- sim_stopped, SIGBUS);
+ sim_stopped, SIM_SIGBUS);
case ReservedInstruction:
case CoProcessorUnusable:
PC = EPC;
sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA,
- sim_stopped, SIGILL);
+ sim_stopped, SIM_SIGILL);
case IntegerOverflow:
case FPE:
sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA,
- sim_stopped, SIGFPE);
+ sim_stopped, SIM_SIGFPE);
case Trap:
case Watch:
case SystemCall:
PC = EPC;
sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA,
- sim_stopped, SIGTRAP);
+ sim_stopped, SIM_SIGTRAP);
case BreakPoint:
PC = EPC;
@@ -1766,7 +1766,7 @@ signal_exception (SIM_DESC sd,
default : /* Unknown internal exception */
PC = EPC;
sim_engine_halt (sd, STATE_CPU (sd, 0), NULL, NULL_CIA,
- sim_stopped, SIGQUIT);
+ sim_stopped, SIM_SIGABRT);
}
diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h
index c6f3ab2..fea63d9 100644
--- a/sim/mips/sim-main.h
+++ b/sim/mips/sim-main.h
@@ -72,16 +72,6 @@ typedef unsigned64 uword64;
/* Check if a value will fit within a halfword: */
#define NOTHALFWORDVALUE(v) ((((((uword64)(v)>>16) == 0) && !((v) & ((unsigned)1 << 15))) || (((((uword64)(v)>>32) == 0xFFFFFFFF) && ((((uword64)(v)>>16) & 0xFFFF) == 0xFFFF)) && ((v) & ((unsigned)1 << 15)))) ? (1 == 0) : (1 == 1))
-/* windows always looses */
-#include <signal.h>
-#ifndef SIGBUS
-#define SIGBUS SIGSEGV
-#endif
-#ifdef _WIN32
-#define SIGTRAP 5
-#define SIGQUIT 3
-#endif
-
/* Floating-point operations: */