diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/moxie/ChangeLog | 4 | ||||
| -rw-r--r-- | sim/moxie/interp.c | 20 |
2 files changed, 22 insertions, 2 deletions
diff --git a/sim/moxie/ChangeLog b/sim/moxie/ChangeLog index f168fc6..d3331c6 100644 --- a/sim/moxie/ChangeLog +++ b/sim/moxie/ChangeLog @@ -1,3 +1,7 @@ +2014-12-12 Anthony Green <green@moxielogic.com> + + * interp.c (sim_resume): Add zex instructions. + 2014-08-19 Alan Modra <amodra@gmail.com> * configure: Regenerate. diff --git a/sim/moxie/interp.c b/sim/moxie/interp.c index 4362c66..fdb6528 100644 --- a/sim/moxie/interp.c +++ b/sim/moxie/interp.c @@ -604,8 +604,24 @@ sim_resume (sd, step, siggnal) cpu.asregs.regs[a] = (int) bv; } break; - case 0x12: /* bad */ - case 0x13: /* bad */ + case 0x12: /* zex.b */ + { + int a = (inst >> 4) & 0xf; + int b = inst & 0xf; + signed char bv = cpu.asregs.regs[b]; + TRACE("zex.b"); + cpu.asregs.regs[a] = (int) bv & 0xff; + } + break; + case 0x13: /* zex.s */ + { + int a = (inst >> 4) & 0xf; + int b = inst & 0xf; + signed short bv = cpu.asregs.regs[b]; + TRACE("zex.s"); + cpu.asregs.regs[a] = (int) bv & 0xffff; + } + break; case 0x14: /* bad */ case 0x15: /* bad */ case 0x16: /* bad */ |