diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/m68hc11/ChangeLog | 6 | ||||
| -rw-r--r-- | sim/m68hc11/dv-m68hc11.c | 9 | ||||
| -rw-r--r-- | sim/m68hc11/interp.c | 9 |
3 files changed, 23 insertions, 1 deletions
diff --git a/sim/m68hc11/ChangeLog b/sim/m68hc11/ChangeLog index 3f8c0bd..03f491f 100644 --- a/sim/m68hc11/ChangeLog +++ b/sim/m68hc11/ChangeLog @@ -1,3 +1,9 @@ +2002-08-13 Stephane Carrez <Stephane.Carrez@nerim.fr> + + * interp.c (sim_hw_configure): Connect port-X to cpu-write-port. + * dv-m68hc11.c (m68hc11cpu_ports): Add cpu-write-port input. + (m68hc11cpu_port_event): Handle CPU_WRITE_PORT event. + 2002-08-13 Marko Kohtala <marko.kohtala@luukku.com> * dv-m68hc11.c (m68hc11cpu_io_write): Fix to update IO mapping diff --git a/sim/m68hc11/dv-m68hc11.c b/sim/m68hc11/dv-m68hc11.c index 2106429..49c33e3 100644 --- a/sim/m68hc11/dv-m68hc11.c +++ b/sim/m68hc11/dv-m68hc11.c @@ -1,6 +1,6 @@ /* dv-m68hc11.c -- CPU 68HC11&68HC12 as a device. Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc. - Written by Stephane Carrez (stcarrez@worldnet.fr) + Written by Stephane Carrez (stcarrez@nerim.fr) (From a driver model Contributed by Cygnus Solutions.) This program is free software; you can redistribute it and/or modify @@ -24,6 +24,7 @@ #include "sim-hw.h" #include "hw-main.h" #include "sim-options.h" +#include "hw-base.h" #include <limits.h> /* DEVICE @@ -159,6 +160,7 @@ enum { SET_PORT_A, SET_PORT_C, SET_PORT_D, + CPU_WRITE_PORT, PORT_A, PORT_B, PORT_C, @@ -178,6 +180,8 @@ static const struct hw_port_descriptor m68hc11cpu_ports[] = { { "set-port-c", SET_PORT_C, 0, input_port, }, { "set-port-d", SET_PORT_D, 0, input_port, }, + { "cpu-write-port", CPU_WRITE_PORT, 0, input_port, }, + /* Events generated for connection to other devices. */ { "cpu-reset", CPU_RESET_PORT, 0, output_port, }, @@ -532,6 +536,9 @@ m68hc11cpu_port_event (struct hw *me, m68hc11cpu_set_port (me, cpu, M6811_PORTD, level); break; + case CPU_WRITE_PORT: + break; + default: hw_abort (me, "bad switch"); break; diff --git a/sim/m68hc11/interp.c b/sim/m68hc11/interp.c index 03b6db7..eee7429 100644 --- a/sim/m68hc11/interp.c +++ b/sim/m68hc11/interp.c @@ -229,6 +229,10 @@ sim_hw_configure (SIM_DESC sd) sim_hw_parse (sd, "/m68hc11/m68hc11eepr/reg 0xb000 512"); sim_hw_parse (sd, "/m68hc11 > cpu-reset reset /m68hc11/m68hc11eepr"); } + sim_hw_parse (sd, "/m68hc11 > port-a cpu-write-port /m68hc11"); + sim_hw_parse (sd, "/m68hc11 > port-b cpu-write-port /m68hc11"); + sim_hw_parse (sd, "/m68hc11 > port-c cpu-write-port /m68hc11"); + sim_hw_parse (sd, "/m68hc11 > port-d cpu-write-port /m68hc11"); cpu->hw_cpu = sim_hw_parse (sd, "/m68hc11"); } else @@ -256,6 +260,7 @@ sim_hw_configure (SIM_DESC sd) /* M68hc11 Timer configuration. */ sim_hw_parse (sd, "/m68hc12/m68hc12tim/reg 0x1b 0x5"); sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12tim"); + sim_hw_parse (sd, "/m68hc12 > capture capture /m68hc12/m68hc12tim"); } /* Create the SPI device. */ @@ -277,6 +282,10 @@ sim_hw_configure (SIM_DESC sd) sim_hw_parse (sd, "/m68hc12 > cpu-reset reset /m68hc12/m68hc12eepr"); } + sim_hw_parse (sd, "/m68hc12 > port-a cpu-write-port /m68hc12"); + sim_hw_parse (sd, "/m68hc12 > port-b cpu-write-port /m68hc12"); + sim_hw_parse (sd, "/m68hc12 > port-c cpu-write-port /m68hc12"); + sim_hw_parse (sd, "/m68hc12 > port-d cpu-write-port /m68hc12"); cpu->hw_cpu = sim_hw_parse (sd, "/m68hc12"); } return 0; |