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-rw-r--r--sim/d10v/ChangeLog7
-rw-r--r--sim/d10v/d10v_sim.h1
-rw-r--r--sim/d10v/simops.c2
-rw-r--r--sim/testsuite/d10v-elf/.Sanitize1
-rw-r--r--sim/testsuite/d10v-elf/ChangeLog7
-rw-r--r--sim/testsuite/d10v-elf/Makefile.in1
-rw-r--r--sim/testsuite/d10v-elf/t-mvtc.s53
7 files changed, 72 insertions, 0 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index 68bca21..91d0bb4 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -1,3 +1,10 @@
+Thu Dec 4 16:51:02 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * d10v_sim.h (struct _state): Add DM - PSW debug mask.
+
+ * simops.c (OP_5600): For "mvtc", save PSW.DM.
+ (OP_5200): Ditto for "mvfc".
+
Wed Dec 3 17:27:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
* d10v_sim.h (SEXT56): Define.
diff --git a/sim/d10v/d10v_sim.h b/sim/d10v/d10v_sim.h
index 2f9e72b..1fd2d8a 100644
--- a/sim/d10v/d10v_sim.h
+++ b/sim/d10v/d10v_sim.h
@@ -82,6 +82,7 @@ struct _state
uint8 SM;
uint8 EA;
uint8 DB;
+ uint8 DM;
uint8 IE;
uint8 RP;
uint8 MD;
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index 723a7d9..b085c14 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -1711,6 +1711,7 @@ OP_5200 ()
if (State.SM) PSW |= 0x8000;
if (State.EA) PSW |= 0x2000;
if (State.DB) PSW |= 0x1000;
+ if (State.DM) PSW |= 0x800;
if (State.IE) PSW |= 0x400;
if (State.RP) PSW |= 0x200;
if (State.MD) PSW |= 0x100;
@@ -1767,6 +1768,7 @@ OP_5600 ()
State.SM = (PSW & 0x8000) ? 1 : 0;
State.EA = (PSW & 0x2000) ? 1 : 0;
State.DB = (PSW & 0x1000) ? 1 : 0;
+ State.DM = (PSW & 0x800) ? 1 : 0;
State.IE = (PSW & 0x400) ? 1 : 0;
State.RP = (PSW & 0x200) ? 1 : 0;
State.MD = (PSW & 0x100) ? 1 : 0;
diff --git a/sim/testsuite/d10v-elf/.Sanitize b/sim/testsuite/d10v-elf/.Sanitize
index 6c46ef1..dcdaad8 100644
--- a/sim/testsuite/d10v-elf/.Sanitize
+++ b/sim/testsuite/d10v-elf/.Sanitize
@@ -20,6 +20,7 @@ t-sub.s
t-subi.s
t-sub2w.s
t-mvtac.s
+t-mvtc.s
Things-to-lose:
diff --git a/sim/testsuite/d10v-elf/ChangeLog b/sim/testsuite/d10v-elf/ChangeLog
index 29be1fb..59e1d7e 100644
--- a/sim/testsuite/d10v-elf/ChangeLog
+++ b/sim/testsuite/d10v-elf/ChangeLog
@@ -1,3 +1,10 @@
+Thu Dec 4 16:56:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * t-macros.i: Add definitions for PSW bits.
+
+ * t-mvtc.s: New file.
+ * Makefile.in (TESTS): Update.
+
Wed Dec 3 16:35:24 1997 Andrew Cagney <cagney@b1.cygnus.com>
* t-rac.s: New files.
diff --git a/sim/testsuite/d10v-elf/Makefile.in b/sim/testsuite/d10v-elf/Makefile.in
index df43e19..07d22d2 100644
--- a/sim/testsuite/d10v-elf/Makefile.in
+++ b/sim/testsuite/d10v-elf/Makefile.in
@@ -42,6 +42,7 @@ TESTS = \
hello.hi \
t-mac.ok \
t-mvtac.ok \
+ t-mvtc.ok \
t-msbu.ok \
t-mulxu.ok \
t-rac.ok \
diff --git a/sim/testsuite/d10v-elf/t-mvtc.s b/sim/testsuite/d10v-elf/t-mvtc.s
new file mode 100644
index 0000000..ce2c1de
--- /dev/null
+++ b/sim/testsuite/d10v-elf/t-mvtc.s
@@ -0,0 +1,53 @@
+.include "t-macros.i"
+
+ start
+
+ loadpsw2 PSW_SM
+ checkpsw2 1 PSW_SM
+
+ loadpsw2 PSW_01
+ checkpsw2 2 0 ;; PSW_01
+
+ loadpsw2 PSW_EA
+ checkpsw2 3 PSW_EA
+
+ loadpsw2 PSW_DB
+ checkpsw2 4 PSW_DB
+
+ loadpsw2 PSW_DM
+ checkpsw2 5 PSW_DM
+
+ loadpsw2 PSW_IE
+ checkpsw2 6 PSW_IE
+
+ loadpsw2 PSW_RP
+ checkpsw2 7 PSW_RP
+
+ loadpsw2 PSW_MD
+ checkpsw2 8 PSW_MD
+
+ loadpsw2 PSW_FX|PSW_ST
+ checkpsw2 9 PSW_FX|PSW_ST
+
+ ;; loadpsw2 PSW_ST
+ ;; checkpsw2 10
+
+ loadpsw2 PSW_10
+ checkpsw2 11 0 ;; PSW_10
+
+ loadpsw2 PSW_11
+ checkpsw2 12 0 ;; PSW_11
+
+ loadpsw2 PSW_F0
+ checkpsw2 13 PSW_F0
+
+ loadpsw2 PSW_F1
+ checkpsw2 14 PSW_F1
+
+ loadpsw2 PSW_14
+ checkpsw2 15 0 ;; PSW_14
+
+ loadpsw2 PSW_C
+ checkpsw2 16 PSW_C
+
+ exit0