diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/mips/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/mips/mips.igen | 64 | ||||
| -rw-r--r-- | sim/mips/sim-main.h | 12 |
3 files changed, 72 insertions, 13 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index fab4c6e..77d658e 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,12 @@ +2004-04-29 Chris Demetriou <cgd@broadcom.com> + Richard Sandiford <rsandifo@redhat.com> + + * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD) + (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New. + * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide + separate implementations for mipsIV and mipsV. Use new macros to + determine whether the restrictions apply. + 2004-01-19 Chris Demetriou <cgd@broadcom.com> * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo) diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen index cfc2d6d..95ec575 100644 --- a/sim/mips/mips.igen +++ b/sim/mips/mips.igen @@ -238,13 +238,15 @@ // On the r3900, restriction (2) is not present, and restriction (3) is not // present for multiplication. // -// For now this code is paranoid. Historically the simulator -// enforced restrictions (2) and (3) for more ISAs and CPU types than -// necessary. Unfortunately, at least some MIPS IV and later parts' -// documentation describes them as having these hazards (e.g. vr5000), -// so they can't be removed for at leats MIPS IV. MIPS V hasn't been -// checked (since there are no known hardware implementations). -// +// Unfortunately, there seems to be some confusion about whether the last +// two restrictions should apply to "MIPS IV" as well. One edition of +// the MIPS IV ISA says they do, but references in later ISA documents +// suggest they don't. +// +// In reality, some MIPS IV parts, such as the VR5000 and VR5400, do have +// these restrictions, while others, like the VR5500, don't. To accomodate +// such differences, the MIPS IV and MIPS V version of these helper functions +// use auxillary routines to determine whether the restriction applies. // check_mf_cycles: // @@ -274,8 +276,6 @@ *mipsI: *mipsII: *mipsIII: -*mipsIV: -*mipsV: *vr4100: *vr5000: { @@ -287,6 +287,18 @@ } :function:::int:check_mt_hilo:hilo_history *history +*mipsIV: +*mipsV: +{ + signed64 time = sim_events_time (SD); + int ok = (! MIPS_MACH_HAS_MT_HILO_HAZARD (SD) + || check_mf_cycles (SD_, history, time, "MT")); + history->mt.timestamp = time; + history->mt.cia = CIA; + return ok; +} + +:function:::int:check_mt_hilo:hilo_history *history *mips32: *mips64: *r3900: @@ -350,8 +362,6 @@ *mipsI: *mipsII: *mipsIII: -*mipsIV: -*mipsV: *vr4100: *vr5000: { @@ -366,6 +376,21 @@ } :function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo +*mipsIV: +*mipsV: +{ + signed64 time = sim_events_time (SD); + int ok = (! MIPS_MACH_HAS_MULT_HILO_HAZARD (SD) + || (check_mf_cycles (SD_, hi, time, "OP") + && check_mf_cycles (SD_, lo, time, "OP"))); + hi->op.timestamp = time; + lo->op.timestamp = time; + hi->op.cia = CIA; + lo->op.cia = CIA; + return ok; +} + +:function:::int:check_mult_hilo:hilo_history *hi, hilo_history *lo *mips32: *mips64: *r3900: @@ -389,8 +414,6 @@ *mipsI: *mipsII: *mipsIII: -*mipsIV: -*mipsV: *vr4100: *vr5000: *r3900: @@ -406,6 +429,21 @@ } :function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo +*mipsIV: +*mipsV: +{ + signed64 time = sim_events_time (SD); + int ok = (! MIPS_MACH_HAS_DIV_HILO_HAZARD (SD) + || (check_mf_cycles (SD_, hi, time, "OP") + && check_mf_cycles (SD_, lo, time, "OP"))); + hi->op.timestamp = time; + lo->op.timestamp = time; + hi->op.cia = CIA; + lo->op.cia = CIA; + return ok; +} + +:function:::int:check_div_hilo:hilo_history *hi, hilo_history *lo *mips32: *mips64: { diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index 2f3ffa4..96a86e9 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -953,6 +953,18 @@ extern int mips_mach_multi(SIM_DESC sd); #define MIPS_MACH(SD) MIPS_MACH_DEFAULT #endif +/* Macros for determining whether a MIPS IV or MIPS V part is subject + to the hi/lo restrictions described in mips.igen. */ + +#define MIPS_MACH_HAS_MT_HILO_HAZARD(SD) \ + (MIPS_MACH (SD) != bfd_mach_mips5500) + +#define MIPS_MACH_HAS_MULT_HILO_HAZARD(SD) \ + (MIPS_MACH (SD) != bfd_mach_mips5500) + +#define MIPS_MACH_HAS_DIV_HILO_HAZARD(SD) \ + (MIPS_MACH (SD) != bfd_mach_mips5500) + #if H_REVEALS_MODULE_P (SIM_MAIN_INLINE) #include "sim-main.c" #endif |