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-rw-r--r--sim/h8300/ChangeLog4
-rw-r--r--sim/h8300/compile.c50
2 files changed, 50 insertions, 4 deletions
diff --git a/sim/h8300/ChangeLog b/sim/h8300/ChangeLog
index f573246..ce54af3 100644
--- a/sim/h8300/ChangeLog
+++ b/sim/h8300/ChangeLog
@@ -1,3 +1,7 @@
+Mon Apr 8 23:58:49 1996 Jeffrey A Law (law@cygnus.com)
+
+ * compile.c (sim_resume): Fix overflow checks for ALU insns.
+
Fri Apr 5 17:20:59 1996 Jeffrey A Law (law@cygnus.com)
* compile.c (decode): Use "bit" to hold L_3 immediates instead
diff --git a/sim/h8300/compile.c b/sim/h8300/compile.c
index f55249e..7892dc6 100644
--- a/sim/h8300/compile.c
+++ b/sim/h8300/compile.c
@@ -1508,8 +1508,22 @@ sim_resume (step, siggnal)
just_flags_alu8:
n = res & 0x80;
nz = res & 0xff;
- v = ((ea & 0x80) == (rd & 0x80)) && ((ea & 0x80) != (res & 0x80));
c = (res & 0x100);
+ switch (code->opcode / 4)
+ {
+ case O_ADD:
+ v = ((rd & 0x80) == (ea & 0x80)
+ && (rd & 0x80) != (res & 0x80));
+ break;
+ case O_SUB:
+ case O_CMP:
+ v = ((rd & 0x80) != (-ea & 0x80)
+ && (rd & 0x80) != (res & 0x80));
+ break;
+ case O_NEG:
+ v = (rd == 0x80);
+ break;
+ }
goto next;
alu16:
@@ -1517,8 +1531,22 @@ sim_resume (step, siggnal)
just_flags_alu16:
n = res & 0x8000;
nz = res & 0xffff;
- v = ((ea & 0x8000) == (rd & 0x8000)) && ((ea & 0x8000) != (res & 0x8000));
c = (res & 0x10000);
+ switch (code->opcode / 4)
+ {
+ case O_ADD:
+ v = ((rd & 0x8000) == (ea & 0x8000)
+ && (rd & 0x8000) != (res & 0x8000));
+ break;
+ case O_SUB:
+ case O_CMP:
+ v = ((rd & 0x8000) != (-ea & 0x8000)
+ && (rd & 0x8000) != (res & 0x8000));
+ break;
+ case O_NEG:
+ v = (rd == 0x8000);
+ break;
+ }
goto next;
alu32:
@@ -1526,8 +1554,22 @@ sim_resume (step, siggnal)
just_flags_alu32:
n = res & 0x80000000;
nz = res & 0xffffffff;
- v = ((ea & 0x80000000) == (rd & 0x80000000))
- && ((ea & 0x80000000) != (res & 0x80000000));
+ switch (code->opcode / 4)
+ {
+ case O_ADD:
+ v = ((rd & 0x80000000) == (ea & 0x80000000)
+ && (rd & 0x80000000) != (res & 0x80000000));
+ break;
+ case O_SUB:
+ case O_CMP:
+ v = ((rd & 0x80000000) != (-ea & 0x80000000)
+ && (rd & 0x80000000) != (res & 0x80000000));
+ break;
+ case O_NEG:
+ v = (rd == 0x80000000);
+ break;
+ }
+ goto next;
switch (code->opcode / 4)
{
case O_ADD: