diff options
Diffstat (limited to 'sim')
| -rw-r--r-- | sim/bfin/ChangeLog | 9 | ||||
| -rw-r--r-- | sim/bfin/Makefile.in | 1 | ||||
| -rwxr-xr-x | sim/bfin/configure | 1 | ||||
| -rw-r--r-- | sim/bfin/configure.ac | 1 | ||||
| -rw-r--r-- | sim/bfin/dv-bfin_pfmon.c | 155 | ||||
| -rw-r--r-- | sim/bfin/dv-bfin_pfmon.h | 27 | ||||
| -rw-r--r-- | sim/bfin/machs.c | 2 |
7 files changed, 196 insertions, 0 deletions
diff --git a/sim/bfin/ChangeLog b/sim/bfin/ChangeLog index ba36f54..1a1b3ad 100644 --- a/sim/bfin/ChangeLog +++ b/sim/bfin/ChangeLog @@ -1,5 +1,14 @@ 2011-05-25 Mike Frysinger <vapier@gentoo.org> + * Makefile.in (dv-bfin_pfmon.o): New target. + * configure.ac (SIM_AC_OPTION_HARDWARE): Add bfin_pfmon. + * configure: Regenerated. + * dv-bfin_pfmon.c, dv-bfin_pfmon.h: New files. + * machs.c: Add include new bfin_pfmon.h. + (bfin_core_dev): Add pfmon. + +2011-05-25 Mike Frysinger <vapier@gentoo.org> + * machs.c (bf526_roms): Add a region with rev of 2. (bf54x_roms): Add regions with rev of 4. * bfroms/all.h: Include new bf526-0.2.h, bf54x-0.4.h, and diff --git a/sim/bfin/Makefile.in b/sim/bfin/Makefile.in index 2276c52..07dbaa1 100644 --- a/sim/bfin/Makefile.in +++ b/sim/bfin/Makefile.in @@ -85,6 +85,7 @@ dv-bfin_jtag.o: dv-bfin_jtag.c devices.h $(INCLUDE) dv-bfin_mmu.o: dv-bfin_mmu.c devices.h $(INCLUDE) dv-bfin_nfc.o: dv-bfin_nfc.c devices.h $(INCLUDE) dv-bfin_otp.o: dv-bfin_otp.c devices.h $(INCLUDE) +dv-bfin_pfmon.o: dv-bfin_pfmon.c devices.h $(INCLUDE) dv-bfin_pll.o: dv-bfin_pll.c devices.h $(INCLUDE) dv-bfin_ppi.o: dv-bfin_ppi.c devices.h $(INCLUDE) dv-bfin_rtc.o: dv-bfin_rtc.c devices.h $(INCLUDE) diff --git a/sim/bfin/configure b/sim/bfin/configure index c05f6d9..dc00be4 100755 --- a/sim/bfin/configure +++ b/sim/bfin/configure @@ -5093,6 +5093,7 @@ hardware="$hardware \ bfin_mmu \ bfin_nfc \ bfin_otp \ + bfin_pfmon \ bfin_pll \ bfin_ppi \ bfin_rtc \ diff --git a/sim/bfin/configure.ac b/sim/bfin/configure.ac index 6c03107..e19ab03 100644 --- a/sim/bfin/configure.ac +++ b/sim/bfin/configure.ac @@ -33,6 +33,7 @@ SIM_AC_OPTION_HARDWARE(yes,,\ bfin_mmu \ bfin_nfc \ bfin_otp \ + bfin_pfmon \ bfin_pll \ bfin_ppi \ bfin_rtc \ diff --git a/sim/bfin/dv-bfin_pfmon.c b/sim/bfin/dv-bfin_pfmon.c new file mode 100644 index 0000000..8b3e442 --- /dev/null +++ b/sim/bfin/dv-bfin_pfmon.c @@ -0,0 +1,155 @@ +/* Blackfin Performance Monitor model. + + Copyright (C) 2010-2011 Free Software Foundation, Inc. + Contributed by Analog Devices, Inc. + + This file is part of simulators. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#include "config.h" + +#include "sim-main.h" +#include "devices.h" +#include "dv-bfin_pfmon.h" + +/* XXX: This is mostly a stub. */ + +struct bfin_pfmon +{ + bu32 base; + + /* Order after here is important -- matches hardware MMR layout. */ + bu32 ctl; + bu32 _pad0[63]; + bu32 cntr0, cntr1; +}; +#define mmr_base() offsetof(struct bfin_pfmon, ctl) +#define mmr_offset(mmr) (offsetof(struct bfin_pfmon, mmr) - mmr_base()) + +static const char * const mmr_names[] = +{ + "PFCTL", [mmr_offset (cntr0)] = "PFCNTR0", "PFCNTR1", +}; +#define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>") + +static unsigned +bfin_pfmon_io_write_buffer (struct hw *me, const void *source, int space, + address_word addr, unsigned nr_bytes) +{ + struct bfin_pfmon *pfmon = hw_data (me); + bu32 mmr_off; + bu32 value; + bu32 *valuep; + + value = dv_load_4 (source); + mmr_off = addr - pfmon->base; + valuep = (void *)((unsigned long)pfmon + mmr_base() + mmr_off); + + HW_TRACE_WRITE (); + + switch (mmr_off) + { + case mmr_offset(ctl): + case mmr_offset(cntr0): + case mmr_offset(cntr1): + *valuep = value; + break; + default: + dv_bfin_mmr_invalid (me, addr, nr_bytes, true); + break; + } + + return nr_bytes; +} + +static unsigned +bfin_pfmon_io_read_buffer (struct hw *me, void *dest, int space, + address_word addr, unsigned nr_bytes) +{ + struct bfin_pfmon *pfmon = hw_data (me); + bu32 mmr_off; + bu32 value; + bu32 *valuep; + + mmr_off = addr - pfmon->base; + valuep = (void *)((unsigned long)pfmon + mmr_base() + mmr_off); + + HW_TRACE_READ (); + + switch (mmr_off) + { + case mmr_offset(ctl): + case mmr_offset(cntr0): + case mmr_offset(cntr1): + value = *valuep; + break; + default: + while (1) /* Core MMRs -> exception -> doesn't return. */ + dv_bfin_mmr_invalid (me, addr, nr_bytes, false); + break; + } + + dv_store_4 (dest, value); + + return nr_bytes; +} + +static void +attach_bfin_pfmon_regs (struct hw *me, struct bfin_pfmon *pfmon) +{ + address_word attach_address; + int attach_space; + unsigned attach_size; + reg_property_spec reg; + + if (hw_find_property (me, "reg") == NULL) + hw_abort (me, "Missing \"reg\" property"); + + if (!hw_find_reg_array_property (me, "reg", 0, ®)) + hw_abort (me, "\"reg\" property must contain three addr/size entries"); + + hw_unit_address_to_attach_address (hw_parent (me), + ®.address, + &attach_space, &attach_address, me); + hw_unit_size_to_attach_size (hw_parent (me), ®.size, &attach_size, me); + + if (attach_size != BFIN_COREMMR_PFMON_SIZE) + hw_abort (me, "\"reg\" size must be %#x", BFIN_COREMMR_PFMON_SIZE); + + hw_attach_address (hw_parent (me), + 0, attach_space, attach_address, attach_size, me); + + pfmon->base = attach_address; +} + +static void +bfin_pfmon_finish (struct hw *me) +{ + struct bfin_pfmon *pfmon; + + pfmon = HW_ZALLOC (me, struct bfin_pfmon); + + set_hw_data (me, pfmon); + set_hw_io_read_buffer (me, bfin_pfmon_io_read_buffer); + set_hw_io_write_buffer (me, bfin_pfmon_io_write_buffer); + + attach_bfin_pfmon_regs (me, pfmon); +} + +const struct hw_descriptor dv_bfin_pfmon_descriptor[] = +{ + {"bfin_pfmon", bfin_pfmon_finish,}, + {NULL, NULL}, +}; diff --git a/sim/bfin/dv-bfin_pfmon.h b/sim/bfin/dv-bfin_pfmon.h new file mode 100644 index 0000000..27a216e --- /dev/null +++ b/sim/bfin/dv-bfin_pfmon.h @@ -0,0 +1,27 @@ +/* Blackfin Performance Monitor model. + + Copyright (C) 2010-2011 Free Software Foundation, Inc. + Contributed by Analog Devices, Inc. + + This file is part of simulators. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see <http://www.gnu.org/licenses/>. */ + +#ifndef DV_BFIN_PFMON_H +#define DV_BFIN_PFMON_H + +#define BFIN_COREMMR_PFMON_BASE 0xFFE08000 +#define BFIN_COREMMR_PFMON_SIZE 0x108 + +#endif diff --git a/sim/bfin/machs.c b/sim/bfin/machs.c index 4a012bf..e893523 100644 --- a/sim/bfin/machs.c +++ b/sim/bfin/machs.c @@ -42,6 +42,7 @@ #include "dv-bfin_mmu.h" #include "dv-bfin_nfc.h" #include "dv-bfin_otp.h" +#include "dv-bfin_pfmon.h" #include "dv-bfin_pll.h" #include "dv-bfin_ppi.h" #include "dv-bfin_rtc.h" @@ -746,6 +747,7 @@ static const struct bfin_dev_layout bfin_core_dev[] = CORE_DEVICE (evt, EVT), CORE_DEVICE (jtag, JTAG), CORE_DEVICE (mmu, MMU), + CORE_DEVICE (pfmon, PFMON), CORE_DEVICE (trace, TRACE), CORE_DEVICE (wp, WP), }; |