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-rw-r--r--sim/d10v/ChangeLog1
-rw-r--r--sim/d10v/simops.c5
2 files changed, 6 insertions, 0 deletions
diff --git a/sim/d10v/ChangeLog b/sim/d10v/ChangeLog
index e597684..7b3b659 100644
--- a/sim/d10v/ChangeLog
+++ b/sim/d10v/ChangeLog
@@ -9,6 +9,7 @@ Mon Sep 9 13:27:26 1996 Michael Meissner <meissner@tiktok.cygnus.com>
(trace_{input,output}): Support OP_FLAG_OUTPUT.
(OP_31000000): This ld2w varient is a 16-bit memory reference, not
an 8-bit memory reference instruction for tracing purposes.
+ (OP_201): Addi needs to set the carry.
Fri Sep 6 17:56:17 1996 Martin M. Hunt <hunt@pizza.cygnus.com>
diff --git a/sim/d10v/simops.c b/sim/d10v/simops.c
index 1af4e09..b35a434 100644
--- a/sim/d10v/simops.c
+++ b/sim/d10v/simops.c
@@ -584,10 +584,15 @@ OP_17001202 ()
void
OP_201 ()
{
+ uint tmp = State.regs[OP[0]];
if (OP[1] == 0)
OP[1] = 16;
trace_input ("addi", OP_REG, OP_CONSTANT16, OP_VOID);
State.regs[OP[0]] += OP[1];
+ if (tmp > State.regs[OP[0]])
+ State.C = 1;
+ else
+ State.C = 0;
trace_output (OP_REG);
}