diff options
Diffstat (limited to 'sim/testsuite')
373 files changed, 0 insertions, 23128 deletions
diff --git a/sim/testsuite/.Sanitize b/sim/testsuite/.Sanitize deleted file mode 100644 index 8dbbe2f..0000000 --- a/sim/testsuite/.Sanitize +++ /dev/null @@ -1,151 +0,0 @@ -# .Sanitize for devo/sim/testsuite - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -r5900_files="mips64r5900-elf" -if ( echo $* | grep keep\-r5900 > /dev/null ) ; then - keep_these_too="${r5900_files} ${keep_these_too}" -else - lose_these_too="${r5900_files} ${lose_these_too}" -fi - -v850e_files="v850e-elf" -if ( echo $* | grep keep\-v850e > /dev/null ) ; then - keep_these_too="${v850e_files} ${keep_these_too}" -else - lose_these_too="${v850e_files} ${lose_these_too}" -fi - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -common -config -configure -configure.in -d10v-elf -d30v-elf -fr30-elf -lib -m32r-elf -mips64el-elf -sim - -Things-to-lose: - -tic80-coff -README - -Do-last: - -r5900_files="configure configure.in ChangeLog Makefile.in" -if ( echo $* | grep keep\-r5900 > /dev/null ) ; then - for i in $r5900_files ; do - if test ! -d $i && (grep sanitize-r5900 $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Keeping r5900 stuff in $i - fi - fi - done -else - for i in $r5900_files ; do - if test ! -d $i && (grep sanitize-r5900 $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Removing traces of \"r5900\" from $i... - fi - cp $i new - sed '/start\-sanitize\-r5900/,/end-\sanitize\-r5900/d' < $i > new - if [ -n "${safe}" -a ! -f .Recover/$i ] ; then - if [ -n "${verbose}" ] ; then - echo Caching $i in .Recover... - fi - mv $i .Recover - fi - mv new $i - fi - done -fi - -sky_files="configure configure.in ChangeLog" -if ( echo $* | grep keep\-sky > /dev/null ) ; then - for i in $sky_files ; do - if test ! -d $i && (grep sanitize-sky $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Keeping sky stuff in $i - fi - fi - done -else - for i in $sky_files ; do - if test ! -d $i && (grep sanitize-sky $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Removing traces of \"sky\" from $i... - fi - cp $i new - sed '/start\-sanitize\-sky/,/end-\sanitize\-sky/d' < $i > new - if [ -n "${safe}" -a ! -f .Recover/$i ] ; then - if [ -n "${verbose}" ] ; then - echo Caching $i in .Recover... - fi - mv $i .Recover - fi - mv new $i - fi - done -fi - -cygnus_files="configure configure.in ChangeLog" -if ( echo $* | grep keep\-cygnus > /dev/null ) ; then - for i in $cygnus_files ; do - if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Keeping cygnus stuff in $i - fi - fi - done -else - for i in $cygnus_files ; do - if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Removing traces of \"cygnus\" from $i... - fi - cp $i new - sed '/start\-sanitize\-cygnus/,/end-\sanitize\-cygnus/d' < $i > new - if [ -n "${safe}" -a ! -f .Recover/$i ] ; then - if [ -n "${verbose}" ] ; then - echo Caching $i in .Recover... - fi - mv $i .Recover - fi - mv new $i - fi - done -fi - -for i in * ; do - if test ! -d $i && (grep sanitize $i > /dev/null) ; then - echo '***' Some mentions of Sanitize are still left in $i! 1>&2 - fi -done - -# End of file. diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog deleted file mode 100644 index 17b1e25..0000000 --- a/sim/testsuite/ChangeLog +++ /dev/null @@ -1,836 +0,0 @@ -start-sanitize-sky -1998-12-31 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/t-cop2.s: Adjust vmtir instruction tests for new syntax. - * sim/sky/t-cop2.vuexpect: Matching changes. - -1998-12-30 Felix Lee <flee@cygnus.com> - - * sim/sky/sky-defs.tcl: various changes for remote host testing. - * sim/sky/mload.exp: ditto. - * sim/sky/sky_sce.exp: ditto. - * sim/sky/sky_sce_accurate.exp: ditto. - * sim/sky/sky_sce_fast.exp: ditto. - - * sim/sky/mload.exp: mark as unresolved on error. - -end-sanitize-sky -Fri Dec 18 17:19:34 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/ldres.cgs: New testcase. - * sim/fr30/copld.cgs: New testcase. - * sim/fr30/copst.cgs: New testcase. - * sim/fr30/copsv.cgs: New testcase. - * sim/fr30/nop.cgs: New testcase. - * sim/fr30/andccr.cgs: New testcase. - * sim/fr30/orccr.cgs: New testcase. - * sim/fr30/addsp.cgs: New testcase. - * sim/fr30/stilm.cgs: New testcase. - * sim/fr30/extsb.cgs: New testcase. - * sim/fr30/extub.cgs: New testcase. - * sim/fr30/extsh.cgs: New testcase. - * sim/fr30/extuh.cgs: New testcase. - * sim/fr30/enter.cgs: New testcase. - * sim/fr30/leave.cgs: New testcase. - * sim/fr30/xchb.cgs: New testcase. - * sim/fr30/dmovb.cgs: New testcase. - * sim/fr30/dmov.cgs: New testcase. - * sim/fr30/dmovh.cgs: New testcase. - -Thu Dec 17 17:18:43 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros. - * sim/fr30/ret.cgs: Add tests fir ret:d. - * sim/fr30/inte.cgs: New testcase. - * sim/fr30/reti.cgs: New testcase. - * sim/fr30/bra.cgs: New testcase. - * sim/fr30/bno.cgs: New testcase. - * sim/fr30/beq.cgs: New testcase. - * sim/fr30/bne.cgs: New testcase. - * sim/fr30/bc.cgs: New testcase. - * sim/fr30/bnc.cgs: New testcase. - * sim/fr30/bn.cgs: New testcase. - * sim/fr30/bp.cgs: New testcase. - * sim/fr30/bv.cgs: New testcase. - * sim/fr30/bnv.cgs: New testcase. - * sim/fr30/blt.cgs: New testcase. - * sim/fr30/bge.cgs: New testcase. - * sim/fr30/ble.cgs: New testcase. - * sim/fr30/bgt.cgs: New testcase. - * sim/fr30/bls.cgs: New testcase. - * sim/fr30/bhi.cgs: New testcase. - -start-sanitize-sky -Thu Dec 17 13:28:06 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/sce_test12.vuasm: Update syntax of MTIR insn. - * sim/sky/sce_test14.vuasm: Ditto. - * sim/sky/sce_test16.vuasm: Ditto. - * sim/sky/sce_test18.vuasm: Ditto. - * sim/sky/sce_test20.vuasm: Ditto. - * sim/sky/sce_test22.vuasm: Ditto. - * sim/sky/sce_test24.vuasm: Ditto. - * sim/sky/sce_test26.vuasm: Ditto. - * sim/sky/sce_test28.vuasm: Ditto. - * sim/sky/sce_test30.vuasm: Ditto. - * sim/sky/sce_test32.vuasm: Ditto. - * sim/sky/sce_test34.vuasm: Ditto. - * sim/sky/sce_test47.vuasm: Ditto. - -end-sanitize-sky -Tue Dec 15 17:47:13 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/div.cgs (int): Add signed division scenario. - * sim/fr30/int.cgs (int): Complete testcase. - * sim/fr30/testutils.inc (_start): Initialize tbr. - (test_s_user,test_s_system,set_i,test_i): New macros. - -1998-12-14 Doug Evans <devans@casey.cygnus.com> - - * lib/sim-defs.exp (run_sim_test): New option xerror, for expected - errors. Translate \n sequences in expected output to newline char. - (slurp_options): Make parentheses optional. - (sim_run): Look for board_info sim,options. - * sim/fr30/hello.ms: Add trailing \n to expected output. - * sim/m32r/hello.ms: Ditto. - * sim/m32r/hw-trap.ms: Ditto. - - * sim/m32r/trap.cgs: Properly align trap2_handler. - - * sim/m32r/uread16.ms: New testcase. - * sim/m32r/uread32.ms: New testcase. - * sim/m32r/uwrite16.ms: New testcase. - * sim/m32r/uwrite32.ms: New testcase. - -1998-12-14 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/call.cgs: Test ret here as well. - * sim/fr30/ld.cgs: Remove bogus comment. - * sim/fr30/testutils.inc (save_rp,restore_rp): New macros. - * sim/fr30/div.ms: New testcase. - * sim/fr30/st.cgs: New testcase. - * sim/fr30/sth.cgs: New testcase. - * sim/fr30/stb.cgs: New testcase. - * sim/fr30/mov.cgs: New testcase. - * sim/fr30/jmp.cgs: New testcase. - * sim/fr30/ret.cgs: New testcase. - * sim/fr30/int.cgs: New testcase. - -Thu Dec 10 18:46:25 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/div0s.cgs: New testcase. - * sim/fr30/div0u.cgs: New testcase. - * sim/fr30/div1.cgs: New testcase. - * sim/fr30/div2.cgs: New testcase. - * sim/fr30/div3.cgs: New testcase. - * sim/fr30/div4s.cgs: New testcase. - * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros. - -Tue Dec 8 13:16:53 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/testutils.inc (set_s_user): Correct Mask. - (set_s_system): Correct Mask. - * sim/fr30/ld.cgs (ld): Move previously failing test back - into place. - * sim/fr30/ldm0.cgs: New testcase. - * sim/fr30/ldm1.cgs: New testcase. - * sim/fr30/stm0.cgs: New testcase. - * sim/fr30/stm1.cgs: New testcase. - -Thu Dec 3 14:20:03 1998 Dave Brolley <brolley@cygnus.com> - - * sim/fr30/ld.cgs: Implement more loads. - * sim/fr30/call.cgs: New testcase. - * sim/fr30/testutils.inc (testr_h_dr): New macro. - (set_s_user,set_s_system): New macros. - - * sim/fr30: New Directory. - -Wed Nov 18 10:50:19 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * common/bits-gen.c (main): Add BYTE_ORDER so that it matches - recent sim/common/sim-basics.h changes. - * common/Makefile.in: Update. - -Fri Oct 30 00:37:31 1998 Felix Lee <flee@cygnus.com> - - * lib/sim-defs.exp (sim_run): download target program to remote - host, if necessary. for unix-driven win32 testing. - -start-sanitize-sky -Thu Oct 29 14:10:22 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/sky-defs.tcl: xfail certain tests due to changes in - constant value of VU register VF00yz. - -Tue Oct 13 13:01:24 EDT 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/t-cop2.*: Update tests for VRNEXT and VRGET - instructions, to match corrected operand synatx. - -Wed Sep 23 12:05:11 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (*): Converted some perl constructs to use - only perl 4 features. Remove junk whitespace before calling split() - for compatibility. - -Fri Sep 18 15:16:56 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/vu01reg-main.c (validate_ctrl): Only test bits of - statusflag that we're allowed to set. - * sim/sky/vu01reg.dvpasm (vumain1_ctrl): Set statusflag to 0xa80. - -Fri Sep 18 14:52:00 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (conv_vuasm): Convert incoming .float - constants to .word in perl to avoid gas processing. - -Fri Sep 18 13:16:21 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/t-dma.dmaexpect: Modified last line to expect that - DMA_Dn_CHCR__DIR be set to "1". Change required because of pr17171. - -Thu Sep 17 17:30:42 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (conv_vuasm): Handle DC.F construct - in parallel with lower VU insn. - -Wed Sep 16 15:12:38 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/sce_main.c (DMA_Dn_CHCR__{STR,TTE,MODE}: cleanup. - -Tue Sep 15 17:32:29 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (conv_vuasm): Support data segment - label addresses for ADDI instruction. - -Tue Sep 15 09:56:59 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/rw-vureg.c: Check that attempts to overwrite constant - VU registers (VF0, VI0) are futile. - - * sim/sky/sky-defs.tcl (run_l2s_test): Clean up all files left - behind by level2_gen.pl for passing level-2 test cases. - - * sim/sky/t-cop2.vuexpect: Update to match slightly changed - disassembly format from sky-libvpe. - -Tue Sep 15 01:08:40 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/vu01reg-main.c: Test vu1 control reg access. - * sim/sky/vu01reg.dvpasm: Ditto. - -Mon Sep 14 20:30:34 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/dma.h (DMA_Dn_CHCR__{STR,TTE,MODE}: cleanup. - * sim/sky/vu01reg-main.c: as above - * sim/sky/vureloc-main.c: as above - * sim/sky/t-int.c: Change setting of DMA DIRection flag. - -Mon Sep 14 15:33:15 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/dma.h (DMA_Dn_CHCR__{START,TIE,MODE}): New macros. - (DMA_Dn_CHCR__{MODE_NORM,MODE_CHAIN,DIR}): New macros. - * sim/sky/vu01reg-main.c: Specify DMA_Dn_CHCR__DIR. - * sim/sky/vureloc.c: Specify DMA_Dn_CHCR__DIR. - * sim/sky/sce_main.c: DMA_Dn_CHCR__START renamed from ...__DMA_START. - - * sim/sky/sky-defs.tcl (run_trc_test): Save old timeout before - clobbering it. - (run_brn_test): Set default timeout of 500 seconds. - -end-sanitize-sky -Tue Sep 15 14:56:22 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr. - * sim/m32r/rte.cgs: Test bbpc,bbpsw. - * sim/m32r/trap.cgs: Test bbpc,bbpsw. - -start-sanitize-sky -Wed Sep 9 14:42:24 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/pr17191.s: New file. - * sim/sky/pr17191.brn: New file. - * sim/sky/t-macros.inc: New file. - -Tue Sep 8 18:33:04 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/sce_main.c: PR17171: DMA_Dn_CHCR__DIR was not specified. - * sim/sky/t_dma.c: PR17171: DMA_Dn_CHCR__DIR was not specified. - -Thu Sep 3 10:27:04 EDT 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2.exp: Renamed back. - * sim/sky/sky-defs.tcl: Increased level-2 timeouts. - * sim/sky/level2_gen.pl: Use two passes to process incoming - assembly. Keep temporary files temporarily. - -Mon Aug 24 16:23:29 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/level2.exp: temporally renamed it to level2.test - -Thu Aug 20 14:29:29 1998 Patrick Macdonald <patrickm@cygnus.com> - - * sim/sky/t-gs.[trc|gsexpect]: new address modifications - -Thu Aug 20 10:50:15 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/refresh.dvpasm: change refreshe to refresha. - -Wed Aug 19 11:42:00 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/sky.exp: Disable these tests for target vpu-elf - (mips64el-skyb-elf). - -Tue Aug 18 17:31:30 1998 Jillian <jillian@cygnus.com> - - * sim/sky/[sky_sce scky_sce_accurate].exp: - Allow for the test of sce2_test*.dvpasm. - * fast_gs/sce2_test*.gsout: Add expected gs output - for the sce2_test cases. - -Tue Aug 18 17:27:10 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/fast_gs/sce2_test11.gsout: added file. - -Thu Aug 13 15:08:19 1998 Doug Evans <devans@canuck.cygnus.com> - - Add skyb support. - * sim/sky/*.dvpasm: Replace .section with section. - * sim/sky/sce_macros.s (section): New macro. - * sim/sky/sky-defs.tcl (run_brn_test): Handle test_on_skyb_p. - Pass -no-dma --defsym skyb_p=1 if skyb to dvp gas. Otherwise pass - --defsym skyb_p=0 to dvp gas. - * sim/sky/sky_sce.exp: Don't compile sce_main.c if skyb. - * sim/sky/sky_sce_accurate.exp: Ditto. - * sim/sky/t-cop2.brn: Don't run if skyb. - * sim/sky/t-cop2b.brn: Ditto. - * sim/sky/t-dma.brn: Ditto. - * sim/sky/t-int.brn: Ditto. - * sim/sky/vu01reg.brn: Ditto. - * sim/sky/vureloc.brn: Ditto. - * sim/sky/vureloc.dvpasm: Tweak .section usage. - * sim/sky/refresh.dvpasm: Issue a flushe first if skyb_p. - -Tue Aug 11 20:58:43 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/[sky sky_sce scky_sce_accurate].exp: - Allow for the new target mips64el-skyb-elf. - -Tue Aug 11 13:52:56 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/t-int-handler.s: Removed unneeded copy of interrupt - handler code. Store CAUSE register value. - * sim/sky/t-int.c: Store and confirm CAUSE value during interrupt. - -Tue Aug 11 13:57:50 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/sky_sce_accurate.exp: increase the timeout value - from 2000 to 3000 - -Fri Jul 31 17:49:13 1998 Felix Lee <flee@cygnus.com> - - * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of - writeonly. - -Thu Jul 30 16:39:37 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/t-cop2.{s,vuexpect}: Test two-operand VCLIP insn. - -Wed Jul 29 16:10:42 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (conv_vuasm): More similar tweaks. - * sim/sky/sky-defs.tcl: Force all tests to use vu1, since some test - cases exhaust vu0 memory resources. - -Wed Jul 29 01:06:03 1998 Felix Lee <flee@cygnus.com> - - * sim/sky/sky-defs.tcl (findperl): new function. we can't rely on - "#!perl" doing the right thing. - -end-sanitize-sky -start-sanitize-m32rx -Tue Jul 28 10:04:09 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/mulwhi-a.cgs: New testcase. - * sim/m32r/mulwlo-a.cgs: New testcase. - * sim/m32r/macwhi-a.cgs: New testcase. - * sim/m32r/macwlo-a.cgs: New testcase. - -end-sanitize-m32rx -Fri Jul 24 09:40:34 1998 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (clean,mostlyclean): Change leading spaces to a tab. - -start-sanitize-sky -Fri Jul 24 19:48:08 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (conv_vuasm): Add another pattern for - classifying data section word vs. float literals. - -Thu Jul 23 17:55:48 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl (conv_vuasm): Added new patterns for - translating more "level 2" test cases. Removed some patterns - that masked inconsistent assembler specifications. - (print_section): Use more reliable filtering for objdump results. - -Wed Jul 22 16:10:49 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2_gen.pl: Use kseg1 addresses in generated code. - Include some regexp tweaks to make more tosh test cases translate. - * sim/sky/sky-defs.tcl (run_l2s_test): Use sim --float-type - accurate and enlarge timeouts. - -Wed Jul 22 14:39:16 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/mload.exp: New test for multi-phase load. - * sim/sky/mload{kern,user}.c: Sample code for test. - -Tue Jul 21 18:44:57 1998 Ian Carmichael <iancarm@cygnus.com> - - * sim/sky/*: Many changes for MMU. Physical addresses now - referenced via kseg1 (0xa00000000) range. - -Fri Jul 17 16:53:11 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/level2.exp: New file, driver for VU "level 2" test - cases. - * sim/sky/level2_gen.pl: New file, strange assembler-to-C - translator. - * sim/sky/level2/*.s: Many many non-dvp assembler sources. - * sim/sky/sky-defs.tcl: Learn how to run these sources. - - * sim/sky/t-pke3.trc: Test one additional border condition. - -Fri Jul 17 13:57:50 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/fast_gs/*: forward fitting sky-980617 branch updates of - fast_gs. - * Makefile.in: Ensure make clean cleans off the intermediate files - generated by the sky testsuite (*.run, *.c, *.dif, *.*out ). - -Thu Jul 2 15:22:29 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/pr16213.[dvpasm|c|brn]: Add a PR test case. - -end-sanitize-sky -Wed Jul 1 15:57:54 1998 Doug Evans <devans@seba.cygnus.com> - - * sim/m32r/hw-trap.ms: New testcase. - -start-sanitize-sky -Wed Jun 24 19:09:03 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/t-cop2.vuexpect: Adapt to new disassembly format. - -Wed Jun 24 18:28:12 1998 Ian Carmichael <iancarm@cygnus.com> - - * sim/sky/fast_gs (*.gsout): Replace all files with - correct results for normal rounding mode ieee math. - -Wed Jun 24 18:16:00 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * sim/sky/t-int.c, sim/sky/t-int-handler.c: - Testcase errors: two in the former file, one in the latter. - -Wed Jun 24 17:35:00 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * Updated sim/sky/t-dma.c: It missed check-in earlier today. - -Wed Jun 24 17:12:07 1998 Ian Carmichael <iancarm@cygnus.com> - - * sim/sky/vu01reg.dvpasm: Fix testcase to handle temporary - back out of R_MIPS_DVP_11_S4 relocation. - -Wed Jun 24 11:24:32 1998 Ian Carmichael <iancarm@cygnus.com> - - * sim/sky/vu01reg.dvpasm: Change undefined MSCNT - instructions to "MSCAL 0". - -Wed Jun 24 11:34:00 EDT 1998 Jim Lemke <jlemke@cygnus.com> - - * Updated sim/sky/t-dma.{brn|dmaexpect} because a - warning msg being checked for contains an address - that differs between -mhard-float and -msoft-float. - -Fri Jun 19 17:57:50 1998 Jillian Ye <jillian@cygnus.com> - - * Created sim/sky/fast_gs and sim/sky/accurate_gs - for storing the gs output file for float-type fast - and accurate respectively; also added and moved - files for this purpose. - -Thu Jun 18 23:53:43 1998 Doug Evans <devans@seba.cygnus.com> - - * sim/sky/vureloc{.brn,-main.c,.dvpasm}: New files. - -Tue Jun 16 18:39:32 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/sky-defs.tcl: Use --sky-debug option instead of environment - variable to collect PKE traces. - -Tue Jun 16 18:33:37 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/sky_sce.exp: Removing sce2* and adding comments. - * sim/sky/sky_sce_fast.exp: Removing diff, sce2, and adding - comments. - -Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/sky-defs.tcl: passing timeout option to sim_run - * lib/sim-defs.exp : Print out timeout setting info when "-v" is used. - -Tue Jun 16 09:03:37 1998 Frank Ch. Eigler <fche@cygnus.com> - - * t-cop2.s: Reorder instruction blocks to prevent "Out of bounds" - messages during test execution. Added dummy branch labels for BC2* - instructions. - * t-cop2.brn: Use --sky-debug option instead of env var. - * t-cop2.vuexpect: Updated for with new disassembly format. - - * sky_sce_fast.exp: Don't compare GIF outputs for - --float-type=fast. - * sce_test{17,33,49}.dvpasm: Use ".DmaPackVif 1" option to - exercise assembler / PKE. - - * rw-vureg.c: Cast memcpy operand to allay warning. - -Mon Jun 15 15:34:10 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/sky_sce_fast.exp: New file for fast floating point mode of - SCEI test cases. - -Tue Jun 12 16:20:30 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/sky_sce.exp: Set the timeout for the sce visual testcases - to be 2000 sec (clock time). - * sim/sky/sky-defs.tcl: Accept the timeout set in brn file - by sky_sce.exp for the duration of the test, and restore - the original value after the test is done. - -Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/vu01reg-main.c: New file. - * sim/sky/vu01reg.dvpasm: New file. - * sim/sky/vu01reg.brn: New file. - - * sim/sky/vu.h (VU0_MEM1_WINDOW_START): New macro. - (VU0_MEM1_SIZE): New macro. - - * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options, - which is now a list of options controlling the behaviour of sim_run. - - * sim/sky/sky-defs.tcl (run_brn_test): Fix `options' arg to - sim_compile. Fix handling of dvpasm_flags. - (run_trc_test): Update to new way of environment variables to sim_run. - -Wed Jun 10 15:56:10 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/t-int.c: New file to test sky hardware - interrupts. - * sim/sky/t-int-handler.s: New file for null interrupt - handler. - * sim/sky/t-int.brn: New file to build new test. - -end-sanitize-sky -Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com> - - * sim/m32r/addx.cgs: Add another test. - * sim/m32r/jmp.cgs: Add another test. -start-sanitize-m32rx - * sim/m32r/bra8-2.cgs: New testcase. - * sim/m32r/hello.ms: Run on m32rx too. -end-sanitize-m32rx - -start-sanitize-sky -Tue Jun 9 16:30:16 1998 Jillian Ye <jillian@cygnus.com> - - * sky_sce.exp: Added the "diff -bitw" clause, - and turn on the "--enable-gs", "--float-type" options. - -Tue Jun 9 08:55:05 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/dma.h: New file. - * sim/sky/vif.h: New file. - * sim/sky/vu.h: New file. - * sim/sky/sce_main.c: Move magic numbers to .h files. - -end-sanitize-sky -Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/trap.cgs: Test trap 2. - -start-sanitize-sky -Fri Jun 03 11:22:33 1998 Patrick Macdonald <patrickm@cygnus.com> - - * sim/sky/t-gif4.[trc|gifexpect]: additional test for a PATH3 - pause - * sim/sky/t-gif6.[trc|gifexpect]: additional test for IMT ( non - multiple of 8) - -end-sanitize-sky -Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com> - - * lib/sim-defs.exp (sim_run): Add possible environment variable - list to simulator run. -start-sanitize-sky - * sim/sky/sky-defs.tcl: Use it. - - * sim/sky/t-pke2.vif1out: Update to match recent word-precise - tracking table change in sim/mips/sky-pke.c. - * sim/sky/t-pke3.trc: Ditto. - * sim/sky/t-pke4.vif0expect: Ditto. -end-sanitize-sky - -Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com> - - * Makefile.in: Take RUNTEST out of FLAG_TO_PASS - so that make check can be invoked recursively. - -start-sanitize-sky -Thu May 21 11:45:50 1998 Patrick Macdonald <patrickm@cygnus.com> - - * sim/sky/t-gif6.trc: IMT burst testcases - * sim/sky/t-gif6.gifexpect: IMT burst expected results - -Wed May 20 18:10:28 1998 Jillian Ye <jillian@cygnus.com> - - * sim/sky/c_gen.pl: Added subroutine "print_comment" - and on/off option for "src line #" - -Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/sky/sky.ld: Delete file. - -end-sanitize-sky -Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com> - - * config/default.exp (CC,SIM): Delete. -start-sanitize-sky - * sim/sky/sky-defs.tcl (LDSCRIPT,SIM): Delete. - (run_trc_test): Use sim_compile, sim_run. Only delete temp files - if testcase passed. - (run_brn_test): Ditto. - * sim/sky/sky.exp: Add runtest_file_p support. Don't print - unsupported message if not sky. - * sim/sky/sky_sce.exp: Likewise. -end-sanitize-sky - - * lib/sim-defs.exp (sim_run): Fix handling of output redirection. - New arg prog_opts. All callers updated. - -Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com> - - * Makefile.in: Made "check" the target of two - dependencies (test1, test2) so that test2 get a chance to - run even when test1 failed if "make -k check" is used. - -Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com> - - * lib/sim-defs.exp (sim_version): Simplify. - (sim_run): Implement. - (run_sim_test): Use sim_run. - (sim_compile): New proc. - -start-sanitize-sky -Thu May 7 12:30:59 1998 Patrick Macdonald <patrickm@cygnus.com> - - * sim/sky/sky-defs.tcl: add handling for gifexpect and gsexpect - * sim/sky/t-gif*.trc: GIF unit test cases - * sim/sky/t-gif*.gifexpect: GIF unit test expected results - * sim/sky/t-gs.trc: GS unit test case - * sim/sky/t-gs.gsexpect: GS unit test case expected result - -Mon May 4 17:49:56 1998 Frank Ch. Eigler <fche@cygnus.com> - - * sim/sky/sky-defs.tcl: New file, common dejagnu routine definitions. - * sim/sky/sky.exp: New file, quick dejagnu test driver. - * sim/sky/sky_sce.exp: New file, SCE dejagnu test driver. - * sim/sky/*.brn: New files, test fragment descriptions. - * sim/sky/OTHERS: Old test cases from sim/testsuite/sky. - -end-sanitize-sky -Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com> - -start-sanitize-sky - * configure.in (testdir): Don't use old sky test directory. - * configure: Regenerated - * sky/Makefile.in: swallow stderr on buggy tests -end-sanitize-sky - * config/default.exp: Added C compiler settings. - -Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS. - -Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com> - - * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails, - try all machs. - - * sim/m32r/addx.cgs: Test (-1)+(-1)+1. - -Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/mv[ft]achi.cgs: Fix expected result - (sign extension of top 8 bits). -start-sanitize-m32rx - * sim/m32r/mv[ft]achi-a.cgs: Ditto. -end-sanitize-m32rx - -start-sanitize-m32rx -Tue Apr 14 14:06:34 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/maclh1.cgs: Fix testcase. - * sim/m32r/maclh1-2.cgs: New testcase. - -Tue Mar 3 19:09:09 1998 Doug Evans <devans@canuck.cygnus.com> - - * sim/m32r/sat.cgs: Change sath to sat. - -end-sanitize-m32rx -Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com> - - * Makefile.in (RUNTEST): Fix path to runtest. - -start-sanitize-sky -Tue Feb 24 19:47:56 1998 Frank Ch. Eigler <fche@cygnus.com> - - * configure.in (testdir): Added sky subdir for mips64r5900-sky-elf - target. - * configure: Regenerate. -end-sanitize-sky - -Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com> - - * sim/m32r/unlock.cgs: Fixed test. - * sim/m32r/mvfc.cgs: Fixed test. - * sim/m32r/remu.cgs: Fixed test. - - * sim/m32r/bnc24.cgs: Test long BNC instruction. - * sim/m32r/bnc8.cgs: Test short BNC instruction. - * sim/m32r/ld-plus.cgs: Test LD instruction. - * sim/m32r/macwhi.cgs: Test MACWHI instruction. - * sim/m32r/macwlo.cgs: Test MACWLO instruction. - * sim/m32r/mulwhi.cgs: Test MULWHI instruction. - * sim/m32r/mulwlo.cgs: Test MULWLO instruction. - * sim/m32r/mvfachi.cgs: Test MVFACHI instruction. - * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction. - * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction. - * sim/m32r/addv.cgs: Test ADDV instruction. - * sim/m32r/addv3.cgs: Test ADDV3 instruction. - * sim/m32r/addx.cgs: Test ADDX instruction. - * sim/m32r/lock.cgs: Test LOCK instruction. - * sim/m32r/neg.cgs: Test NEG instruction. - * sim/m32r/not.cgs: Test NOT instruction. - * sim/m32r/unlock.cgs: Test UNLOCK instruction. -start-sanitize-m32rx - * sim/m32r/mvfachi-a.cgs: Test extended MVFACHI instruction. - * sim/m32r/mvfaclo-a.cgs: Test extended MVFACLO instruction. - * sim/m32r/mvtachi-a.cgs: Test extended MVTACHI instruction. - * sim/m32r/mvtaclo-a.cgs: Test extended MVTACLO instruction. -end-sanitize-m32rx -Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> - - * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an - address into a general register. - - * sim/m32r/or3.cgs: Test OR3 instruction. - * sim/m32r/rach.cgs: Test RACH instruction. - * sim/m32r/rem.cgs: Test REM instruction. - * sim/m32r/sub.cgs: Test SUB instruction. - * sim/m32r/mv.cgs: Test MV instruction. - * sim/m32r/mul.cgs: Test MUL instruction. - * sim/m32r/bl24.cgs: Test long BL instruction. - * sim/m32r/bl8.cgs: Test short BL instruction. - * sim/m32r/blez.cgs: Test BLEZ instruction. - * sim/m32r/bltz.cgs: Test BLTZ instruction. - * sim/m32r/bne.cgs: Test BNE instruction. - * sim/m32r/bnez.cgs: Test BNEZ instruction. - * sim/m32r/bra24.cgs: Test long BRA instruction. - * sim/m32r/bra8.cgs: Test short BRA instruction. - * sim/m32r/jl.cgs: Test JL instruction. - * sim/m32r/or.cgs: Test OR instruction. - * sim/m32r/jmp.cgs: Test JMP instruction. - * sim/m32r/and.cgs: Test AND instruction. - * sim/m32r/and3.cgs: Test AND3 instruction. - * sim/m32r/beq.cgs: Test BEQ instruction. - * sim/m32r/beqz.cgs: Test BEQZ instruction. - * sim/m32r/bgez.cgs: Test BGEZ instruction. - * sim/m32r/bgtz.cgs: Test BGTZ instruction. - * sim/m32r/cmp.cgs: Test CMP instruction. - * sim/m32r/cmpi.cgs: Test CMPI instruction. - * sim/m32r/cmpu.cgs: Test CMPU instruction. - * sim/m32r/cmpui.cgs: Test CMPUI instruction. - * sim/m32r/div.cgs: Test DIV instruction. - * sim/m32r/divu.cgs: Test DIVU instruction. - * sim/m32r/cmpeq.cgs: Test CMPEQ instruction. - * sim/m32r/sll.cgs: Test SLL instruction. - * sim/m32r/sll3.cgs: Test SLL3 instruction. - * sim/m32r/slli.cgs: Test SLLI instruction. - * sim/m32r/sra.cgs: Test SRA instruction. - * sim/m32r/sra3.cgs: Test SRA3 instruction. - * sim/m32r/srai.cgs: Test SRAI instruction. - * sim/m32r/srl.cgs: Test SRL instruction. - * sim/m32r/srl3.cgs: Test SRL3 instruction. - * sim/m32r/srli.cgs: Test SRLI instruction. - * sim/m32r/xor3.cgs: Test XOR3 instruction. - * sim/m32r/xor.cgs: Test XOR instruction. -start-sanitize-m32rx - * sim/m32r/jnc.cgs: Test JNC instruction. - * sim/m32r/jc.cgs: Test JC instruction. - * sim/m32r/cmpz.cgs: Test CMPZ instruction. - * sim/m32r/bcl24.cgs: Test long version of BCL instruction - * sim/m32r/bcl8.cgs: Test short BCL instruction. - * sim/m32r/bncl24.cgs: Test long BNCL instruction. - * sim/m32r/bncl8.cgs: Test short BNCL instruction. - * sim/m32r/divh.cgs: Test DIVH instruction. - * sim/m32r/rach-dsi.cgs: Test extended RACH instruction. -end-sanitize-m32rx -Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> - - * config/default.exp: New file. - * lib/sim-defs.exp: New file. - * sim/m32r/*: m32r dejagnu simulator testsuite. - - * Makefile.in (build_alias): Define. - (arch): Define. - (RUNTEST_FOR_TARGET): Delete. - (RUNTEST): Fix. - (check): Depend on site.exp. Run dejagnu. - (site.exp): New target. - * configure.in (arch): Define from target_cpu. - * configure: Regenerate. - -Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * common/bits-gen.c (gen_bit): Pass in the full name of the macro. - (gen_mask): Ditto. - - * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT. - (calc): Add support for 8 bit version of macros. - (main): Add tests for 8 bit versions of macros. - (check_sext): Check SEXT of zero clears bits. - - * common/bits-gen.c (main): Generate tests for 8 bit versions of - macros. - -Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * common/Make-common.in: New file, provide generic rules for - running checks. - -Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * configure.in (configdirs): Test for the target directory instead - of matching on a target. - -start-sanitize-r5900 -Tue Jul 15 13:43:20 1997 Andrew Cagney <cagney@sendai.cygnus.com> - - * configure.in (configdirs): Configure mips64vr5900el - directory. - * configure: Regenerate. - -end-sanitize-r5900 diff --git a/sim/testsuite/Makefile.in b/sim/testsuite/Makefile.in deleted file mode 100644 index 79d1b8e..0000000 --- a/sim/testsuite/Makefile.in +++ /dev/null @@ -1,196 +0,0 @@ -# Makefile for regression testing the GNU debugger. -# Copyright (C) 1997, 1998 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# GDB is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -VPATH = @srcdir@ -srcdir = @srcdir@ -prefix = @prefix@ -exec_prefix = @exec_prefix@ - -build_canonical = @build@ -build_alias = @build_alias@ -host_canonical = @host@ -host_alias = @host_alias@ -target_canonical = @target@ -target_alias = @target_alias@ -program_transform_name = @program_transform_name@ - -arch = @arch@ - -SHELL = /bin/sh -SUBDIRS = @subdirs@ -RPATH_ENVVAR = @RPATH_ENVVAR@ - -EXPECT = `if [ -f $${rootme}/../../expect/expect ] ; then \ - echo $${rootme}/../../expect/expect ; \ - else echo expect ; fi` - -RUNTEST = `if [ -f $${srcdir}/../dejagnu/runtest ] ; then \ - echo $${srcdir}/../dejagnu/runtest ; else echo runtest; \ - fi` -RUNTESTFLAGS = - -SCHEME = @SCHEME@ -SCHEMEFLAGS = -s -CGENDIR = $(srcdir)/../../cgen -CGENFLAGS = -v - -CGENFILES = $(CGENDIR)/object.scm $(CGENDIR)/utils.scm \ - $(CGENDIR)/utils-cgen.scm $(CGENDIR)/cpu.scm \ - $(CGENDIR)/mode.scm $(CGENDIR)/mach.scm \ - $(CGENDIR)/ifield.scm $(CGENDIR)/iformat.scm \ - $(CGENDIR)/operand.scm $(CGENDIR)/insn.scm \ - $(CGENDIR)/opcodes.scm $(CGENDIR)/sem-ccode.scm \ - $(CGENDIR)/sim-test.scm $(CGENDIR)/cgen-stest.scm - -#### host, target, and site specific Makefile frags come in here. - -# The use of $$(x_FOR_TARGET) reduces the command line length by not -# duplicating the lengthy definition. - -TARGET_FLAGS_TO_PASS = \ - "prefix=$(prefix)" \ - "exec_prefix=$(exec_prefix)" \ - "against=$(against)" \ - 'CC=$$(CC_FOR_TARGET)' \ - "CC_FOR_TARGET=$(CC_FOR_TARGET)" \ - "CFLAGS=$(TESTSUITE_CFLAGS)" \ - "CHILLFLAGS=$(CHILLFLAGS)" \ - 'CHILL=$$(CHILL_FOR_TARGET)' \ - "CHILL_FOR_TARGET=$(CHILL_FOR_TARGET)" \ - "CHILL_LIB=$(CHILL_LIB)" \ - 'CXX=$$(CXX_FOR_TARGET)' \ - "CXX_FOR_TARGET=$(CXX_FOR_TARGET)" \ - "CXXFLAGS=$(CXXFLAGS)" \ - "MAKEINFO=$(MAKEINFO)" \ - "INSTALL=$(INSTALL)" \ - "INSTALL_PROGRAM=$(INSTALL_PROGRAM)" \ - "INSTALL_DATA=$(INSTALL_DATA)" \ - "LDFLAGS=$(LDFLAGS)" \ - "LIBS=$(LIBS)" \ - "RUNTEST=$(RUNTEST)" \ - "RUNTESTFLAGS=$(RUNTESTFLAGS)" - -all: - @echo "Nothing to be done for all..." - -.NOEXPORT: -info: -install-info: -dvi: - -install: - -uninstall: force - -installcheck: - -check: site.exp - @for i in . ${SUBDIRS}; do \ - if [ $$i = . ] ; then continue ; fi ; \ - if [ -d ./$$i ] ; then \ - if (rootme=`pwd`/ ; export rootme ; \ - rootsrc=`cd $(srcdir); pwd`/ ; export rootsrc ; \ - cd ./$$i; \ - $(MAKE) $(TARGET_FLAGS_TO_PASS) check) ; then true ; \ - else exit 1 ; fi ; \ - else true ; fi ; \ - done - rootme=`pwd`; export rootme; \ - srcdir=`cd ${srcdir}; pwd` ; export srcdir ; \ - EXPECT=${EXPECT} ; export EXPECT ; \ - if [ -f $$rootme/../../expect/expect ]; then \ - TCL_LIBRARY=`cd $$srcdir/../../tcl/library && pwd`; \ - export TCL_LIBRARY; \ - fi; \ - runtest=$(RUNTEST); \ - if $(SHELL) -c "$$runtest --version" > /dev/null 2>&1; then \ - $$runtest $(RUNTESTFLAGS); \ - else echo "WARNING: could not find \`runtest'" 1>&2; :;\ - fi - -site.exp: Makefile - @echo 'Making a new site.exp file...' - -@rm -f site.bak - @echo '## these variables are automatically generated by make ##' > $@-t - @echo '# Do not edit here. If you wish to override these values' >> $@-t - @echo '# edit the last section' >> $@-t - @echo 'set tool sim' >> $@-t - @echo 'set srcdir $(srcdir)' >> $@-t - @echo 'set objdir' `pwd` >> $@-t - @echo 'set arch $(arch)' >> $@-t - @echo 'set build_alias $(build_alias)' >> $@-t - @echo 'set build_triplet $(build_canonical)' >> $@-t - @echo 'set host_alias $(host_alias)' >> $@-t - @echo 'set host_triplet $(host_canonical)' >> $@-t - @echo 'set target_alias $(target_alias)' >> $@-t - @echo 'set target_triplet $(target_canonical)' >> $@-t - @echo '## All variables above are generated by configure. Do Not Edit ##' >> $@-t - -@sed '1,/^## All variables above are.*##/ d' site.exp >> $@-t - -@mv site.exp site.bak - @mv $@-t site.exp - -force:; - -clean mostlyclean: - -rm -f *~ core *.o a.out xgdb *.x *.grt - if [ x"${SUBDIRS}" != x ] ; then \ - for dir in ${SUBDIRS}; \ - do \ - echo "$$dir:"; \ - if [ -d $$dir ]; then \ - (cd $$dir; $(MAKE) clean); \ - fi; \ - done ; \ - else true; fi - -distclean maintainer-clean realclean: clean - -rm -f *~ core - -rm -f Makefile config.status *-init.exp - -rm -fr *.log summary detail *.plog *.sum *.psum site.* - if [ x"${SUBDIRS}" != x ] ; then \ - for dir in ${SUBDIRS}; \ - do \ - echo "$$dir:"; \ - if [ -d $$dir ]; then \ - (cd $$dir; $(MAKE) distclean); \ - fi; \ - done ; \ - else true; fi - -Makefile : Makefile.in config.status - $(SHELL) config.status - -config.status: $(srcdir)/configure - $(SHELL) ./config.status --recheck -# FIXME: Requires --enable-maintainer-mode, which one could add, but -# it's provided by automake. Maybe switch to automake someday. -#$(srcdir)/configure: @MAINT@ $(srcdir)/configure.in -# cd $(srcdir) && autoconf - -# CGEN utilities to build part of a cpu's testsuite. - -.PHONY: cgen -cgen: - $(SCHEME) $(SCHEMEFLAGS) $(CGENDIR)/cgen-stest.scm \ - -s $(CGENDIR) \ - $(CGENFLAGS) \ - -m all \ - -a $(arch) \ - -B tmp-build.sh \ - -E tmp-allinsn.exp diff --git a/sim/testsuite/common/.Sanitize b/sim/testsuite/common/.Sanitize deleted file mode 100644 index 15bdeaa..0000000 --- a/sim/testsuite/common/.Sanitize +++ /dev/null @@ -1,44 +0,0 @@ -# .Sanitize for devo/sim/testsuite - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -Make-common.in -Makefile.in -bits-gen.c -bits-tst.c -fpu-tst.c -alu-n-tst.h -alu-tst.c - -Things-to-lose: - -Do-last: - -for i in * ; do - if test ! -d $i && (grep sanitize $i > /dev/null) ; then - echo '***' Some mentions of Sanitize are still left in $i! 1>&2 - fi -done - -# End of file. diff --git a/sim/testsuite/common/Make-common.in b/sim/testsuite/common/Make-common.in deleted file mode 100644 index a51876a..0000000 --- a/sim/testsuite/common/Make-common.in +++ /dev/null @@ -1,48 +0,0 @@ -check: sanity $(TESTS) -sanity: - @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET) - @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET) - @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET) - -# Rules for running the tests - -.SUFFIXES: .ok .run .hi .ko -.run.ok: - rm -f tmp-$* $*.hi - ulimit -t 5 ; \ - $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$* - mv tmp-$* $*.ok -.run.hi: - rm -f tmp-$* $*.hi diff-$* - ulimit -t 5 ; \ - $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$* - echo 'Hello World!' | diff - tmp-$* > diff-$* - cat tmp-$* diff-$* > $*.hi -.run.ko: - rm -f tmp-$* $*.ko - set +e ; \ - ulimit -t 5 ; \ - $(RUN_FOR_TARGET) $(RUNFLAGS_FOR_TARGET) $*.run > tmp-$* ; \ - if [ $$? -eq 47 ] ; then \ - exit 0 ; \ - else \ - exit 1 ; \ - fi - mv tmp-$* $*.ko - - -# Rules for building the test -# Preference is for obtaining the executable (.run) from a prebuilt image - -.SUFFIXES: .uue .s .S .run -.uue.run: - head $* | grep $*.run > /dev/null - uudecode $*.uue -.run.u: - uuencode < $*.run $*.run > $*.u -.o.run: - $(LD_FOR_TARGET) $(LDFLAGS_FOR_TARGET) -o $*.run $*.o -.s.o: - $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) $(srcdir)/$*.s -o $*.o -.S.o: - $(AS_FOR_TARGET) $(ASFLAGS_FOR_TARGET) $(srcdir)/$*.S -o $*.o diff --git a/sim/testsuite/common/Makefile.in b/sim/testsuite/common/Makefile.in deleted file mode 100644 index 12e0977..0000000 --- a/sim/testsuite/common/Makefile.in +++ /dev/null @@ -1,33 +0,0 @@ -CFLAGS = -Wall -Werror -I../../common -I../../../include -g - -check: bits32m0.ok bits32m31.ok bits64m0.ok bits64m63.ok - -clean: - rm -f *.o - rm -f *.ok - rm -f bits32m0 bits32m31 bits64m0 bits64m63 bits-gen - rm -f tmp-* - -.SUFIXES: .ok -%.ok: % - ./$< - touch $<.ok - -all: bits32m0 bits32m31 bits64m0 bits64m63 - -bits32m0.c: bits-gen bits-tst.c - ./bits-gen 32 0 > tmp-bits32m0.c - cat bits-tst.c >> tmp-bits32m0.c - mv tmp-bits32m0.c bits32m0.c -bits32m31.c: bits-gen bits-tst.c - ./bits-gen 32 31 > tmp-bits32m31.c - cat bits-tst.c >> tmp-bits32m31.c - mv tmp-bits32m31.c bits32m31.c -bits64m0.c: bits-gen bits-tst.c - ./bits-gen 64 0 > tmp-bits64m0.c - cat bits-tst.c >> tmp-bits64m0.c - mv tmp-bits64m0.c bits64m0.c -bits64m63.c: bits-gen bits-tst.c - ./bits-gen 64 63 > tmp-bits64m63.c - cat bits-tst.c >> tmp-bits64m63.c - mv tmp-bits64m63.c bits64m63.c diff --git a/sim/testsuite/common/alu-n-tst.h b/sim/testsuite/common/alu-n-tst.h deleted file mode 100644 index bf2635f..0000000 --- a/sim/testsuite/common/alu-n-tst.h +++ /dev/null @@ -1,87 +0,0 @@ -#ifndef N -#error "N must be #defined" -#endif - -#include "sim-xcat.h" - -/* NOTE: see end of file for #undef of these macros */ -#define unsignedN XCONCAT2(unsigned,N) -#define OP_BEGIN XCONCAT3(ALU,N,_BEGIN) -#define OP_ADD XCONCAT3(ALU,N,_ADD) -#define OP_SUB XCONCAT3(ALU,N,_SUB) -#define HAD_OVERFLOW (XCONCAT3(ALU,N,_HAD_OVERFLOW) != 0) -#define HAD_CARRY (XCONCAT3(ALU,N,_HAD_CARRY) != 0) -#define RESULT XCONCAT3(ALU,N,_RESULT) -#define OVERFLOW_RESULT XCONCAT3(ALU,N,_OVERFLOW_RESULT) -#define CARRY_RESULT XCONCAT3(ALU,N,_CARRY_RESULT) -#define do_op_N XCONCAT2(do_op_,N) - -void -do_op_N (const alu_test *tst) -{ - const alu_op *op; - /* without type cast */ - { - OP_BEGIN (tst->begin); - print_hex (tst->begin, N); - for (op = tst->ops; op->op != NULL; op++) - { - printf (" %s ", op->op); - print_hex (op->arg, N); - if (strcmp (op->op, "add") == 0 - || strcmp (op->op, "ADD") == 0) - OP_ADD (op->arg); - else if (strcmp (op->op, "sub") == 0 - || strcmp (op->op, "SUB") == 0) - OP_SUB (op->arg); - else - { - printf (" -- operator unknown\n"); - abort (); - } - } - printf (" = "); - print_hex (tst->result, N); - printf (" C%d V%d", tst->carry, tst->overflow); - if (tst->carry != HAD_CARRY) - { - printf (" -- carry wrong %d", HAD_CARRY); - errors ++; - } - if (tst->overflow != HAD_OVERFLOW) - { - printf (" -- overflow wrong %d", HAD_OVERFLOW); - errors ++; - } - if ((unsignedN) CARRY_RESULT != (unsignedN) tst->result) - { - printf (" -- carry result wrong "); - print_hex (CARRY_RESULT, N); - errors ++; - } - if ((unsignedN) OVERFLOW_RESULT != (unsignedN) tst->result) - { - printf (" -- overflow result wrong "); - print_hex (OVERFLOW_RESULT, N); - errors ++; - } - if ((unsignedN) RESULT != (unsignedN) tst->result) - { - printf (" -- result wrong "); - print_hex (RESULT, N); - errors ++; - } - printf ("\n"); - } -} - -#undef OP_BEGIN -#undef OP_ADD -#undef OP_SUB -#undef HAD_OVERFLOW -#undef HAD_CARRY -#undef OVERFLOW_RESULT -#undef CARRY_RESULT -#undef RESULT -#undef do_op_N -#undef unsignedN diff --git a/sim/testsuite/common/alu-tst.c b/sim/testsuite/common/alu-tst.c deleted file mode 100644 index f03ebd5..0000000 --- a/sim/testsuite/common/alu-tst.c +++ /dev/null @@ -1,100 +0,0 @@ -#define WITH_TARGET_WORD_MSB 0 -#define WITH_TARGET_WORD_BITSIZE 64 -#define WITH_HOST_WORD_BITSIZE (sizeof (int) * 8) - -#define ASSERT(EXPRESSION) \ -{ \ - if (!(EXPRESSION)) { \ - fprintf (stderr, "%s:%d: assertion failed - %s\n", \ - __FILE__, __LINE__, #EXPRESSION); \ - abort (); \ - } \ -} - -#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE) - -#include "sim-basics.h" -#include "sim-types.h" -#include "sim-bits.h" - -#include "sim-alu.h" - -#include <stdio.h> - - -typedef struct { - char *op; - unsigned64 arg; -} alu_op; - -typedef struct { - unsigned64 begin; - alu_op ops[3]; - unsigned64 result; - int carry; - int overflow; -} alu_test; - -#define MAX_INT16 (32767) -#define MIN_INT16 (32768) - -const alu_test alu16_tests[] = { - /* */ - { MAX_INT16, { { "ADD", 1 }, }, MIN_INT16, 0, 1, }, - { MIN_INT16, { { "ADD", -1 }, }, MAX_INT16, 1, 1, }, - { MAX_INT16, { { "ADD", MIN_INT16 }, }, -1, 0, 0, }, - { MIN_INT16, { { "ADD", MAX_INT16 }, }, -1, 0, 0, }, - { MAX_INT16, { { "ADD", MAX_INT16 }, }, MAX_INT16 * 2, 0, 1, }, - { MIN_INT16, { { "ADD", MIN_INT16 }, }, 0, 1, 1, }, - /* */ - { 0, { { "SUB", MIN_INT16 }, }, MIN_INT16, 0, 1, }, - { MAX_INT16, { { "SUB", MAX_INT16 }, }, 0, 0, 0, }, -}; - - -static void -print_hex (unsigned64 val, int nr_bits) -{ - switch (nr_bits) - { - case 16: - printf ("0x%04lx", (long) (unsigned16) (val)); - break; - case 32: - printf ("0x%08lx", (long) (unsigned32) (val)); - break; - case 64: - printf ("0x%08lx%08lx", - (long) (unsigned32) (val >> 32), - (long) (unsigned32) (val)); - default: - abort (); - } -} - - -int errors = 0; - - -#define N 16 -#include "alu-n-tst.h" -#undef N - -#if 0 -#define N 32 -#include "alu-n-tst.h" -#undef N - -#define N 64 -#include "alu-n-tst.h" -#undef N -#endif - -int -main () -{ - int i; - for (i = 0; i < sizeof (alu16_tests) / sizeof (*alu16_tests); i++) - do_op_16 (alu16_tests + i); - return (errors != 0); -} diff --git a/sim/testsuite/common/bits-gen.c b/sim/testsuite/common/bits-gen.c deleted file mode 100644 index 5feb5a0..0000000 --- a/sim/testsuite/common/bits-gen.c +++ /dev/null @@ -1,259 +0,0 @@ -/* Miscellaneous simulator utilities. - Copyright (C) 1997 Free Software Foundation, Inc. - Contributed by Cygnus Support. - -This file is part of GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ - - -#include <stdio.h> - - -void -gen_struct (void) -{ - printf ("\n"); - printf ("typedef struct _test_tuples {\n"); - printf (" int line;\n"); - printf (" int row;\n"); - printf (" int col;\n"); - printf (" long long val;\n"); - printf (" long long check;\n"); - printf ("} test_tuples;\n"); - printf ("\n"); - printf ("typedef struct _test_spec {\n"); - printf (" const char *file;\n"); - printf (" const char *macro;\n"); - printf (" int nr_rows;\n"); - printf (" int nr_cols;\n"); - printf (" test_tuples *tuples;\n"); - printf ("} test_spec;\n"); -} - - -void -gen_bit (int bitsize, - int msb, - const char *macro, - int nr_bits) -{ - int i; - - printf ("\n/* Test the BIT%s macro */\n", macro); - printf ("test_tuples bit%s_tuples[%d] = {\n", macro, nr_bits); - for (i = 0; i < nr_bits; i++) - { - /* compute what we think the value is */ - long long bit = 1; - if (msb == 0) - bit <<= nr_bits - i - 1; - else - bit <<= i; - if (bitsize == 32) - bit = (long) bit; - /* write it out */ - printf (" { __LINE__, "); - printf ("%d, %d, ", -1, i); - printf ("BIT%s (%2d), ", macro, i); - printf ("0x%08lx%08lxLL, ", (long) (bit >> 32), (long) bit); - printf ("},\n"); - } - printf ("};\n"); - printf ("\n"); - printf ("test_spec bit%s_test = { __FILE__, \"BIT%s\", 1, %d, bit%s_tuples, };\n", - macro, macro, nr_bits, macro); - printf ("\n"); -} - - -void -gen_mask (int bitsize, - const char *msb, - const char *macro, - int nr_bits) -{ - int l; - int h; - printf ("\n/* Test the %sMASK%s macro */\n", msb, macro); - printf ("test_tuples mask%s_tuples[%d][%d] = {\n", macro, nr_bits, nr_bits); - for (l = 0; l < nr_bits; l++) - { - printf (" {\n"); - for (h = 0; h < nr_bits; h++) - { - printf (" { __LINE__, "); - if ((strcmp (msb, "MS") == 0 && l <= h) - || (strcmp (msb, "MS") != 0 && l >= h) - || (strcmp (macro, "") == 0)) - { - /* compute the mask */ - long long mask = 0; - int b; - for (b = 0; b < nr_bits; b++) - { - long long bit = 1; - if (strcmp (msb, "MS") == 0) - { - if ((l <= b && b <= h) - || (h < l && (b <= h || b >= l))) - bit <<= (nr_bits - b - 1); - else - bit = 0; - } - else - { - if ((l >= b && b >= h) - || (h > l && (b >= h || b <= l))) - bit <<= b; - else - bit = 0; - } - mask |= bit; - } - if (bitsize == 32) - mask = (unsigned long) mask; - printf ("%d, %d, ", l, h); - printf ("%sMASK%s (%2d, %2d), ", msb, macro, l, h); - printf ("0x%08lx%08lxLL, ", (long) (mask >> 32), (long) mask); - } - else - printf ("-1, -1, "); - printf ("},\n"); - } - printf (" },\n"); - } - printf ("};\n"); - printf ("\n"); - printf ("test_spec mask%s_test = { __FILE__, \"%sMASK%s\", %d, %d, &mask%s_tuples[0][0], };\n", - macro, msb, macro, nr_bits, nr_bits, macro); - printf ("\n"); -} - - -void -usage (int reason) -{ - fprintf (stderr, "Usage:\n"); - fprintf (stderr, " bits-gen <nr-bits> <msb>\n"); - fprintf (stderr, "Generate a test case for the simulator bit manipulation code\n"); - fprintf (stderr, " <nr-bits> = { 32 | 64 }\n"); - fprintf (stderr, " <msb> = { 0 | { 31 | 63 } }\n"); - - switch (reason) - { - case 1: fprintf (stderr, "Wrong number of arguments\n"); - break; - case 2: - fprintf (stderr, "Invalid <nr-bits> argument\n"); - break; - case 3: - fprintf (stderr, "Invalid <msb> argument\n"); - break; - default: - } - - exit (1); -} - - - -int -main (argc, argv) - int argc; - char **argv; -{ - int bitsize; - int msb; - char *ms; - - /* parse the only argument */ - if (argc != 3) - usage (1); - if (strcmp (argv [1], "32") == 0) - bitsize = 32; - else if (strcmp (argv [1], "64") == 0) - bitsize = 64; - else - usage (2); - if (strcmp (argv [2], "0") == 0) - msb = 0; - else if (strcmp (argv [2], "31") == 0 && bitsize == 32) - msb = 31; - else if (strcmp (argv [2], "63") == 0 && bitsize == 64) - msb = 63; - else - usage (3); - if (msb == 0) - ms = "MS"; - else - ms = "LS"; - - printf ("#define WITH_TARGET_WORD_BITSIZE %d\n", bitsize); - printf ("#define WITH_TARGET_WORD_MSB %d\n", msb); - printf ("#define WITH_HOST_WORD_BITSIZE %d\n", sizeof (int) * 8); - printf ("\n"); - printf ("#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE)\n"); - printf ("\n"); - printf ("#define ASSERT(X) do { if (!(X)) abort(); } while (0)\n"); - printf ("\n"); - printf ("#include \"sim-basics.h\"\n"); - printf ("#include \"sim-types.h\"\n"); - printf ("#include \"sim-bits.h\"\n"); - - gen_struct (); - - - - printf ("#define DO_BIT_TESTS\n"); - gen_bit ( 4, msb, "4", 4); - gen_bit ( 5, msb, "5", 5); - gen_bit ( 8, msb, "8", 8); - gen_bit (10, msb, "10", 10); - gen_bit (16, msb, "16", 16); - gen_bit (32, msb, "32", 32); - gen_bit (64, msb, "64", 64); - gen_bit (bitsize, msb, "", 64); - - printf ("test_spec *(bit_tests[]) = {\n"); - printf (" &bit4_test,\n"); - printf (" &bit5_test,\n"); - printf (" &bit8_test,\n"); - printf (" &bit10_test,\n"); - printf (" &bit16_test,\n"); - printf (" &bit32_test,\n"); - printf (" &bit64_test,\n"); - printf (" &bit_test,\n"); - printf (" 0,\n"); - printf ("};\n\n"); - - - - printf ("#define DO_MASK_TESTS\n"); - gen_mask (16, ms, "16", 16); - gen_mask (32, ms, "32", 32); - gen_mask (64, ms, "64", 64); - gen_mask (bitsize, ms, "", 64); - - printf ("test_spec *(mask_tests[]) = {\n"); - printf (" &mask16_test,\n"); - printf (" &mask32_test,\n"); - printf (" &mask64_test,\n"); - printf (" &mask_test,\n"); - printf (" 0,\n"); - printf ("};\n\n"); - - return 0; -} diff --git a/sim/testsuite/common/bits-tst.c b/sim/testsuite/common/bits-tst.c deleted file mode 100644 index cb33544..0000000 --- a/sim/testsuite/common/bits-tst.c +++ /dev/null @@ -1,347 +0,0 @@ -# 2 "bits-tst.c" - -/* Drive the bit test routines */ - - -long long -calc (const char *call, - long long val, - int row, - int col) -{ - if (strcmp (call, "MASK") == 0) - return MASKED (val, row, col); - if (strcmp (call, "MASK16") == 0) - return MASKED16 (val, row, col); - if (strcmp (call, "MASK32") == 0) - return MASKED32 (val, row, col); - if (strcmp (call, "MASK64") == 0) - return MASKED64 (val, row, col); - - if (strcmp (call, "EXTRACT") == 0) - return EXTRACTED (val, row, col); - if (strcmp (call, "EXTRACT16") == 0) - return EXTRACTED16 (val, row, col); - if (strcmp (call, "EXTRACT32") == 0) - return EXTRACTED32 (val, row, col); - if (strcmp (call, "EXTRACT64") == 0) - return EXTRACTED64 (val, row, col); - - if (strcmp (call, "LSEXTRACT") == 0) - return LSEXTRACTED (val, row, col); - if (strcmp (call, "LSEXTRACT16") == 0) - return LSEXTRACTED16 (val, row, col); - if (strcmp (call, "LSEXTRACT32") == 0) - return LSEXTRACTED32 (val, row, col); - if (strcmp (call, "LSEXTRACT64") == 0) - return LSEXTRACTED64 (val, row, col); - - if (strcmp (call, "MSEXTRACT") == 0) - return MSEXTRACTED (val, row, col); - if (strcmp (call, "MSEXTRACT16") == 0) - return MSEXTRACTED16 (val, row, col); - if (strcmp (call, "MSEXTRACT32") == 0) - return MSEXTRACTED32 (val, row, col); - if (strcmp (call, "MSEXTRACT64") == 0) - return MSEXTRACTED64 (val, row, col); - - if (strcmp (call, "INSERT") == 0) - return INSERTED (val, row, col); - if (strcmp (call, "INSERT16") == 0) - return INSERTED16 (val, row, col); - if (strcmp (call, "INSERT32") == 0) - return INSERTED32 (val, row, col); - if (strcmp (call, "INSERT64") == 0) - return INSERTED64 (val, row, col); - - if (strcmp (call, "LSINSERT") == 0) - return LSINSERTED (val, row, col); - if (strcmp (call, "LSINSERT16") == 0) - return LSINSERTED16 (val, row, col); - if (strcmp (call, "LSINSERT32") == 0) - return LSINSERTED32 (val, row, col); - if (strcmp (call, "LSINSERT64") == 0) - return LSINSERTED64 (val, row, col); - - if (strcmp (call, "MSINSERT") == 0) - return MSINSERTED (val, row, col); - if (strcmp (call, "MSINSERT16") == 0) - return MSINSERTED16 (val, row, col); - if (strcmp (call, "MSINSERT32") == 0) - return MSINSERTED32 (val, row, col); - if (strcmp (call, "MSINSERT64") == 0) - return MSINSERTED64 (val, row, col); - - if (strcmp (call, "MSMASK") == 0) - return MSMASKED (val, row, col); - if (strcmp (call, "MSMASK16") == 0) - return MSMASKED16 (val, row, col); - if (strcmp (call, "MSMASK32") == 0) - return MSMASKED32 (val, row, col); - if (strcmp (call, "MSMASK64") == 0) - return MSMASKED64 (val, row, col); - - if (strcmp (call, "LSMASK") == 0) - return LSMASKED (val, row, col); - if (strcmp (call, "LSMASK16") == 0) - return LSMASKED16 (val, row, col); - if (strcmp (call, "LSMASK32") == 0) - return LSMASKED32 (val, row, col); - if (strcmp (call, "LSMASK64") == 0) - return LSMASKED64 (val, row, col); - - if (strcmp (call, "ROT16") == 0) - return ROT16 (val, col); - if (strcmp (call, "ROT32") == 0) - return ROT32 (val, col); - if (strcmp (call, "ROT64") == 0) - return ROT64 (val, col); - - if (strcmp (call, "SEXT16") == 0) - return SEXT16 (val, col); - if (strcmp (call, "SEXT32") == 0) - return SEXT32 (val, col); - if (strcmp (call, "SEXT64") == 0) - return SEXT64 (val, col); - if (strcmp (call, "SEXT") == 0) - return SEXT (val, col); - - if (strcmp (call, "LSSEXT16") == 0) - return LSSEXT16 (val, col); - if (strcmp (call, "LSSEXT32") == 0) - return LSSEXT32 (val, col); - if (strcmp (call, "LSSEXT64") == 0) - return LSSEXT64 (val, col); - if (strcmp (call, "LSSEXT") == 0) - return LSSEXT (val, col); - - if (strcmp (call, "MSSEXT16") == 0) - return MSSEXT16 (val, col); - if (strcmp (call, "MSSEXT32") == 0) - return MSSEXT32 (val, col); - if (strcmp (call, "MSSEXT64") == 0) - return MSSEXT64 (val, col); - if (strcmp (call, "MSSEXT") == 0) - return MSSEXT (val, col); - - else - { - fprintf (stderr, "Unknown call passed to calc (%s, 0x%08lx%08lx, %d, %d)\n", - call, (long)(val >> 32), (long)val, row, col); - abort (); - return val; - } -} - - -int -check_sext (int nr_bits, - const char *sexted, - const char *masked, - const char *msmasked) -{ - int errors = 0; - int col; - for (col = 0; col < nr_bits; col ++) - { - long long mask = calc (masked, -1, col, col); - long long msmask = calc (msmasked, -1, - 0, (WITH_TARGET_WORD_MSB ? nr_bits - col - 1 : col)); - long long sext = calc (sexted, mask, -1, col); - long long mask_1 = mask >> 1; - long long sext_1 = calc (sexted, mask_1, -1, col); - if (mask_1 != sext_1) - { - fprintf (stderr, "%s:%d: ", __FILE__, __LINE__); - fprintf (stderr, " %s(0x%08lx%08lx,%d) != 0x%08lx%08lx\n", - sexted, - (long)(mask_1 >> 32), (long)mask_1, - col, - (long)(sext_1 >> 32), (long)sext_1); - errors ++; - } - if (sext != msmask) - { - fprintf (stderr, "%s:%d: ", __FILE__, __LINE__); - fprintf (stderr, " %s(0x%08lx%08lx,%d) == 0x%08lx%08lx wrong, != 0x%08lx%08lx\n", - sexted, (long)(mask >> 32), (long)mask, col, - (long)(sext >> 32), (long)sext, - (long)(msmask >> 32), (long)msmask); - errors ++; - } - - } - return errors; -} - - -int -check_rot (int nr_bits, - const char *roted, - const char *masked) -{ - int errors = 0; - int row; - int col; - for (row = 0; row < nr_bits; row++) - for (col = 0; col < nr_bits; col++) - if ((WITH_TARGET_WORD_MSB == 0 && row <= col) - || (WITH_TARGET_WORD_MSB != 0 && row >= col)) - { - long long mask = calc (masked, -1, row, col); - int shift; - for (shift = -nr_bits + 1; shift < nr_bits; shift ++) - { - long long rot = calc (roted, mask, -1, shift); - long long urot = calc (roted, rot, -1, -shift); - if (mask != urot - || (shift == 0 && rot != mask) - || (shift != 0 && rot == mask && abs(row - col) != (nr_bits - 1))) - { - fprintf (stderr, "%s:%d: ", __FILE__, __LINE__); - fprintf (stderr, " %s(%s(0x%08lx%08lx,%d) == 0x%08lx%08lx, %d) failed\n", - roted, roted, - (long)(mask >> 32), (long)mask, shift, - (long)(urot >> 32), (long)urot, -shift); - errors ++; - } - } - } - return errors; -} - - -int -check_extract (int nr_bits, - const char *extracted, - const char *inserted, - const char *masked) -{ - int errors = 0; - int row; - int col; - for (row = 0; row < nr_bits; row++) - for (col = 0; col < nr_bits; col ++) - if ((WITH_TARGET_WORD_MSB == 0 && row <= col) - || (WITH_TARGET_WORD_MSB != 0 && row >= col)) - { - long long mask = calc (masked, -1, row, col); - long long extr = calc (extracted, mask, row, col); - long long inst = calc (inserted, extr, row, col); - if (mask != inst) - { - fprintf (stderr, "%s:%d: ", __FILE__, __LINE__); - fprintf (stderr, " %s(%d,%d)=0x%08lx%08lx -> %s=0x%08lx%08lx -> %s=0x%08lx%08lx failed\n", - masked, row, col, (long)(mask >> 32), (long)mask, - extracted, (long)(extr >> 32), (long)extr, - inserted, (long)(inst >> 32), (long)inst); - errors ++; - } - } - return errors; -} - - -int -check_bits (int call, - test_spec **tests) -{ - int r; - int c; - int errors = 0; - while (*tests != NULL) - { - int nr_rows = (*tests)->nr_rows; - int nr_cols = (*tests)->nr_cols; - test_tuples *tuples = (*tests)->tuples; - for (r = 0; r < nr_rows; r++) - for (c = 0; c < nr_cols; c++) - { - int i = r * nr_rows + c; - test_tuples *tuple = &tuples[i]; - if (tuple->col >= 0) - { - long long val = (!call ? tuple->val : calc ((*tests)->macro, -1, - tuple->row, tuple->col)); - long long check = tuple->check; - if (val != check) - { - fprintf (stderr, "%s:%d:", (*tests)->file, tuple->line); - fprintf (stderr, " %s", (*tests)->macro); - if (tuple->row >= 0) - fprintf (stderr, " (%d, %d)", tuple->row, tuple->col); - else - fprintf (stderr, " (%d)", tuple->col); - fprintf (stderr, " == 0x%08lx%08lx wrong, != 0x%08lx%08lx)\n", - (long) (val >> 32), (long) val, - (long) (check >> 32), (long) check); - errors ++; - } - } - } - tests ++; - } - return errors; -} - - -int -main (argc, argv) - int argc; - char **argv; -{ - int errors = 0; - - -#if defined (DO_BIT_TESTS) - printf ("Checking BIT*\n"); - errors += check_bits (0, bit_tests); -#endif - - -#if defined (DO_MASK_TESTS) - printf ("Checking MASK*\n"); - errors += check_bits (0, mask_tests); - - printf ("Checking MASKED*\n"); - errors += check_bits (1, mask_tests); -#endif - - -#if defined (DO_LSMASK_TESTS) - printf ("Checking LSMASK*\n"); - errors += check_bits (0, lsmask_tests); - - printf ("Checking LSMASKED*\n"); - errors += check_bits (1, lsmask_tests); -#endif - - -#if defined (DO_MSMASK_TESTS) - printf ("Checking MSMASK*\n"); - errors += check_bits (0, msmask_tests); - - printf ("Checking MSMASKED*\n"); - errors += check_bits (1, msmask_tests); -#endif - - - printf ("Checking EXTRACTED*\n"); - errors += check_extract (16, "EXTRACT16", "INSERT16", "MASK16"); - errors += check_extract (32, "EXTRACT32", "INSERT32", "MASK32"); - errors += check_extract (64, "EXTRACT64", "INSERT64", "MASK64"); - errors += check_extract (64, "EXTRACT", "INSERT", "MASK"); - - printf ("Checking SEXT*\n"); - errors += check_sext (16, "SEXT16", "MASK16", "MSMASK16"); - errors += check_sext (32, "SEXT32", "MASK32", "MSMASK32"); - errors += check_sext (64, "SEXT64", "MASK64", "MSMASK64"); - errors += check_sext (64, "SEXT", "MASK", "MSMASK"); - - printf ("Checking ROT*\n"); - errors += check_rot (16, "ROT16", "MASK16"); - errors += check_rot (32, "ROT32", "MASK32"); - errors += check_rot (64, "ROT64", "MASK64"); - - return errors != 0; -} diff --git a/sim/testsuite/common/fpu-tst.c b/sim/testsuite/common/fpu-tst.c deleted file mode 100644 index d347e12..0000000 --- a/sim/testsuite/common/fpu-tst.c +++ /dev/null @@ -1,538 +0,0 @@ -#define ASSERT(EXPRESSION) \ -do { \ - if (!(EXPRESSION)) { \ - fprintf (stderr, "%s:%d: assertion failed - %s\n", \ - __FILE__, __LINE__, #EXPRESSION); \ - abort (); \ - } \ -} while (0) - -#define SIM_BITS_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE) - -#include "milieu.h" -#include "softfloat.h" -#include "systfloat.h" -#include "systmodes.h" - -/* #define SIM_FPU_INLINE (INCLUDE_MODULE | INCLUDED_BY_MODULE) */ - - -#include "sim-bits.h" -#include "sim-fpu.h" -#include "sim-fpu.c" - - - -static int flags; - -int8 -syst_float_flags_clear () -{ - int old_flags = 0; - int i = 1; - while (flags >= i) - { - switch ((sim_fpu_status) (flags & i)) - { - case sim_fpu_status_denorm: - break; - case sim_fpu_status_invalid_snan: - case sim_fpu_status_invalid_qnan: - case sim_fpu_status_invalid_isi: - case sim_fpu_status_invalid_idi: - case sim_fpu_status_invalid_zdz: - case sim_fpu_status_invalid_imz: - case sim_fpu_status_invalid_cvi: - case sim_fpu_status_invalid_cmp: - case sim_fpu_status_invalid_sqrt: - old_flags |= float_flag_invalid; /* v */ - break; - case sim_fpu_status_inexact: - old_flags |= float_flag_inexact; /* x */ - break; - case sim_fpu_status_overflow: - old_flags |= float_flag_overflow; /* o */ - break; - case sim_fpu_status_underflow: - old_flags |= float_flag_underflow; /* u */ - break; - case sim_fpu_status_invalid_div0: - old_flags |= float_flag_divbyzero; /* z */ - break; - case sim_fpu_status_rounded: - break; - } - i <<= 1; - } - flags = 0; - return old_flags; -} - - -sim_fpu_round rounding_mode; - -void -syst_float_set_rounding_mode(int8 mode) -{ - switch (mode) - { - case float_round_nearest_even: - rounding_mode = sim_fpu_round_near; - break; - case float_round_down: - rounding_mode = sim_fpu_round_down; - break; - case float_round_up: - rounding_mode = sim_fpu_round_up; - break; - case float_round_to_zero: - rounding_mode = sim_fpu_round_zero; - break; - } -} - - -float32 -syst_int32_to_float32(int32 a) -{ - float32 z; - sim_fpu s; - flags |= sim_fpu_i32to (&s, a, rounding_mode); - flags |= sim_fpu_round_32 (&s, rounding_mode, 0); - sim_fpu_to32 (&z, &s); - return z; -} - -float64 -syst_int32_to_float64( int32 a ) -{ - float64 z; - sim_fpu s; - flags |= sim_fpu_i32to (&s, a, rounding_mode); - sim_fpu_to64 (&z, &s); - return z; -} - -int32 -syst_float32_to_int32_round_to_zero( float32 a ) -{ - int32 z; - sim_fpu s; - sim_fpu_32to (&s, a); - flags |= sim_fpu_to32i (&z, &s, sim_fpu_round_zero); - return z; -} - -float64 -syst_float32_to_float64 (float32 a) -{ - float64 z; - sim_fpu s; - sim_fpu_32to (&s, a); - flags |= sim_fpu_round_64 (&s, rounding_mode, 0); - sim_fpu_to64 (&z, &s); - return z; -} - -float32 syst_float32_add( float32 a, float32 b ) -{ - float32 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); -#if 0 - fprintf (stdout, "\n "); - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n+ "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n= "); -#endif - flags |= sim_fpu_add (&ans, &A, &B); - flags |= sim_fpu_round_32 (&ans, rounding_mode, 0); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n"); -#endif - sim_fpu_to32 (&z, &ans); - return z; -} - -float32 syst_float32_sub( float32 a, float32 b ) -{ - float32 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " + "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " = "); -#endif - flags |= sim_fpu_sub (&ans, &A, &B); - flags |= sim_fpu_round_32 (&ans, rounding_mode, 0); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n"); -#endif - sim_fpu_to32 (&z, &ans); - return z; -} - -float32 syst_float32_mul( float32 a, float32 b ) -{ - float32 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " + "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " = "); -#endif - flags |= sim_fpu_mul (&ans, &A, &B); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_32 (&ans, rounding_mode, 0); -#if 0 - sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n"); -#endif - sim_fpu_to32 (&z, &ans); - return z; -} - -float32 syst_float32_div( float32 a, float32 b ) -{ - float32 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= sim_fpu_div (&ans, &A, &B); - flags |= sim_fpu_round_32 (&ans, rounding_mode, 0); - sim_fpu_to32 (&z, &ans); - return z; -} - -float32 syst_float32_sqrt( float32 a ) -{ - float32 z; - sim_fpu A; - sim_fpu ans; - sim_fpu_32to (&A, a); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " sqrt> "); -#endif - flags |= sim_fpu_sqrt (&ans, &A); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_32 (&ans, rounding_mode, 0); -#if 0 - fprintf (stdout, " (%x)\n", flags); -#endif - sim_fpu_to32 (&z, &ans); - return z; -} - -flag syst_float32_eq( float32 a, float32 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= (sim_fpu_eq (&is, &A, &B) & ~sim_fpu_status_invalid_qnan); - return is; -} - -flag syst_float32_eq_signaling( float32 a, float32 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= sim_fpu_eq (&is, &A, &B); - return is; -} - -flag syst_float32_le( float32 a, float32 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= sim_fpu_le (&is, &A, &B); - return is; -} - -flag syst_float32_le_quiet( float32 a, float32 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= (sim_fpu_le (&is, &A, &B) & ~sim_fpu_status_invalid_qnan); - return is; -} - -flag syst_float32_lt( float32 a, float32 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= sim_fpu_lt (&is, &A, &B); - return is; -} - -flag syst_float32_lt_quiet( float32 a, float32 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_32to (&A, a); - sim_fpu_32to (&B, b); - flags |= (sim_fpu_lt (&is, &A, &B) & ~sim_fpu_status_invalid_qnan); - return is; -} - -int32 syst_float64_to_int32_round_to_zero( float64 a ) -{ - int32 z; - sim_fpu s; - sim_fpu_64to (&s, a); - flags |= sim_fpu_to32i (&z, &s, sim_fpu_round_zero); - return z; -} - -float32 syst_float64_to_float32( float64 a ) -{ - float32 z; - sim_fpu s; - sim_fpu_64to (&s, a); -#if 0 - sim_fpu_print_fpu (&s, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " -> "); -#endif - flags |= sim_fpu_round_32 (&s, rounding_mode, 0); -#if 0 - sim_fpu_print_fpu (&s, (sim_fpu_print_func*) fprintf, stdout); - sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout); - printf ("\n"); -#endif - sim_fpu_to32 (&z, &s); - return z; -} - -float64 syst_float64_add( float64 a, float64 b ) -{ - float64 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " + "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " = "); -#endif - flags |= sim_fpu_add (&ans, &A, &B); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_64 (&ans, rounding_mode, 0); -#if 0 - fprintf (stdout, " (%x)\n", flags); -#endif - sim_fpu_to64 (&z, &ans); - return z; -} - -float64 syst_float64_sub( float64 a, float64 b ) -{ - float64 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " + "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " = "); -#endif - flags |= sim_fpu_sub (&ans, &A, &B); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_64 (&ans, rounding_mode, 0); -#if 0 - fprintf (stdout, " (%x)\n", flags); -#endif - sim_fpu_to64 (&z, &ans); - return z; -} - -float64 syst_float64_mul( float64 a, float64 b ) -{ - float64 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " * "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " = "); -#endif - flags |= sim_fpu_mul (&ans, &A, &B); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_64 (&ans, rounding_mode, 0); -#if 0 - sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n"); -#endif - sim_fpu_to64 (&z, &ans); - return z; -} - -float64 syst_float64_div( float64 a, float64 b ) -{ - float64 z; - sim_fpu A; - sim_fpu B; - sim_fpu ans; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " + "); - sim_fpu_print_fpu (&B, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, " = "); -#endif - flags |= sim_fpu_div (&ans, &A, &B); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_64 (&ans, rounding_mode, 0); -#if 0 - sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n"); -#endif - sim_fpu_to64 (&z, &ans); - return z; -} - -float64 syst_float64_sqrt( float64 a ) -{ - float64 z; - sim_fpu A; - sim_fpu ans; - sim_fpu_64to (&A, a); -#if 0 - sim_fpu_print_fpu (&A, (sim_fpu_print_func*) fprintf, stdout); - printf (" sqrt> "); - printf ("\n"); -#endif - flags |= sim_fpu_sqrt (&ans, &A); -#if 0 - sim_fpu_print_fpu (&ans, (sim_fpu_print_func*) fprintf, stdout); -#endif - flags |= sim_fpu_round_64 (&ans, rounding_mode, 0); -#if 0 - sim_fpu_print_status (flags, (sim_fpu_print_func*) fprintf, stdout); - fprintf (stdout, "\n"); -#endif - sim_fpu_to64 (&z, &ans); - return z; -} - -flag syst_float64_eq( float64 a, float64 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); - flags |= (sim_fpu_eq (&is, &A, &B) & ~sim_fpu_status_invalid_qnan); - return is; -} - -flag syst_float64_eq_signaling( float64 a, float64 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); - flags |= sim_fpu_eq (&is, &A, &B); - return is; -} - -flag syst_float64_le( float64 a, float64 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); - flags |= sim_fpu_le (&is, &A, &B); - return is; -} - -flag syst_float64_le_quiet( float64 a, float64 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); - flags |= (sim_fpu_le (&is, &A, &B) & ~sim_fpu_status_invalid_qnan); - return is; -} - -flag syst_float64_lt( float64 a, float64 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); - flags |= sim_fpu_lt (&is, &A, &B); - return is; -} - -flag syst_float64_lt_quiet( float64 a, float64 b ) -{ - sim_fpu A; - sim_fpu B; - int is; - sim_fpu_64to (&A, a); - sim_fpu_64to (&B, b); - flags |= (sim_fpu_lt (&is, &A, &B) & ~sim_fpu_status_invalid_qnan); - return is; -} - diff --git a/sim/testsuite/config/.Sanitize b/sim/testsuite/config/.Sanitize deleted file mode 100644 index 015045b..0000000 --- a/sim/testsuite/config/.Sanitize +++ /dev/null @@ -1,34 +0,0 @@ -# .Sanitize for devo/sim/testsuite/config - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -default.exp - -Things-to-lose: - - -Do-last: - - -# End of file. diff --git a/sim/testsuite/config/default.exp b/sim/testsuite/config/default.exp deleted file mode 100644 index 43c0381..0000000 --- a/sim/testsuite/config/default.exp +++ /dev/null @@ -1,49 +0,0 @@ -# Simulator default dejagnu configuration file. - -load_lib sim-defs.exp - -global AS -if ![info exists AS] { - set AS [findfile $base_dir/../../gas/as-new $base_dir/../../gas/as-new \ - [transform as]] -} - -global ASFLAGS -if ![info exists ASFLAGS] { - set ASFLAGS "" -} - -global CC -if ![info exists CC] { - set CC [findfile $base_dir/../../gcc/xgcc $base_dir/../../gcc/xgcc \ - [transform gcc]] -} - -global CFLAGS -if ![info exists CFLAGS] { - set CFLAGS "" -} - -global LD -if ![info exists LD] { - set LD [findfile $base_dir/../../ld/ld-new $base_dir/../../ld/ld-new \ - [transform ld]] -} - -global LDFLAGS -if ![info exists LDFLAGS] { - set LDFLAGS "" -} - -global SIM -if ![info exists SIM] { - set SIM [findfile $base_dir/../$arch/run $base_dir/../$arch/run \ - [transform run]] -} - -global SIMFLAGS -if ![info exists SIMFLAGS] { - set SIMFLAGS "" -} - -sim_init diff --git a/sim/testsuite/configure b/sim/testsuite/configure deleted file mode 100755 index ce8fb1a..0000000 --- a/sim/testsuite/configure +++ /dev/null @@ -1,1062 +0,0 @@ -#! /bin/sh - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.12.2 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; 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Test case of branch to RPT_E address. - -Mon Nov 10 19:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * t-macros.i (_start): New file. - * t-rachi.s: New file. - - * Makefile.in (RUN_FOR_TARGET): Look for simulator in d10v - directory. - diff --git a/sim/testsuite/d10v-elf/Makefile.in b/sim/testsuite/d10v-elf/Makefile.in deleted file mode 100644 index 92dc121..0000000 --- a/sim/testsuite/d10v-elf/Makefile.in +++ /dev/null @@ -1,147 +0,0 @@ -# Makefile for regression testing the GNU debugger. -# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# GDB is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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For more information, check -dnl any existing configure script. - -AC_PREREQ(2.5) -dnl FIXME - think of a truly uniq file to this directory -AC_INIT(Makefile.in) - -CC=${CC-cc} -AC_SUBST(CC) -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..) -AC_CANONICAL_SYSTEM - -AC_SUBST(target_cpu) - - -AC_OUTPUT(Makefile) diff --git a/sim/testsuite/d10v-elf/exit47.s b/sim/testsuite/d10v-elf/exit47.s deleted file mode 100644 index e37682f..0000000 --- a/sim/testsuite/d10v-elf/exit47.s +++ /dev/null @@ -1,8 +0,0 @@ - .text - .align 2 - .globl _start -_start: - # exit (47) - ldi r6, 1 - ldi r2, 47 - trap 15 diff --git a/sim/testsuite/d10v-elf/hello.s b/sim/testsuite/d10v-elf/hello.s deleted file mode 100644 index 1631b86..0000000 --- a/sim/testsuite/d10v-elf/hello.s +++ /dev/null @@ -1,20 +0,0 @@ - .text - .align 2 - .globl _start -_start: - # write (1, "Hello World!\n", strlen ("Hello World!..") - ldi r6, 4 - ldi r2, 1 - ldi r3, hello - ldi r4, 13 - trap 15 - - # exit (0) - ldi r6, 1 - ldi r2, 0 - trap 15 - -.section .rodata -hello: - .string "Hello World!\n" - diff --git a/sim/testsuite/d10v-elf/loop.s b/sim/testsuite/d10v-elf/loop.s deleted file mode 100644 index e1371e4..0000000 --- a/sim/testsuite/d10v-elf/loop.s +++ /dev/null @@ -1,6 +0,0 @@ - .text - .globl _start - -_start: - bra _start - nop diff --git a/sim/testsuite/d10v-elf/t-dbt.s b/sim/testsuite/d10v-elf/t-dbt.s deleted file mode 100644 index 8c51847..0000000 --- a/sim/testsuite/d10v-elf/t-dbt.s +++ /dev/null @@ -1,33 +0,0 @@ -.include "t-macros.i" - - start - - PSW_BITS = PSW_DM - -;;; Blat our DMAP registers so that they point at on-chip imem - - ldi r2, MAP_INSN | 0xf - st r2, @(DMAP_REG,r0) - ldi r2, MAP_INSN - st r2, @(IMAP1_REG,r0) - -;;; Patch the interrupt vector's dbt entry with a jmp to success - - ldi r4, #trap - ldi r5, (VEC_DBT & DMAP_MASK) + DMAP_BASE - ld2w r2, @(0,r4) - st2w r2, @(0,r5) - ld2w r2, @(4,r4) - st2w r2, @(4,r5) - -test_dbt: - dbt -> nop - exit47 - -success: - checkpsw2 1 PSW_BITS - exit0 - - .data -trap: ldi r1, success@word - jmp r1 diff --git a/sim/testsuite/d10v-elf/t-mac.s b/sim/testsuite/d10v-elf/t-mac.s deleted file mode 100644 index e4aa182..0000000 --- a/sim/testsuite/d10v-elf/t-mac.s +++ /dev/null @@ -1,77 +0,0 @@ -.include "t-macros.i" - - start - - ;; clear FX - ldi r2, #0x8005 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_macu1: - MACU a1, r9, r8 - checkacc2 1 a1 0x80 0x8000 0x7FFE - - ;; set FX - ldi r2, #0x8085 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_macu2: - MACU a1, r9, r8 - checkacc2 2 a1 0x81 0x0000 0xfffd - - - - - ;; clear FX - ldi r2, #0x8005 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x7FFF -test_macsu1: - MACSU a1, r9, r8 - checkacc2 3 a1 0x80 0x7FFE 0x8000 - - ;; set FX - ldi r2, #0x8085 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x7FFF -test_macsu2: - MACSU a1, r9, r8 - checkacc2 4 a1 0x80 0xfffd 0x0001 - - ;; clear FX - ldi r2, #0x8005 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_macsu3: - MACSU a1, r9, r8 - checkacc2 5 a1 0x7F 0x8001 0x7FFE - - ;; set FX - ldi r2, #0x8085 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_macsu4: - MACSU a1, r9, r8 - checkacc2 6 a1 0x7f 0x0002 0xFFFD - - exit0 - - - diff --git a/sim/testsuite/d10v-elf/t-macros.i b/sim/testsuite/d10v-elf/t-macros.i deleted file mode 100644 index fcc54b0..0000000 --- a/sim/testsuite/d10v-elf/t-macros.i +++ /dev/null @@ -1,146 +0,0 @@ - .macro start - .text - .align 2 - .globl _start -_start: - ldi r0, 0 - .endm - - - .macro exit47 - ldi r4, 1 - ldi r0, 47 - trap 15 - .endm - - - .macro exit0 - ldi r4, 1 - ldi r0, 0 - trap 15 - .endm - - - .macro load reg val - ldi \reg, #\val - .endm - - - .macro load2w reg hi lo - ld2w \reg, @(1f,r0) - .data - .align 2 -1: .short \hi - .short \lo - .text - .endm - - - .macro check exit reg val - cmpeqi \reg, #\val - brf0t 1f -0: ldi r4, 1 - ldi r0, \exit - trap 15 -1: - .endm - - - .macro check2w2 exit reg hi lo - st2w \reg, @(1f,r0) - ld r2, @(1f, r0) - cmpeqi r2, #\hi - brf0f 0f - ld r2, @(1f + 2, r0) - cmpeqi r2, #\lo - brf0f 0f - bra 2f -0: ldi r4, 1 - ldi r0, \exit - trap 15 - .data - .align 2 -1: .long 0 - .text -2: - .endm - - - .macro loadacc2 acc guard hi lo - ldi r2, #\lo - mvtaclo r2, \acc - ldi r2, #\hi - mvtachi r2, \acc - ldi r2, #\guard - mvtacg r2, \acc - .endm - - - .macro checkacc2 exit acc guard hi lo - ldi r2, #\guard - mvfacg r3, \acc - cmpeq r2, r3 - brf0f 0f - ldi r2, #\hi - mvfachi r3, \acc - cmpeq r2, r3 - brf0f 0f - ldi r2, #\lo - mvfaclo r3, \acc - cmpeq r2, r3 - brf0f 0f - bra 4f -0: ldi r4, 1 - ldi r0, \exit - trap 15 -4: - .endm - - - .macro loadpsw2 val - ldi r2, #\val - mvtc r2, cr0 - .endm - - - .macro checkpsw2 exit val - mvfc r2, cr0 - cmpeqi r2, #\val - brf0t 1f - ldi r4, 1 - ldi r0, \exit - trap 15 -1: - .endm - - - .macro hello - ;; 4:write (1, string, strlen (string)) - ldi r4, 4 - ldi r0, 1 - ldi r1, 1f - ldi r2, 2f-1f-1 - trap 15 - .section .rodata -1: .string "Hello World!\n" -2: .align 2 - .text - .endm - - - PSW_SM = 0x8000 - PSW_01 = 0x4000 - PSW_EA = 0x2000 - PSW_DB = 0x1000 - PSW_DM = 0x0800 - PSW_IE = 0x0400 - PSW_RP = 0x0200 - PSW_MD = 0x0100 - PSW_FX = 0x0080 - PSW_ST = 0x0040 - PSW_10 = 0x0020 - PSW_11 = 0x0010 - PSW_F0 = 0x0008 - PSW_F1 = 0x0004 - PSW_14 = 0x0002 - PSW_C = 0x0001 diff --git a/sim/testsuite/d10v-elf/t-msbu.s b/sim/testsuite/d10v-elf/t-msbu.s deleted file mode 100644 index 04276cc..0000000 --- a/sim/testsuite/d10v-elf/t-msbu.s +++ /dev/null @@ -1,28 +0,0 @@ -.include "t-macros.i" - - start - - ;; clear FX - ldi r2, #0x8005 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_msbu1: - MSBU a1, r9, r8 - checkacc2 1 a1 0X7F 0x7FFF 0x8000 - - - ;; set FX - ldi r2, #0x8085 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_msbu2: - MSBU a1, r9, r8 - checkacc2 2 a1 0X7E 0xFFFF 0x0001 - - exit0 diff --git a/sim/testsuite/d10v-elf/t-mulxu.s b/sim/testsuite/d10v-elf/t-mulxu.s deleted file mode 100644 index a8e6ffc..0000000 --- a/sim/testsuite/d10v-elf/t-mulxu.s +++ /dev/null @@ -1,28 +0,0 @@ -.include "t-macros.i" - - start - - ;; clear FX - ldi r2, #0x8005 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_mulxu1: - MULXU a1, r9, r8 - checkacc2 1 a1 0x00 0x8000 0x7FFF - - - ;; set FX - ldi r2, #0x8085 - mvtc r2, cr0 - - loadacc2 a1 0x7f 0xffff 0xffff - ldi r8, 0xffff - ldi r9, 0x8001 -test_mulxu2: - MULXU a1, r9, r8 - checkacc2 2 a1 0x01 0x0000 0xFFFE - - exit0 diff --git a/sim/testsuite/d10v-elf/t-mvtac.s b/sim/testsuite/d10v-elf/t-mvtac.s deleted file mode 100644 index 68452dc..0000000 --- a/sim/testsuite/d10v-elf/t-mvtac.s +++ /dev/null @@ -1,19 +0,0 @@ -.include "t-macros.i" - - start - - ldi r8, 0xbeef - mvtaclo r8, a0 - checkacc2 1 a0 0xff 0xffff 0xbeef - - mvtacg r0, a0 - checkacc2 2 a0 0x00 0xffff 0xbeef - - ldi r8, 0xdead - mvtachi r8, a0 - checkacc2 3 a0 0xff 0xdead 0xbeef - - loadacc2 a1 0xfe 0xbeef 0xdead - checkacc2 4 a1 0xfe 0xbeef 0xdead - - exit0 diff --git a/sim/testsuite/d10v-elf/t-mvtc.s b/sim/testsuite/d10v-elf/t-mvtc.s deleted file mode 100644 index ce2c1de..0000000 --- a/sim/testsuite/d10v-elf/t-mvtc.s +++ /dev/null @@ -1,53 +0,0 @@ -.include "t-macros.i" - - start - - loadpsw2 PSW_SM - checkpsw2 1 PSW_SM - - loadpsw2 PSW_01 - checkpsw2 2 0 ;; PSW_01 - - loadpsw2 PSW_EA - checkpsw2 3 PSW_EA - - loadpsw2 PSW_DB - checkpsw2 4 PSW_DB - - loadpsw2 PSW_DM - checkpsw2 5 PSW_DM - - loadpsw2 PSW_IE - checkpsw2 6 PSW_IE - - loadpsw2 PSW_RP - checkpsw2 7 PSW_RP - - loadpsw2 PSW_MD - checkpsw2 8 PSW_MD - - loadpsw2 PSW_FX|PSW_ST - checkpsw2 9 PSW_FX|PSW_ST - - ;; loadpsw2 PSW_ST - ;; checkpsw2 10 - - loadpsw2 PSW_10 - checkpsw2 11 0 ;; PSW_10 - - loadpsw2 PSW_11 - checkpsw2 12 0 ;; PSW_11 - - loadpsw2 PSW_F0 - checkpsw2 13 PSW_F0 - - loadpsw2 PSW_F1 - checkpsw2 14 PSW_F1 - - loadpsw2 PSW_14 - checkpsw2 15 0 ;; PSW_14 - - loadpsw2 PSW_C - checkpsw2 16 PSW_C - - exit0 diff --git a/sim/testsuite/d10v-elf/t-rac.s b/sim/testsuite/d10v-elf/t-rac.s deleted file mode 100644 index f212311..0000000 --- a/sim/testsuite/d10v-elf/t-rac.s +++ /dev/null @@ -1,16 +0,0 @@ -.include "t-macros.i" - - start - - ;; clear FX - loadpsw2 0x8004 - loadacc2 a0 0x80 0x0000 0x0000 - loadacc2 a1 0x00 0x0000 0x5000 - load r10 0x0123 - load r11 0x4567 -test_rac1: - RAC r10, a0, #-2 - checkpsw2 1 0x8008 - check2w2 2 r10 0x8000 0x0000 - - exit0 diff --git a/sim/testsuite/d10v-elf/t-rachi.s b/sim/testsuite/d10v-elf/t-rachi.s deleted file mode 100644 index 479839c..0000000 --- a/sim/testsuite/d10v-elf/t-rachi.s +++ /dev/null @@ -1,32 +0,0 @@ -.include "t-macros.i" - - start - - load r2 0x7FFF8000 - mv2wtac r2, a0 -test_rachi_1: - rachi r4, a0, 0 - check1 r4 0x7FFF - - - load r2 0x80001000 - mv2wtac r2, a0 -test_rachi_2: - rachi r4, a0, 0 - check1 r4 0x8000 - - - load r2 0x1000A000 - mv2wtac r2, a0 -test_rachi_3: - rachi r4, a0, 0 - check1 r4 0x1001 - - - load r2 0xA0007FFF - mv2wtac r2, a0 -test_rachi_4: - rachi r4, a0, 0 - check1 r4 0xa000 - - exit0 diff --git a/sim/testsuite/d10v-elf/t-rdt.s b/sim/testsuite/d10v-elf/t-rdt.s deleted file mode 100644 index 661b583..0000000 --- a/sim/testsuite/d10v-elf/t-rdt.s +++ /dev/null @@ -1,18 +0,0 @@ -.include "t-macros.i" - - start - - PSW_BITS = PSW_C|PSW_F0|PSW_F1 - - ldi r6, #success@word - mvtc r6, dpc - ldi r6, #PSW_BITS - mvtc r6, dpsw - -test_rdt: - RTD - exit47 - -success: - checkpsw2 1 PSW_BITS - exit0 diff --git a/sim/testsuite/d10v-elf/t-rep.s b/sim/testsuite/d10v-elf/t-rep.s deleted file mode 100644 index b539bd2..0000000 --- a/sim/testsuite/d10v-elf/t-rep.s +++ /dev/null @@ -1,26 +0,0 @@ -.include "t-macros.i" - - start - - - - # Check that the instruction @REP_E is executed when it - # is reached using a branch instruction - - ldi r2, 1 -test_rep_1: - rep r2, end_rep_1 - nop || nop - nop || nop - nop || nop - nop || nop - ldi r3, 46 - bra end_rep_1 - ldi r3, 42 -end_rep_1: - addi r3, 1 - - check 1 r3 47 - - - exit0 diff --git a/sim/testsuite/d10v-elf/t-rte.s b/sim/testsuite/d10v-elf/t-rte.s deleted file mode 100644 index 5ce31dd..0000000 --- a/sim/testsuite/d10v-elf/t-rte.s +++ /dev/null @@ -1,18 +0,0 @@ -.include "t-macros.i" - - start - - PSW_BITS = PSW_C|PSW_F0|PSW_F1 - - ldi r6, #success@word - mvtc r6, bpc - ldi r6, #PSW_BITS - mvtc r6, bpsw - -test_rte: - RTE - exit47 - -success: - checkpsw2 1 PSW_BITS - exit0 diff --git a/sim/testsuite/d10v-elf/t-sadd.s b/sim/testsuite/d10v-elf/t-sadd.s deleted file mode 100644 index f3e4ebe..0000000 --- a/sim/testsuite/d10v-elf/t-sadd.s +++ /dev/null @@ -1,38 +0,0 @@ -.include "t-macros.i" - - start - - PSW_BITS = PSW_FX|PSW_ST|PSW_SM - loadpsw2 PSW_BITS - - ;; Test normal sadd - - loadacc2 a0 0x00 0x7fff 0xffff - loadacc2 a1 0xff 0x8000 0x0000 - sadd a1, a0 - checkacc2 1 a0 0x00 0x7fff 0xffff - checkacc2 2 a1 0xff 0x8000 0x7fff - - ;; Test overflow - - loadacc2 a0 0x00 0x0000 0x0000 - loadacc2 a1 0x01 0x8000 0x0000 - sadd a1, a0 - checkacc2 3 a0 0x00 0x0000 0x0000 - checkacc2 4 a1 0x00 0x7fff 0xffff - - loadacc2 a0 0x00 0xffff 0xffff - loadacc2 a1 0x00 0xffff 0xffff - sadd a1, a0 - checkacc2 5 a1 0x00 0x7fff 0xffff - checkacc2 6 a0 0x00 0xffff 0xffff - - ;; Test underflow - - loadacc2 a0 0x00 0x0000 0x0000 - loadacc2 a1 0x80 0x8000 0x0000 - sadd a1, a0 - checkacc2 7 a0 0x00 0x0000 0x0000 - checkacc2 8 a1 0xff 0x8000 0x0000 - - exit0 diff --git a/sim/testsuite/d10v-elf/t-sp.s b/sim/testsuite/d10v-elf/t-sp.s deleted file mode 100644 index 84f9ad4..0000000 --- a/sim/testsuite/d10v-elf/t-sp.s +++ /dev/null @@ -1,17 +0,0 @@ -.include "t-macros.i" - - start - -;;; Read/Write values to SPU/SPI - - loadpsw2 0 - ldi sp, 0xdead - loadpsw2 PSW_SM - ldi sp, 0xbeef - - loadpsw2 0 - check 1 sp 0xdead - loadpsw2 PSW_SM - check 2 sp 0xbeef - - exit0 diff --git a/sim/testsuite/d10v-elf/t-sub.s b/sim/testsuite/d10v-elf/t-sub.s deleted file mode 100644 index 26d0a3a..0000000 --- a/sim/testsuite/d10v-elf/t-sub.s +++ /dev/null @@ -1,42 +0,0 @@ -.include "t-macros.i" - - start - -;; The d10v implements negated addition for subtraction - - .macro check_sub s x y r c - ;; clear carry - ldi r6,#0x8004 - mvtc r6,cr0 - ;; subtract - ldi r10,#\x - ldi r11,#\y - sub r10, r11 - ;; verify result - ldi r12, #\r - cmpeq r10, r12 - brf0t 1f - ldi r6, 1 - ldi r2, #\s - trap 15 -1: - ;; verify carry - mvfc r6, cr0 - and3 r6, r6, #1 - cmpeqi r6, #\c - brf0t 1f - ldi r6, 1 - ldi r2, #\s - trap 15 -1: - .endm - -check_sub 1 0x0000 0x0000 0x0000 1 -check_sub 2 0x0000 0x0001 0xffff 0 -check_sub 3 0x0001 0x0000 0x0001 1 -check_sub 4 0x0001 0x0001 0x0000 1 -check_sub 5 0x0000 0x8000 0x8000 0 -check_sub 6 0x8000 0x0001 0x7fff 1 -check_sub 7 0x7fff 0x7fff 0x0000 1 - - exit0 diff --git a/sim/testsuite/d10v-elf/t-sub2w.s b/sim/testsuite/d10v-elf/t-sub2w.s deleted file mode 100644 index e1d67be..0000000 --- a/sim/testsuite/d10v-elf/t-sub2w.s +++ /dev/null @@ -1,57 +0,0 @@ -.include "t-macros.i" - - start - -;; The d10v implements negated addition for subtraction - - .macro check_sub2w s x y r c v - - ;; clear carry - ldi r6,#0x8004 - mvtc r6,cr0 - - ;; load opnds - ld2w r6, @(1f,r0) - ld2w r8, @(2f,r0) - .data -1: .long \x -2: .long \y - .text - - ;; subtract - SUB2W r6, r8 - - ;; verify result - ld2w r10, @(1f,r0) - .data -1: .long \r - .text - cmpeq r6, r10 - brf0f 2f - cmpeq r7, r11 - brf0t 3f -2: ldi r6, 1 - ldi r2, \s - trap 15 -3: - - ;; verify carry - mvfc r6, cr0 - and3 r6, r6, #1 - cmpeqi r6, #\c - brf0t 1f - ldi r6, 1 - ldi r2, \s - trap 15 -1: - .endm - -check_sub2w 1 0x00000000 0x00000000 0x00000000 1 0 -check_sub2w 2 0x00000000 0x00000001 0xffffffff 0 0 -check_sub2w 3 0x00000001 0x00000000 0x00000001 1 0 -check_sub2w 3 0x00000001 0x00000001 0x00000000 1 0 -check_sub2w 5 0x00000000 0x80000000 0x80000000 0 1 -check_sub2w 6 0x80000000 0x00000001 0x7fffffff 1 1 -check_sub2w 7 0x7fffffff 0x7fffffff 0x00000000 1 0 - - exit0 diff --git a/sim/testsuite/d10v-elf/t-subi.s b/sim/testsuite/d10v-elf/t-subi.s deleted file mode 100644 index 61c9a5a..0000000 --- a/sim/testsuite/d10v-elf/t-subi.s +++ /dev/null @@ -1,17 +0,0 @@ -.include "t-macros.i" - - start - - - - ;; Check carry/overflow set for 0x8000 - 1 -> 1:0x7fff - ldi r10,#0x8000 - ldi r6,#0x8004 - mvtc r6,cr0 -test_subi: - SUBI r10,#1 || nop - mvfc r6,cr0 - check1 r10 0x7FFF - check1 r6 0x8005 ;<--- Carry should be ON. - - exit0 diff --git a/sim/testsuite/d10v-elf/t-trap.s b/sim/testsuite/d10v-elf/t-trap.s deleted file mode 100644 index 6ac4ae0..0000000 --- a/sim/testsuite/d10v-elf/t-trap.s +++ /dev/null @@ -1,5 +0,0 @@ -.include "t-macros.i" - - start - - exit47 diff --git a/sim/testsuite/d30v-elf/.Sanitize b/sim/testsuite/d30v-elf/.Sanitize deleted file mode 100644 index 2b505c5..0000000 --- a/sim/testsuite/d30v-elf/.Sanitize +++ /dev/null @@ -1,79 +0,0 @@ -# .Sanitize for devo/sim/testsuite. - -# Each directory to survive its way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this directory. - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Do-last:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -br-bra.S -br-bratnz.S -br-bratzr.S -br-bsr.S -br-dbra.S -br-djmp.S -br-djsr.S -configure -configure.in -do-2wordops.S -do-flags.S -do-shifts.S -em-e0.S -em-e47.S -em-pchr.S -em-pstr.S -exit47.s -hello.s -loop.s -ls-ld2h.S -ls-ld2w.S -ls-ld4bh.S -ls-ld4bhu.S -ls-ldb.S -ls-ldbu.S -ls-ldh.S -ls-ldhh.S -ls-ldhu.S -ls-ldw.S -ls-moddec.S -ls-modinc.S -ls-modaddr.S -ls-st2h.S -ls-st2w.S -ls-st4hb.S -ls-stb.S -ls-sth.S -ls-sthh.S -ls-stw.S -os-dbt.S -tick.s -trap.S - -Things-to-lose: - -# The lines between the "Do-last:" line and the end of the file -# are executed as a /bin/sh shell script after everything else is -# done. - -Do-last: - -# eof diff --git a/sim/testsuite/d30v-elf/ChangeLog b/sim/testsuite/d30v-elf/ChangeLog deleted file mode 100644 index 85ba059..0000000 --- a/sim/testsuite/d30v-elf/ChangeLog +++ /dev/null @@ -1,56 +0,0 @@ -1999-01-11 Frank Ch. Eigler <fche@cygnus.com> - - * do-flags.S: New test for parallel PSW update conflicts. - * Makefile.in (TESTS): Run it. - -1999-01-07 Frank Ch. Eigler <fche@cygnus.com> - - * do-2wordops.S: New test for sign-extension by ld2h. - -1998-12-08 Frank Ch. Eigler <fche@cygnus.com> - - * do-2wordops.S: New test for double-word load-like operations. - -1998-12-04 Frank Ch. Eigler <fche@cygnus.com> - - * do-shifts.S: Update an older test case. - -1998-12-03 Frank Ch. Eigler <fche@cygnus.com> - - * do-shifts.S: New test for more SRC shift counts. - -1998-11-22 Frank Ch. Eigler <fche@cygnus.com> - - * do-shifts.S: New test for large SRC shift counts. - -1998-11-12 Frank Ch. Eigler <fche@cygnus.com> - - * br-djsr.S: New test for new R62-update timing. - -1998-11-06 Frank Ch. Eigler <fche@cygnus.com> - - * do-shifts.S: Add test for large mvfacc shifts. - -Tue Oct 13 10:54:51 EDT 1998 Frank Ch. Eigler <fche@cygnus.com> - - * Makefile.in (TESTS): Added do-shifts test case. - * do-shifts.S: New file. - -Wed Apr 29 12:49:00 1998 Frank Ch. Eigler <fche@cygnus.com> - - * ls-modaddr.S: New test for modular addressing. - * Makefile.in: Run it. - -Wed Sep 3 14:33:35 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (.S.run): Replace .d30v with .run. - -Wed Apr 2 14:10:43 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * Makefile.in (.d30v.ko): Limit the cpu time to 5 seconds. - -Wed Mar 26 11:13:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com> - - * Makefile.in (.d30v.ko): Disable the shell's exit-on-error which - is enabled by BSD style make. - diff --git a/sim/testsuite/d30v-elf/Makefile.in b/sim/testsuite/d30v-elf/Makefile.in deleted file mode 100644 index f09a5ba..0000000 --- a/sim/testsuite/d30v-elf/Makefile.in +++ /dev/null @@ -1,208 +0,0 @@ -# Makefile for regression testing the GNU debugger. -# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# GDB is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -VPATH = @srcdir@ -srcdir = @srcdir@ -srcroot = $(srcdir)/.. - -prefix = @prefix@ -exec_prefix = @exec_prefix@ - -host_alias = @host_alias@ -target_alias = @target_alias@ -program_transform_name = @program_transform_name@ -build_canonical = @build@ -host_canonical = @host@ -target_canonical = @target@ -target_cpu = @target_cpu@ - - -SHELL = /bin/sh -SUBDIRS = @subdirs@ -RPATH_ENVVAR = @RPATH_ENVVAR@ - -EXPECT = `if [ -f $${rootme}/../../expect/expect ] ; then \ - echo $${rootme}/../../expect/expect ; \ - else echo expect ; fi` - -RUNTEST = $(RUNTEST_FOR_TARGET) - -RUNTESTFLAGS = - -RUNTEST_FOR_TARGET = `\ - if [ -f $${srcdir}/../../../dejagnu/runtest ]; then \ - echo $${srcdir}/../../../dejagnu/runtest; \ - else \ - if [ "$(host_canonical)" = "$(target_canonical)" ]; then \ - echo runtest; \ - else \ - t='$(program_transform_name)'; echo runtest | sed -e '' $$t; \ - fi; \ - fi` - - -AS_FOR_TARGET = `\ - if [ -x ../../../gas/as.new ]; then \ - echo ../../../gas/as.new ; \ - else \ - echo $(target_alias)-as ; \ - fi` - -LD_FOR_TARGET = `\ - if [ -x ../../../ld/ld.new ]; then \ - echo ../../../ld/ld.new ; \ - else \ - echo $(target_alias)-ld ; \ - fi` - -RUN_FOR_TARGET = `\ - if [ -x ../../../sim/${target_cpu}/run ]; then \ - echo ../../../sim/${target_cpu}/run ; \ - else \ - echo $(target_alias)-run ; \ - fi` - -TESTS = \ - em-e0.ok \ - em-e47.ko \ - em-pstr.hi \ - em-pchr.hi \ - \ - ls-ld2h.ko \ - ls-ld2w.ko \ - ls-ld4bh.ko \ - ls-ld4bhu.ko \ - ls-ldb.ko \ - ls-ldbu.ko \ - ls-ldh.ko \ - ls-ldhh.ko \ - ls-ldhu.ko \ - ls-ldw.ko \ - ls-moddec.ko \ - ls-modinc.ko \ - ls-st2h.hi \ - ls-st2w.hi \ - ls-st4hb.hi \ - ls-stb.hi \ - ls-sth.hi \ - ls-sthh.hi \ - ls-stw.hi \ - \ - br-bra.ok \ - br-bratnz.ok \ - br-bratzr.ok \ - br-bsr.ok \ - br-dbra.ko \ - br-djmp.ko \ - br-djsr.ok \ - -check: sanity $(TESTS) -sanity: - @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET) - @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET) - @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET) - - - -# Rules for running all the tests, put into three types -# exit success, exit fail, print "Hello World" - -.u.log: - uudecode $*.u - $(RUN_FOR_TARGET) $* > $*.log - - -# Rules for running the tests - -.SUFFIXES: .u .ok .d30v .hi .ko -.d30v.ok: - rm -f tmp-$* $*.hi - $(RUN_FOR_TARGET) $*.d30v > tmp-$* - mv tmp-$* $*.ok -.d30v.hi: - rm -f tmp-$* $*.hi diff-$* - $(RUN_FOR_TARGET) $*.d30v > tmp-$* - echo "Hello World" | diff - tmp-$* > diff-$* - cat tmp-$* diff-$* > $*.hi -.d30v.ko: - rm -f tmp-$* $*.ko - $(RUN_FOR_TARGET) $*.d30v > tmp-$* ; \ - if [ $$? -eq 47 ] ; then \ - exit 0 ; \ - else \ - exit 1 ; \ - fi - mv tmp-$* $*.ko - - -# Rules for building all the tests and packing them into -# uuencoded files. - -uuencode: em-pstr.u em-e0.u em-e47.u em-pchr.u - -.SUFFIXES: .u .S .d30v -.S.u: - rm -f $*.o $*.d30v - $(AS_FOR_TARGET) $(srcdir)/$*.S -o $*.o - $(LD_FOR_TARGET) -o $* $*.o - uuencode < $* $* > $*.u - rm -f $*.o $* -.S.d30v: - rm -f $*.o $*.d30v - $(AS_FOR_TARGET) $(srcdir)/$*.S -o $*.o - $(LD_FOR_TARGET) -o $*.d30v $*.o - rm -f $*.o $* - - - -# -# Standard -# -clean mostlyclean: - -rm -f *~ core *.o a.out *.x *.grt - rm -f $(TESTS) -# if [ x"${SUBDIRS}" != x ] ; then \ -# for dir in ${SUBDIRS}; \ -# do \ -# echo "$$dir:"; \ -# if [ -d $$dir ]; then \ -# (cd $$dir; $(MAKE) clean); \ -# fi; \ -# done ; \ -# else true; fi - -distclean maintainer-clean realclean: clean - -rm -f *~ core - -rm -f Makefile config.status *-init.exp - -rm -fr *.log summary detail *.plog *.sum *.psum site.* -# if [ x"${SUBDIRS}" != x ] ; then \ -# for dir in ${SUBDIRS}; \ -# do \ -# echo "$$dir:"; \ -# if [ -d $$dir ]; then \ -# (cd $$dir; $(MAKE) distclean); \ -# fi; \ -# done ; \ -# else true; fi - -Makefile : Makefile.in config.status - $(SHELL) config.status - -config.status: configure - $(SHELL) config.status --recheck diff --git a/sim/testsuite/d30v-elf/br-bra.S b/sim/testsuite/d30v-elf/br-bra.S deleted file mode 100644 index 7758b82..0000000 --- a/sim/testsuite/d30v-elf/br-bra.S +++ /dev/null @@ -1,12 +0,0 @@ - add r3, r0, dest1 - sub r3, r3, off1 -off1: - bra r3 - - .align 4 -dest1: - bra dest2 - - .align 5 -dest2: - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/br-bratnz.S b/sim/testsuite/d30v-elf/br-bratnz.S deleted file mode 100644 index cea048a..0000000 --- a/sim/testsuite/d30v-elf/br-bratnz.S +++ /dev/null @@ -1,12 +0,0 @@ - add r3, r0, dest1 - sub r3, r3, off1 -off1: - bratnz r3, r3 - - .align 4 -dest1: - bratnz r0, dest2 - .long 0x0e000004, 0x00f00000 - - .align 5 -dest2: diff --git a/sim/testsuite/d30v-elf/br-bratzr.S b/sim/testsuite/d30v-elf/br-bratzr.S deleted file mode 100644 index 783336e..0000000 --- a/sim/testsuite/d30v-elf/br-bratzr.S +++ /dev/null @@ -1,12 +0,0 @@ - add r3, r0, dest1 - sub r3, r3, off1 -off1: - bratzr r2, r3 - - .align 4 -dest1: - bratzr r3, dest2 - .long 0x0e000004, 0x00f00000 - - .align 5 -dest2: diff --git a/sim/testsuite/d30v-elf/br-bsr.S b/sim/testsuite/d30v-elf/br-bsr.S deleted file mode 100644 index 7629f97..0000000 --- a/sim/testsuite/d30v-elf/br-bsr.S +++ /dev/null @@ -1,12 +0,0 @@ - # verify that the return address is set correctly - add r2, r0, 1 - add r3, r0, dest1 - sub r3, r3, off1 -off1: - bsr r3 || nop -ret1: - - .align 5 -dest1: - sub r2, r62, ret1 - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/br-dbra.S b/sim/testsuite/d30v-elf/br-dbra.S deleted file mode 100644 index 887c59f..0000000 --- a/sim/testsuite/d30v-elf/br-dbra.S +++ /dev/null @@ -1,83 +0,0 @@ -# perform a delayed branch 47 instructions later - add r3, r0, 47 - srl r3, r3, -3 - dbra r3, dest - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - -.align 4 -dest: - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/br-djmp.S b/sim/testsuite/d30v-elf/br-djmp.S deleted file mode 100644 index 01af996..0000000 --- a/sim/testsuite/d30v-elf/br-djmp.S +++ /dev/null @@ -1,83 +0,0 @@ -# perform a delayed jump 47 instructions later - add r3, r0, insn47 - djmp r3, dest - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop -insn47: # actually 45 - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - -.align 4 -dest: - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/br-djsr.S b/sim/testsuite/d30v-elf/br-djsr.S deleted file mode 100644 index e56e336..0000000 --- a/sim/testsuite/d30v-elf/br-djsr.S +++ /dev/null @@ -1,43 +0,0 @@ -# check return address correctly set by a djsr insn - add r3, r0, last - sub r3, r3, start -start: - djsr r3, dest - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop -last: - add r2, r2, 1 || nop -nexti: - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - add r2, r2, 1 || nop - -.align 4 -dest: - sub r2, r62, nexti - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/configure b/sim/testsuite/d30v-elf/configure deleted file mode 100755 index 94518a0..0000000 --- a/sim/testsuite/d30v-elf/configure +++ /dev/null @@ -1,833 +0,0 @@ -#! /bin/sh - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.10 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; the Free Software Foundation -# gives unlimited permission to copy, distribute and modify it. - -# Defaults: -ac_help= -ac_default_prefix=/usr/local -# Any additions from configure.in: - -# Initialize some variables set by options. -# The variables have the same names as the options, with -# dashes changed to underlines. -build=NONE -cache_file=./config.cache -exec_prefix=NONE -host=NONE -no_create= -nonopt=NONE -no_recursion= -prefix=NONE -program_prefix=NONE -program_suffix=NONE -program_transform_name=s,x,x, -silent= -site= -srcdir= -target=NONE -verbose= -x_includes=NONE -x_libraries=NONE -bindir='${exec_prefix}/bin' -sbindir='${exec_prefix}/sbin' -libexecdir='${exec_prefix}/libexec' -datadir='${prefix}/share' -sysconfdir='${prefix}/etc' -sharedstatedir='${prefix}/com' -localstatedir='${prefix}/var' -libdir='${exec_prefix}/lib' -includedir='${prefix}/include' -oldincludedir='/usr/include' -infodir='${prefix}/info' -mandir='${prefix}/man' - -# Initialize some other variables. -subdirs= -MFLAGS= MAKEFLAGS= - -ac_prev= -for ac_option -do - - # If the previous option needs an argument, assign it. - if test -n "$ac_prev"; then - eval "$ac_prev=\$ac_option" - ac_prev= - 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For more information, check -dnl any existing configure script. - -AC_PREREQ(2.5) -dnl FIXME - think of a truly uniq file to this directory -AC_INIT(Makefile.in) - -CC=${CC-cc} -AC_SUBST(CC) -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..) -AC_CANONICAL_SYSTEM - -AC_SUBST(target_cpu) - - -AC_OUTPUT(Makefile) diff --git a/sim/testsuite/d30v-elf/do-flags.S b/sim/testsuite/d30v-elf/do-flags.S deleted file mode 100644 index 334c1eb..0000000 --- a/sim/testsuite/d30v-elf/do-flags.S +++ /dev/null @@ -1,190 +0,0 @@ - # Test macro - - .macro assert reg,value - cmpeq f0,\reg,\value - bra/fx fail - .endm - - - # PR 16993 - a.s - - add r8,r0,0x80005555 ; for psw - add r9,r0,0x80000000 ; for psw - add r40,r0,0x11111111 ; - add r41,r0,0x22222222 ; - add r42,r0,0x00000000 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||add r42,r40,r41,; - - mvfsys r10,psw - assert r10, 0x80000000 - - - # PR 16995 - b.s - - add r8,r0,0x80000000 ; for psw - add r9,r0,0x80005555 ; for psw - add r10,r0,0x00000000 ; - add r40,r0,0x11111111 ; - add r41,r0,0x22222222 ; - add r42,r0,0x00000000 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||add r42,r40,r41,; - - mvfsys r10,psw - assert r10, 0x80005544 - - - # PR 17006 - c.s - - add r8,r0,0x80005555 ; for psw - add r9,r0,0x80000000 ; for psw - add r10,r0,0x00000000 ; - add r40,r0,0x00000011 ; - add r41,r0,0x00000011 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||cmpeq f5,r40,r41,; - - mvfsys r10,psw - assert r10, 0x80000010 - - - # PR 17006 - d.s - - add r9,r0,0x80000000 ; for psw - add r40,r0,0x00000011 ; - add r41,r0,0x00000011 ; - nop ||nop - mvtsys psw, r9 || nop - nop ||nop - nop ||cmpeq f5,r40,r41,; - - mvfsys r10,psw - assert r10, 0x80000010 - - - # PR 17106 - a.s - - ; test 000 ; mvtsys(s=0) || sathl(s=0) prallel execution test - add r8,r0,0x80005555 ; for psw - add r9,r0,0x80000000 ; for psw - add r40,r0,0x00000044 ; - add r41,r0,0x00000008 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||sathl r30,r40,r41,; - mvfsys r20, psw ||nop - ;------------------------------- - ; test 001 ; mvtsys(s=0) || sathl(s=1) prallel execution test - _test_001: - add r40,r0,0x00004444 ; - add r41,r0,0x00000008 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||sathl r31,r40,r41,; - mvfsys r21,psw ||nop - ;------------------------------- - ; test 002 ; mvtsys(s=1) || sathl(s=0) prallel execution test - add r8,r0,0x80000000 ; for psw - add r9,r0,0x80005555 ; for psw - add r40,r0,0x00000044 ; - add r41,r0,0x00000008 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||sathl r32,r40,r41,; - mvfsys r22,psw ||nop - ;------------------------------- - ; test 003 ; mvtsys(s=1) || sathl(s=1) prallel execution test - ; init-reg - add r40,r0,0x00004444 ; - add r41,r0,0x00000008 ; - mvtsys psw,r8 ||nop - mvtsys psw,r9 ||sathl r33,r40,r41,; - mvfsys r23,psw ||nop - - assert r20, 0x80000000 - assert r21, 0x80000040 - assert r22, 0x80005555 - assert r23, 0x80005515 - - - # PR 18288 - a.s - - ;------------------------------------------------------------------------ - ; mvtsys (C =1, V= VA = 0) || addc (C= V= VA =0) - ;------------------------------------------------------------------------ - test_000b: - add r1,r0,1 ||nop ; set C bit - mvtsys psw r0 ||nop - mvtsys psw r1 ||addc r20,r0,1 - mvfsys r10,psw ||nop - ; C changed in MU is not used in IU. - ; IU prevail for resulting C. - ;------------------------------------------------------------------------ - ; mvtsys (V =1, C = VA = 0) || add (C= V= VA =0) - ;------------------------------------------------------------------------ - test_001b: - add r1,r0,0x10 ||nop ; set V bit - mvtsys psw r0 ||nop - mvtsys psw r1 ||add r0,r0,r0 - mvfsys r11,psw ||nop - ; IU prevail for resulting V. - ;------------------------------------------------------------------------ - ; mvtsys (V = C= VA = 0) || add (C=0,V= VA =1) - ;------------------------------------------------------------------------ - test_002b: - add r1,r0,0x70000000 - add r2,r0,0x30000000 - mvtsys psw r0 ||nop - mvtsys psw r0 ||add r0,r1,r2 - mvfsys r12,psw ||nop - ; IU prevail for resulting V. - ; VA is set(OR'ed) - ;------------------------------------------------------------------------ - ; mvtsys (C= 0 V = VA = 1) || add (C= V= VA =0) - ;------------------------------------------------------------------------ - test_003b: - add r1,r0,0x14 ||nop ; set V and VA bit - mvtsys psw r0 ||nop - mvtsys psw r1 ||add r0,r0,r0 - mvfsys r13,psw ||nop - ; IU prevail for resulging V - ; VA is set(OR'ed) - ;------------------------------------------------------------------------ - ; mvtsys (f3 =1) || orfg (f3) : GROUP_B - ;------------------------------------------------------------------------ - test_004b: - add r1,r0,0x100 ; set f3 - mvtsys psw r0 ||nop - mvtsys psw,r1 ||orfg f3,f3,0 - mvfsys r14,psw ||nop - ; results of IU prevail. - ;------------------------------------------------------------------------ - ; mvtsys (f4 =1) || sathp - ;------------------------------------------------------------------------ - test_005b: - add r1,r0,0x40 ; set f4 - mvtsys psw r0 ||nop - mvtsys psw r1 ||sathl r2,r1,3 - mvfsys r15,psw ||nop - ; results of MU is used in IU - - assert r20, 0x1 - assert r10, 0x0 - assert r11, 0x0 - assert r12, 0x14 - assert r13, 0x4 - assert r14, 0x0 - assert r15, 0x0 - - - # all okay - - bra ok - -ok: - add r2, r0, 0 - .long 0x0e000004 - nop - -fail: - add r2, r0, 47 - .long 0x0e000004 - nop diff --git a/sim/testsuite/d30v-elf/do-shifts.S b/sim/testsuite/d30v-elf/do-shifts.S deleted file mode 100644 index 81ef4ca..0000000 --- a/sim/testsuite/d30v-elf/do-shifts.S +++ /dev/null @@ -1,127 +0,0 @@ - # Test macro - - .macro assert reg,value - cmpeq f0,\reg,\value - bra/fx fail - .endm - - - # PR 14580 - a.s - - add r8,r0,0x11112222 - add r9,r0,-32 - sra r1,r8,r9 ||nop - sra r2,r8,-32 ||nop - srl r3,r8,r9 ||nop - srl r4,r8,-32 ||nop - - assert r1, 0 - assert r2, 0 - assert r3, 0 - assert r4, 0 - - - # PR 17266 - a.s - - add r20, r0, 0xffffffff - add r21, r0, 0xffffffff - add r22, r0, 0xffffffff - add r23, r0, 0xffffffff - add r1, r0, 0x12345678 - add r2, r0, -33 - srahh r20, r1, r2 - srahl r21, r1, r2 - srlhh r22, r1, r2 - srlhl r23, r1, r2 - sra r24, r1, r2 - srl r25, r1, r2 - rot r26, r1, r2 - - assert r20, 0xacf0ffff - assert r21, 0xffffacf0 - assert r22, 0xacf0ffff - assert r23, 0xffffacf0 - assert r24, 0x2468acf0 - assert r25, 0x2468acf0 - assert r26, 0x2468acf0 - - - # PR 17266 - a2.s - - add r20, r0, 0xffffffff - add r21, r0, 0xffffffff - add r22, r0, 0xffffffff - add r23, r0, 0xffffffff - add r1, r0, 0x12345678 - add r2, r0, -17 - sra2h r20, r1, r2 - srl2h r21, r1, r2 - rot2h r22, r1, r2 - - assert r20, 0x2468acf0 - assert r21, 0x2468acf0 - assert r22, 0x2468acf0 - - - # PR 17685 - a.s - - add r20,r0,r0 - add r21,r0,r0 - add r22,r0,r0 - add r23,r0,r0 - add r24,r0,r0 - add r25,r0,r0 - add r30,r0,r0 - add r31,r0,r0 - - add r8,r0,0x55555555 - add r9,r0,0x1f - sra r20,r8,r9 ||nop - srl r21,r8,r9 ||nop - srahh r22,r8,r9 ||nop - srahl r23,r8,r9 ||nop - srlhh r24,r8,r9 ||nop - srlhl r25,r8,r9 ||nop - - add r8,r0,0x5555aaaa - add r9,r0,0x000ffff1 - sra2h r30,r8,r9 ||nop - srl2h r31,r8,r9 ||nop - - assert r20, 0 - assert r21, 0 - assert r22, 0 - assert r23, 0 - assert r24, 0 - assert r25, 0 - assert r30, 0 - assert r31, 0 - - - # PR 18196 - a.s - - add r1,r0,0xfedcba98 - add r2,r0,0x76543210 - add r3,r0,0x41 - add r4,r0,1 - nop || mvtacc a0 r1,r2 - nop || mvfacc r10,a0 r3 - nop || mvfacc r11,a0 r4 - - assert r10, 0x3b2a1908 - assert r11, 0x3b2a1908 - - - # all okay - - bra ok - -ok: - add r2, r0, 0 - .long 0x0e000004 - nop - -fail: - add r2, r0, 47 - .long 0x0e000004 - nop diff --git a/sim/testsuite/d30v-elf/em-e0.S b/sim/testsuite/d30v-elf/em-e0.S deleted file mode 100644 index d2e9335..0000000 --- a/sim/testsuite/d30v-elf/em-e0.S +++ /dev/null @@ -1,4 +0,0 @@ -# Verify that the exit call works - add r2, r0, 0 || nop - .long 0x0e000004 - nop diff --git a/sim/testsuite/d30v-elf/em-e47.S b/sim/testsuite/d30v-elf/em-e47.S deleted file mode 100644 index 9830ffb..0000000 --- a/sim/testsuite/d30v-elf/em-e47.S +++ /dev/null @@ -1,4 +0,0 @@ -# Verify r2 = 47; exit(r47) works - add r2, r0, 47 - .long 0x0e000004 - nop diff --git a/sim/testsuite/d30v-elf/em-pchr.S b/sim/testsuite/d30v-elf/em-pchr.S deleted file mode 100644 index 6b38b0b..0000000 --- a/sim/testsuite/d30v-elf/em-pchr.S +++ /dev/null @@ -1,28 +0,0 @@ - - add r2, r0, 'H' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'e' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'l' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'l' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'o' - .long 0x0e000003, 0x00f00000 - add r2, r0, ' ' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'W' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'o' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'r' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'l' - .long 0x0e000003, 0x00f00000 - add r2, r0, 'd' - .long 0x0e000003, 0x00f00000 - add r2, r0, '\n' || nop - .long 0x0e000003, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/em-pstr.S b/sim/testsuite/d30v-elf/em-pstr.S deleted file mode 100644 index 4612c35..0000000 --- a/sim/testsuite/d30v-elf/em-pstr.S +++ /dev/null @@ -1,8 +0,0 @@ - add r2, r0, hello - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - -hello: .ascii "Hello World\n" diff --git a/sim/testsuite/d30v-elf/exit47.s b/sim/testsuite/d30v-elf/exit47.s deleted file mode 100644 index 9830ffb..0000000 --- a/sim/testsuite/d30v-elf/exit47.s +++ /dev/null @@ -1,4 +0,0 @@ -# Verify r2 = 47; exit(r47) works - add r2, r0, 47 - .long 0x0e000004 - nop diff --git a/sim/testsuite/d30v-elf/hello.s b/sim/testsuite/d30v-elf/hello.s deleted file mode 100644 index 261629e..0000000 --- a/sim/testsuite/d30v-elf/hello.s +++ /dev/null @@ -1,9 +0,0 @@ - - add r2, r0, hello - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - -hello: .ascii "Hello World\r\n" diff --git a/sim/testsuite/d30v-elf/loop.s b/sim/testsuite/d30v-elf/loop.s deleted file mode 100644 index 69f2692..0000000 --- a/sim/testsuite/d30v-elf/loop.s +++ /dev/null @@ -1 +0,0 @@ -loop: bra loop diff --git a/sim/testsuite/d30v-elf/ls-ld2h.S b/sim/testsuite/d30v-elf/ls-ld2h.S deleted file mode 100644 index fade14e..0000000 --- a/sim/testsuite/d30v-elf/ls-ld2h.S +++ /dev/null @@ -1,11 +0,0 @@ - # compute 17(mem) + 30(mem+2) = 47 - add r3, r0, 4 || nop - ld2h r2, @(r3,60) - add r2, r2, r3 || nop - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte 0, 17, 0, 30 diff --git a/sim/testsuite/d30v-elf/ls-ld2w.S b/sim/testsuite/d30v-elf/ls-ld2w.S deleted file mode 100644 index 5b564cc..0000000 --- a/sim/testsuite/d30v-elf/ls-ld2w.S +++ /dev/null @@ -1,12 +0,0 @@ - # compute 17(mem) + 30(mem+4) = 47 - add r3, r0, 4 || nop - ld2w r2, @(r3,60) - add r2, r2, r3 || nop - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte 0, 0, 0, 17 - .byte 0, 0, 0, 30 diff --git a/sim/testsuite/d30v-elf/ls-ld4bh.S b/sim/testsuite/d30v-elf/ls-ld4bh.S deleted file mode 100644 index 6f22ceb..0000000 --- a/sim/testsuite/d30v-elf/ls-ld4bh.S +++ /dev/null @@ -1,12 +0,0 @@ - # compute lo : 17(mem+1) + 30(mem+3) = 47 - # compute hi : -1(mem) + 1(mem+2) = 0 - add r3, r0, 4 || nop - ld4bh r2, @(r3,60) - add r2, r2, r3 || nop - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte -1, 17, 1, 30 diff --git a/sim/testsuite/d30v-elf/ls-ld4bhu.S b/sim/testsuite/d30v-elf/ls-ld4bhu.S deleted file mode 100644 index 4d0a9a3..0000000 --- a/sim/testsuite/d30v-elf/ls-ld4bhu.S +++ /dev/null @@ -1,11 +0,0 @@ - # compute lo : 48(mem+1) + 255(mem+3) - 256 = 47 - add r3, r0, 4 || nop - ld4bhu r2, @(r3,60) - add r2, r2, r3 || nop - sub r2, r2, 0x100 - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte 0, 48, 0, 255 diff --git a/sim/testsuite/d30v-elf/ls-ldb.S b/sim/testsuite/d30v-elf/ls-ldb.S deleted file mode 100644 index c6164ce..0000000 --- a/sim/testsuite/d30v-elf/ls-ldb.S +++ /dev/null @@ -1,11 +0,0 @@ - # compute -2(from mem) + 49 = 47 - add r3, r0, 4 || nop - ldb r2, @(r3,60) - add r2, r2, 49 - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte -2, 0xff, 0xff, 0xff diff --git a/sim/testsuite/d30v-elf/ls-ldbu.S b/sim/testsuite/d30v-elf/ls-ldbu.S deleted file mode 100644 index 153d6a4..0000000 --- a/sim/testsuite/d30v-elf/ls-ldbu.S +++ /dev/null @@ -1,11 +0,0 @@ - # compute 254(mem) - 207 = 47 - add r3, r0, 4 || nop - ldbu r2, @(r3,60) - sub r2, r2, 207 - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte -2, 0xff, 0xff, 0xff diff --git a/sim/testsuite/d30v-elf/ls-ldh.S b/sim/testsuite/d30v-elf/ls-ldh.S deleted file mode 100644 index 0650bc0..0000000 --- a/sim/testsuite/d30v-elf/ls-ldh.S +++ /dev/null @@ -1,11 +0,0 @@ - # load the 47@addr=60 below into r2 - add r3, r0, 4 || nop - ldh r2, @(r3,60) - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte 0, 47, 0xff, 0xff diff --git a/sim/testsuite/d30v-elf/ls-ldhh.S b/sim/testsuite/d30v-elf/ls-ldhh.S deleted file mode 100644 index 146daef..0000000 --- a/sim/testsuite/d30v-elf/ls-ldhh.S +++ /dev/null @@ -1,11 +0,0 @@ - # compute (47 || 0|16) >> 16 - add r3, r0, 4 || nop - ldhh r2, @(r3,60) - srl r2, r2, 16 || nop - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte 0, 47, 0xff, 0xff diff --git a/sim/testsuite/d30v-elf/ls-ldhu.S b/sim/testsuite/d30v-elf/ls-ldhu.S deleted file mode 100644 index b4f50e2..0000000 --- a/sim/testsuite/d30v-elf/ls-ldhu.S +++ /dev/null @@ -1,11 +0,0 @@ - # compute 254(mem) - 207 = 47 - add r3, r0, 4 || nop - ldhu r2, @(r3,60) - sub r2, r2, 207 - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long -1, -1 -# address 64 - remember target is BE - .byte 0xff, -2, 0xff, 0xff diff --git a/sim/testsuite/d30v-elf/ls-ldw.S b/sim/testsuite/d30v-elf/ls-ldw.S deleted file mode 100644 index 78d2ebf..0000000 --- a/sim/testsuite/d30v-elf/ls-ldw.S +++ /dev/null @@ -1,11 +0,0 @@ - # load the 47@addr=60 below into r2 - add r3, r0, 4 || nop - ldw r2, @(r3,60) - .long 0x0e000004, 0x00f00000 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long 0, 0 - .long 0, 0 -# address 64 - remember target is BE - .byte 0, 0, 0, 47 diff --git a/sim/testsuite/d30v-elf/ls-modaddr.S b/sim/testsuite/d30v-elf/ls-modaddr.S deleted file mode 100644 index 55634e9..0000000 --- a/sim/testsuite/d30v-elf/ls-modaddr.S +++ /dev/null @@ -1,37 +0,0 @@ - ; Modular address postincrement test - -start: - ; set modular address limits: 0x18 bytes - add r1,r0,0x20000070 ; [start, ... - nop || nop - mvtsys mod_s,r1 || nop - nop || nop - add r1,r0,0x20000088 ; ..., end) - nop || nop - mvtsys mod_e,r1 || nop - - ; program PSW for modular address mode - add r1,r0,0x81000000 - nop || nop - mvtsys psw,r1 || nop - nop || nop - - ; modular autoincrement test - add r30,r0,0x20000070 ; base address = mod_s - ld2w r40,@(r30+,r0) || nop ; after: r30 = ...078 - ld2w r40,@(r30+,r0) || nop ; after: r30 = ...080 - ld2w r40,@(r30+,r0) || nop ; after: r30 = ...070 - - add r29,r0,0x20000070 ; expected end address; wrapping around - cmpeq f1,r30,r29 - bra/xf fail - - ; Q: what about autodecrement? - -ok: - add r2,r0,0 - .long 0x0e000004, 0x00f00000 - -fail: - add r2,r0,47 - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/ls-moddec.S b/sim/testsuite/d30v-elf/ls-moddec.S deleted file mode 100644 index f1b9143..0000000 --- a/sim/testsuite/d30v-elf/ls-moddec.S +++ /dev/null @@ -1,3 +0,0 @@ - add r2, r0, 50 - moddec r2, 3 || nop - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/ls-modinc.S b/sim/testsuite/d30v-elf/ls-modinc.S deleted file mode 100644 index 520c3f6..0000000 --- a/sim/testsuite/d30v-elf/ls-modinc.S +++ /dev/null @@ -1,3 +0,0 @@ - add r2, r0, 40 - modinc r2, 7 || nop - .long 0x0e000004, 0x00f00000 diff --git a/sim/testsuite/d30v-elf/ls-st2h.S b/sim/testsuite/d30v-elf/ls-st2h.S deleted file mode 100644 index d8c4b19..0000000 --- a/sim/testsuite/d30v-elf/ls-st2h.S +++ /dev/null @@ -1,13 +0,0 @@ - add r2, r0, hello - add r4, r0, ('H' << 8) + 'e' - add r5, r0, ('l' << 8) + 'l' - st2h r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "????o World\n" diff --git a/sim/testsuite/d30v-elf/ls-st2w.S b/sim/testsuite/d30v-elf/ls-st2w.S deleted file mode 100644 index 0cd8b66..0000000 --- a/sim/testsuite/d30v-elf/ls-st2w.S +++ /dev/null @@ -1,13 +0,0 @@ - add r2, r0, hello - add r4, r0, ('H' << 24) + ('e' << 16) + ('l' << 8) + ('l' << 0) - add r5, r0, ('o' << 24) + (' ' << 16) + ('W' << 8) + ('o' << 0) - st2w r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "????....rld\n" diff --git a/sim/testsuite/d30v-elf/ls-st4hb.S b/sim/testsuite/d30v-elf/ls-st4hb.S deleted file mode 100644 index bf80225..0000000 --- a/sim/testsuite/d30v-elf/ls-st4hb.S +++ /dev/null @@ -1,13 +0,0 @@ - add r2, r0, hello - add r4, r0, ('H' << 16) + ('e' << 0) - add r5, r0, ('l' << 16) + ('l' << 0) - st4hb r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "????o World\n" diff --git a/sim/testsuite/d30v-elf/ls-stb.S b/sim/testsuite/d30v-elf/ls-stb.S deleted file mode 100644 index 720a85b..0000000 --- a/sim/testsuite/d30v-elf/ls-stb.S +++ /dev/null @@ -1,12 +0,0 @@ - add r2, r0, hello - add r4, r0, 'H' - stb r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "?ello World\n" diff --git a/sim/testsuite/d30v-elf/ls-sth.S b/sim/testsuite/d30v-elf/ls-sth.S deleted file mode 100644 index ff23640..0000000 --- a/sim/testsuite/d30v-elf/ls-sth.S +++ /dev/null @@ -1,12 +0,0 @@ - add r2, r0, hello - add r4, r0, ('H' << 8) + ('e' << 0) - sth r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "??llo World\n" diff --git a/sim/testsuite/d30v-elf/ls-sthh.S b/sim/testsuite/d30v-elf/ls-sthh.S deleted file mode 100644 index 071f309..0000000 --- a/sim/testsuite/d30v-elf/ls-sthh.S +++ /dev/null @@ -1,12 +0,0 @@ - add r2, r0, hello - add r4, r0, ('H' << 24) + ('e' << 16) - sthh r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "??llo World\n" diff --git a/sim/testsuite/d30v-elf/ls-stw.S b/sim/testsuite/d30v-elf/ls-stw.S deleted file mode 100644 index ac17f2a..0000000 --- a/sim/testsuite/d30v-elf/ls-stw.S +++ /dev/null @@ -1,12 +0,0 @@ - add r2, r0, hello - add r4, r0, ('H' << 24) + ('e' << 16) + ('l' << 8) + ('l' << 0) - stw r4, @(r2,0) || nop - # putstr - .long 0x0e000001, 0x00f00000 - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - .align 3 -hello: - .ascii "????o World\n" diff --git a/sim/testsuite/d30v-elf/os-dbt.S b/sim/testsuite/d30v-elf/os-dbt.S deleted file mode 100644 index 3468867..0000000 --- a/sim/testsuite/d30v-elf/os-dbt.S +++ /dev/null @@ -1,38 +0,0 @@ - .globl _start - # - # NOTE: Registers r10-r11 are reserved for the interrupt handler - # while the others can be used by the main loop/start code. - -_start: - # patch the DBT handler - add r1, r0, handler - ldw r2, @(r1, 0) - ldw r3, @(r1, 4) - # DBT vector address - add r1, r0, 0xfffff120 - stw r2, @(r1, 0) - stw r3, @(r1, 4) - - # try out the breakpoint/return - add r2, r0, 47 - #dbt - nop - .long 0x00b00000 - nop - - # exit with what ever the breakpoint hander set r2 to. - nop - .long 0x0e000004 - nop - -handler: - jmp real_handler - - # The Breakpoint handler sets r2 to 0 if PSW was set correctly. -real_handler: - mvfsys r2, cr0 - sub r2, r0, 0x08000000 - #rtd - nop - .long 0x00a00000 - nop diff --git a/sim/testsuite/d30v-elf/tick.s b/sim/testsuite/d30v-elf/tick.s deleted file mode 100644 index d834ca7..0000000 --- a/sim/testsuite/d30v-elf/tick.s +++ /dev/null @@ -1,51 +0,0 @@ - .globl _start - # - # NOTE: Registers r10-r11 are reserved for the interrupt handler - # while the others can be used by the main loop/start code. - -_start: - # patch the external interrupt handlers entry - add r1, r0, handler - ldw r2, @(r1, 0) - ldw r3, @(r1, 4) - add r1, r0, 0xfffff138 - stw r2, @(r1, 0) - stw r3, @(r1, 4) - - # enable external interrupts - cr0 == PSW - mvfsys r2, cr0 - or r2, r0, 0x04000000 - mvtsys cr0, r2 - - - # wait for flag to be set -loop: - add r2, r0, flag - ldw r3, @(r2, 0) - bratzr r3, loop - - # clear the flag - stw r0, @(r2, 0) - - add r2, r0, tick - # putstr - .long 0x0e000001, 0x00f00000 - - bra loop - - # finished - add r2, r0, r0 || nop - .long 0x0e000004, 0x00f00000 - - -handler: - jmp real_handler -real_handler: - add r10, r0, 1 - add r11, r0, flag - stb r10, @(r11,0) - reit - - -flag: .long 0 -tick: .ascii "Tick\r\n" diff --git a/sim/testsuite/d30v-elf/trap.S b/sim/testsuite/d30v-elf/trap.S deleted file mode 100644 index 08399f9..0000000 --- a/sim/testsuite/d30v-elf/trap.S +++ /dev/null @@ -1,35 +0,0 @@ -# verify that trap || cmp works - add r8,r0,0x11223344 ; - add r9,r0,0x11223344 ; - - mvtsys bpsw,r0 || nop - mvtsys bpc,r0 || nop - - add r1,r0,0x97000555 ; for psw - mvtsys psw,r1 || nop - trap 0 || cmpeq f0,r8,r9,; - - .long 0x0e000004, 0x00f00000 - - .section .eit_v, "a" - nop || nop - nop || nop - nop || nop - nop || nop - -# save the old bpsw, psw - mvfsys r4,bpsw || nop - mvfsys r5,psw || nop - -# load up what they should be - add r6,r0,0x97004555 - add r7,r0,0x90000000 - -# verify that they have the right values -# return exit value in r2 -- 0 success, 47 failure - add r2,r0,47 - cmpeq f0,r4,r6 || nop - cmpeq f1,r5,r7 || nop - add/tt r2,r0,r0 || nop - - reit diff --git a/sim/testsuite/fr30-elf/.Sanitize b/sim/testsuite/fr30-elf/.Sanitize deleted file mode 100644 index 12f6158..0000000 --- a/sim/testsuite/fr30-elf/.Sanitize +++ /dev/null @@ -1,38 +0,0 @@ -# Sanitize.in for sim/testsuite/fr30-elf - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -configure.in -configure -exit47.s -hello.s -loop.s - -Things-to-lose: - -Do-last: - -# End of file. diff --git a/sim/testsuite/fr30-elf/ChangeLog b/sim/testsuite/fr30-elf/ChangeLog deleted file mode 100644 index 7bebee0..0000000 --- a/sim/testsuite/fr30-elf/ChangeLog +++ /dev/null @@ -1,4 +0,0 @@ -Mon Nov 23 17:02:47 1998 Dave Brolley <brolley@cygnus.com> - - * Directory created. - diff --git a/sim/testsuite/fr30-elf/Makefile.in b/sim/testsuite/fr30-elf/Makefile.in deleted file mode 100644 index e93c3ef..0000000 --- a/sim/testsuite/fr30-elf/Makefile.in +++ /dev/null @@ -1,157 +0,0 @@ -# Makefile for regression testing the fr30 simulator. -# Copyright (C) 1998 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# GDB is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 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For more information, check -dnl any existing configure script. - -AC_PREREQ(2.5) -dnl FIXME - think of a truly uniq file to this directory -AC_INIT(Makefile.in) - -CC=${CC-cc} -AC_SUBST(CC) -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..) -AC_CANONICAL_SYSTEM - -AC_SUBST(target_cpu) - - -AC_OUTPUT(Makefile) diff --git a/sim/testsuite/fr30-elf/exit47.s b/sim/testsuite/fr30-elf/exit47.s deleted file mode 100644 index 0dc7c99..0000000 --- a/sim/testsuite/fr30-elf/exit47.s +++ /dev/null @@ -1,7 +0,0 @@ - ;; Return with exit code 47. - - .global _start -_start: - ldi32 #47,r4 - ldi32 #1,r0 - int #10 diff --git a/sim/testsuite/fr30-elf/hello.s b/sim/testsuite/fr30-elf/hello.s deleted file mode 100644 index 58f6d51..0000000 --- a/sim/testsuite/fr30-elf/hello.s +++ /dev/null @@ -1,16 +0,0 @@ - .global _start -_start: - -; write (hello world) - ldi32 #14,r6 - ldi32 #0x2c,r5 ; #hello,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 -; exit (0) - ldi32 #0,r4 - ldi32 #1,r0 - int #10 - -length: .long 14 -hello: .ascii "Hello World!\r\n" diff --git a/sim/testsuite/fr30-elf/loop.s b/sim/testsuite/fr30-elf/loop.s deleted file mode 100644 index 709b78f..0000000 --- a/sim/testsuite/fr30-elf/loop.s +++ /dev/null @@ -1,2 +0,0 @@ - .global _start -_start: bra _start diff --git a/sim/testsuite/lib/.Sanitize b/sim/testsuite/lib/.Sanitize deleted file mode 100644 index 5355ca8..0000000 --- a/sim/testsuite/lib/.Sanitize +++ /dev/null @@ -1,34 +0,0 @@ -# .Sanitize for devo/sim/testsuite/lib - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -sim-defs.exp - -Things-to-lose: - - -Do-last: - - -# End of file. diff --git a/sim/testsuite/lib/sim-defs.exp b/sim/testsuite/lib/sim-defs.exp deleted file mode 100644 index 8bc0bf3..0000000 --- a/sim/testsuite/lib/sim-defs.exp +++ /dev/null @@ -1,262 +0,0 @@ -# Simulator dejagnu utilities. - -# Communicate simulator path from sim_init to sim_version. -# For some reason [board_info target sim] doesn't work in sim_version. -# [Presumubly because the target has been "popped" by then. Odd though.] -set sim_path "unknown-run" - -# Initialize the testrun. -# Required by dejagnu. - -proc sim_init { args } { - global sim_path - set sim_path [board_info target sim] - # Need to return an empty string (copied from GAS). - return "" -} - -# Print the version of the simulator being tested. -# Required by dejagnu. - -proc sim_version {} { - global sim_path - set version 0.5 - clone_output "$sim_path $version\n" -} - -# Cover function to target_compile. -# Copied from gdb_compile. - -proc sim_compile { source dest type options } { - set result [target_compile $source $dest $type $options] - regsub "\[\r\n\]*$" "$result" "" result - regsub "^\[\r\n\]*" "$result" "" result - if { $result != "" } { - clone_output "sim compile output: $result" - } - return $result -} - -# Run a program on the simulator. -# Required by dejagnu (at least ${tool}_run used to be). -# -# SIM_OPTS are options for the simulator. -# PROG_OPTS are options passed to the simulated program. -# At present REDIR must be "" or "> foo". -# OPTIONS is a list of options internal to this routine. -# This is modelled after target_compile. We want to be able to add new -# options without having to update all our users. -# Currently: -# env(foo)=val - set environment variable foo to val for this run -# timeout=val - set the timeout to val for this run -# -# The result is a list of two elements. -# The first is one of pass/fail/etc. -# The second is the program's output. -# -# This is different than the sim_load routine provided by -# dejagnu/config/sim.exp. It's not clear how to pass arguments to the -# simulator (not the simulated program, the simulator) with sim_load. - -proc sim_run { prog sim_opts prog_opts redir options } { - global SIMFLAGS - - # Set the default value of the timeout. - # FIXME: The timeout value we actually want is a function of - # host, target, and testcase. - set testcase_timeout [board_info target sim_time_limit] - if { "$testcase_timeout" == "" } { - set testcase_timeout [board_info host testcase_timeout] - } - if { "$testcase_timeout" == "" } { - set testcase_timeout 240 ;# 240 same as in dejagnu/config/sim.exp. - } - - # Initial the environment we pass to the testcase. - set testcase_env "" - - # Process OPTIONS ... - foreach o $options { - if [regexp {^env\((.*)\)=(.*)} $o full var val] { - set testcase_env "$testcase_env $var=$val" - } elseif [regexp {^timeout=(.*)} $o full val] { - set testcase_timeout $val - } - } - - set sim [board_info target sim] - - # FIXME: this works for UNIX only - if { "$testcase_env" != "" } { - set sim "env $testcase_env $sim" - } - - if { "$redir" == "" } { - remote_spawn host "$sim $SIMFLAGS $sim_opts $prog $prog_opts" - } else { - remote_spawn host "$sim $SIMFLAGS $sim_opts $prog $prog_opts $redir" writeonly - } - set result [remote_wait host $testcase_timeout] - - set return_code [lindex $result 0] - set output [lindex $result 1] - # Remove the \r part of "\r\n" so we don't break all the patterns - # we want to match. - regsub -all -- "\r" $output "" output - - # ??? Not sure the test for pass/fail is right. - # We just care that the simulator ran correctly, not whether the simulated - # program return 0 or non-zero from `main'. - set status fail - if { $return_code == 0 } { - set status pass - } - - return [list $status $output] -} - -# Run testcase NAME. -# NAME is either a fully specified file name, or just the file name in which -# case $srcdir/$subdir will be prepended. -# The file can contain options in the form "# option(mach list): value" -# Possibilities: -# mach(): machine names -# as(mach): <assembler options> -# ld(mach): <linker options> -# sim(mach): <simulator options> -# output(): program output pattern to match with string-match -# If `output' is not specified, the program must output "pass". - -proc run_sim_test { name } { - global subdir srcdir - global AS ASFLAGS LD LDFLAGS SIMFLAGS - global opts - - if [string match "*/*" $name] { - set file $name - set name [file tail $name] - } else { - set file "$srcdir/$subdir/$name" - } - - set opt_array [slurp_options "${file}"] - if { $opt_array == -1 } { - unresolved $subdir/$name - return - } - set opts(as) {} - set opts(ld) {} - set opts(sim) {} - set opts(output) {} - set opts(mach) {} - set opts(timeout) {} - - foreach i $opt_array { - set opt_name [lindex $i 0] - set opt_machs [lindex $i 1] - set opt_val [lindex $i 2] - if ![info exists opts($opt_name)] { - perror "unknown option $opt_name in file $file" - unresolved $subdir/$name - return - } - foreach m $opt_machs { - set opts($opt_name,$m) $opt_val - } - if { "$opt_machs" == "" } { - set opts($opt_name) $opt_val - } - } - - set testname $name - set sourcefile $file - if { $opts(output) == "" } { - set opts(output) "pass\n" - } - - foreach mach $opts(mach) { - verbose "Testing $name on $mach." - - if ![info exists opts(as,$mach)] { - set opts(as,$mach) $opts(as) - } - send_log "$AS $ASFLAGS $opts(as,$mach) -I$srcdir/$subdir -o ${name}.o $sourcefile\n" - catch "exec $AS $ASFLAGS $opts(as,$mach) -I$srcdir/$subdir -o ${name}.o $sourcefile" comp_output - - if ![string match "" $comp_output] { - verbose -log "$comp_output" 3 - fail "$mach $testname" - continue - } - - if ![info exists opts(ld,$mach)] { - set opts(ld,$mach) $opts(ld) - } - send_log "$LD $LDFLAGS $opts(ld,$mach) -o ${name}.x ${name}.o\n" - catch "exec $LD $LDFLAGS $opts(ld,$mach) -o ${name}.x ${name}.o" comp_output - - if ![string match "" $comp_output] { - verbose -log "$comp_output" 3 - fail "$mach $testname" - continue - } - - # If no machine specific options, default to the general version. - if ![info exists opts(sim,$mach)] { - set opts(sim,$mach) $opts(sim) - } - - # Build the options argument. - set options "" - if { "$opts(timeout)" != "" } { - set options "$options timeout=$opts(timeout)" - } - - set result [sim_run ${name}.x "$opts(sim,$mach)" "" "" "$options"] - set status [lindex $result 0] - set output [lindex $result 1] - - if { "$status" == "pass" } { - if ![string match $opts(output) $output] { - verbose -log "output: $output" 3 - verbose -log "pattern: $opts(output)" 3 - } - } - - $status "$mach $testname" - } -} - -# Subroutine of run_sim_test to process options in FILE. - -proc slurp_options { file } { - if [catch { set f [open $file r] } x] { - #perror "couldn't open `$file': $x" - perror "$x" - return -1 - } - set opt_array {} - # whitespace expression - set ws {[ ]*} - set nws {[^ ]*} - # whitespace is ignored anywhere except within the options list; - # option names are alphabetic only - set pat "^#${ws}(\[a-zA-Z\]*)\\((.*)\\)$ws:${ws}(.*)$ws\$" - # Allow comment as first line of file. - set firstline 1 - while { [gets $f line] != -1 } { - set line [string trim $line] - # Whitespace here is space-tab. - if [regexp $pat $line xxx opt_name opt_machs opt_val] { - # match! - lappend opt_array [list $opt_name $opt_machs $opt_val] - } else { - if { ! $firstline } { - break - } - } - set firstline 0 - } - close $f - return $opt_array -} diff --git a/sim/testsuite/m32r-elf/.Sanitize b/sim/testsuite/m32r-elf/.Sanitize deleted file mode 100644 index bdcddb5..0000000 --- a/sim/testsuite/m32r-elf/.Sanitize +++ /dev/null @@ -1,38 +0,0 @@ -# Sanitize.in for sim/testsuite/m32r-elf - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -configure.in -configure -exit47.s -hello.s -loop.s - -Things-to-lose: - -Do-last: - -# End of file. diff --git a/sim/testsuite/m32r-elf/ChangeLog b/sim/testsuite/m32r-elf/ChangeLog deleted file mode 100644 index 371a839..0000000 --- a/sim/testsuite/m32r-elf/ChangeLog +++ /dev/null @@ -1,4 +0,0 @@ -Thu Feb 12 19:09:38 1998 Doug Evans <devans@canuck.cygnus.com> - - * Directory created. - diff --git a/sim/testsuite/m32r-elf/Makefile.in b/sim/testsuite/m32r-elf/Makefile.in deleted file mode 100644 index bbfb6a5..0000000 --- a/sim/testsuite/m32r-elf/Makefile.in +++ /dev/null @@ -1,157 +0,0 @@ -# Makefile for regression testing the m32r simulator. -# Copyright (C) 1998 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# GDB is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -VPATH = @srcdir@ -srcdir = @srcdir@ -srcroot = $(srcdir)/../../.. - -prefix = @prefix@ -exec_prefix = @exec_prefix@ - -host_alias = @host_alias@ -target_alias = @target_alias@ -program_transform_name = @program_transform_name@ -build_canonical = @build@ -host_canonical = @host@ -target_canonical = @target@ -target_cpu = @target_cpu@ - - -SHELL = @SHELL@ -SUBDIRS = @subdirs@ -RPATH_ENVVAR = @RPATH_ENVVAR@ - -EXPECT = `if [ -f ../../../expect/expect ] ; then \ - echo ../../../expect/expect ; \ - else echo expect ; fi` - -RUNTEST = $(RUNTEST_FOR_TARGET) - -RUNTESTFLAGS = - -RUNTEST_FOR_TARGET = `\ - if [ -f $${srcroot}/dejagnu/runtest ]; then \ - echo $${srcroot}/dejagnu/runtest; \ - else \ - if [ "$(host_canonical)" = "$(target_canonical)" ]; then \ - echo runtest; \ - else \ - t='$(program_transform_name)'; echo runtest | sed -e '' $$t; \ - fi; \ - fi` - - -AS_FOR_TARGET = `\ - if [ -x ../../../gas/as-new ]; then \ - echo ../../../gas/as-new ; \ - else \ - echo $(target_alias)-as ; \ - fi` - -LD_FOR_TARGET = `\ - if [ -x ../../../ld/ld-new ]; then \ - echo ../../../ld/ld-new ; \ - else \ - echo $(target_alias)-ld ; \ - fi` - -RUN_FOR_TARGET = `\ - if [ -x ../../../sim/${target_cpu}/run ]; then \ - echo ../../../sim/${target_cpu}/run ; \ - else \ - echo $(target_alias)-run ; \ - fi` - -TESTS = \ - hello.ok \ - exit47.ko - -check: sanity $(TESTS) -sanity: - @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET) - @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET) - @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET) - - - -# Rules for running all the tests, put into three types -# exit success, exit fail, print "Hello World" - -.u.log: - uudecode $*.u - $(RUN_FOR_TARGET) $* > $*.log - - -# Rules for running the tests - -.SUFFIXES: .u .ok .run .hi .ko -.run.ok: - rm -f tmp-$* $*.hi - ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* - mv tmp-$* $*.ok -.run.hi: - rm -f tmp-$* $*.hi diff-$* - ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* - echo "Hello World" | diff - tmp-$* > diff-$* - cat tmp-$* diff-$* > $*.hi -.run.ko: - rm -f tmp-$* $*.ko - set +e ; \ - ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* ; \ - if [ $$? -eq 47 ] ; then \ - exit 0 ; \ - else \ - exit 1 ; \ - fi - mv tmp-$* $*.ko - - -# Rules for building all the tests and packing them into -# uuencoded files. - -uuencode: em-pstr.u em-e0.u em-e47.u em-pchr.u - -.SUFFIXES: .u .s .run -.s.u: - rm -f $*.o $*.run - $(AS_FOR_TARGET) $(srcdir)/$*.s -o $*.o - $(LD_FOR_TARGET) -o $* $*.o - uuencode < $* $* > $*.u - rm -f $*.o $* -.s.run: - rm -f $*.o $*.run - $(AS_FOR_TARGET) $(srcdir)/$*.s -o $*.o - $(LD_FOR_TARGET) -o $*.run $*.o - rm -f $*.o $* - - -clean mostlyclean: - rm -f *~ core *.o a.out - rm -f $(TESTS) - -distclean maintainer-clean realclean: clean - rm -f *~ core - rm -f Makefile config.status *-init.exp - rm -fr *.log summary detail *.plog *.sum *.psum site.* - -Makefile : Makefile.in config.status - $(SHELL) config.status - -config.status: configure - $(SHELL) config.status --recheck diff --git a/sim/testsuite/m32r-elf/configure b/sim/testsuite/m32r-elf/configure deleted file mode 100755 index fa656cb..0000000 --- a/sim/testsuite/m32r-elf/configure +++ /dev/null @@ -1,902 +0,0 @@ -#! /bin/sh - -# Guess values for system-dependent variables and create Makefiles. -# Generated automatically using autoconf version 2.12.1 -# Copyright (C) 1992, 93, 94, 95, 96 Free Software Foundation, Inc. -# -# This configure script is free software; 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For more information, check -dnl any existing configure script. - -AC_PREREQ(2.5) -dnl FIXME - think of a truly uniq file to this directory -AC_INIT(Makefile.in) - -CC=${CC-cc} -AC_SUBST(CC) -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..) -AC_CANONICAL_SYSTEM - -AC_SUBST(target_cpu) - - -AC_OUTPUT(Makefile) diff --git a/sim/testsuite/m32r-elf/exit47.s b/sim/testsuite/m32r-elf/exit47.s deleted file mode 100644 index 5d1d6b4..0000000 --- a/sim/testsuite/m32r-elf/exit47.s +++ /dev/null @@ -1,8 +0,0 @@ - ;; Return with exit code 47. - - .globl _start -_start: - ldi8 r2,#47 - ldi8 r1,#1 - ldi8 r0,#0 - trap #0 diff --git a/sim/testsuite/m32r-elf/hello.s b/sim/testsuite/m32r-elf/hello.s deleted file mode 100644 index e0113e8..0000000 --- a/sim/testsuite/m32r-elf/hello.s +++ /dev/null @@ -1,17 +0,0 @@ - - .globl _start -_start: - -; write (hello world) - ldi8 r3,#14 - ld24 r2,#hello - ldi8 r1,#1 - ldi8 r0,#4 - trap #0 -; exit (0) - ldi8 r1,#0 - ldi8 r0,#1 - trap #0 - -length: .long 14 -hello: .ascii "Hello World!\r\n" diff --git a/sim/testsuite/m32r-elf/loop.s b/sim/testsuite/m32r-elf/loop.s deleted file mode 100644 index b24cfb4..0000000 --- a/sim/testsuite/m32r-elf/loop.s +++ /dev/null @@ -1,2 +0,0 @@ - .globl _start -_start: bra _start diff --git a/sim/testsuite/mips64el-elf/.Sanitize b/sim/testsuite/mips64el-elf/.Sanitize deleted file mode 100644 index ac1ff17..0000000 --- a/sim/testsuite/mips64el-elf/.Sanitize +++ /dev/null @@ -1,41 +0,0 @@ -# .Sanitize for devo/sim/testsuite/mips64el-elf - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -configure -configure.in - -Things-to-lose: - -Do-last: - -for i in * ; do - if test ! -d $i && (grep sanitize $i > /dev/null) ; then - echo '***' Some mentions of Sanitize are still left in $i! 1>&2 - fi -done - -# End of file. diff --git a/sim/testsuite/mips64el-elf/configure.in b/sim/testsuite/mips64el-elf/configure.in deleted file mode 100644 index e74389e..0000000 --- a/sim/testsuite/mips64el-elf/configure.in +++ /dev/null @@ -1,19 +0,0 @@ -dnl Process this file file with autoconf to produce a configure script. -dnl This file is a shell script fragment that supplies the information -dnl necessary to tailor a template configure script into the configure -dnl script appropriate for this directory. For more information, check -dnl any existing configure script. - -AC_PREREQ(2.5) -dnl FIXME - think of a truly uniq file to this directory -AC_INIT(Makefile.in) - -CC=${CC-cc} -AC_SUBST(CC) -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..) -AC_CANONICAL_SYSTEM - -AC_SUBST(target_cpu) - - -AC_OUTPUT(Makefile) diff --git a/sim/testsuite/mips64r5900-elf/.Sanitize b/sim/testsuite/mips64r5900-elf/.Sanitize deleted file mode 100644 index f92128e..0000000 --- a/sim/testsuite/mips64r5900-elf/.Sanitize +++ /dev/null @@ -1,137 +0,0 @@ -# .Sanitize for devo/sim/testsuite. - -# Each directory to survive its way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this directory. - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Do-last:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -Things-to-keep: - -ChangeLog -Makefile.in -configure -configure.in -exit47.s -f-abs.s -f-add.s -f-adda.s -f-cond.s -f-cvt.s -f-div.s -f-madd.s -f-madda.s -f-max.s -f-min.s -f-msub.s -f-msuba.s -f-mul.s -f-mula.s -f-neg.s -f-rsqrt.s -f-sqrt.s -f-sub.s -f-suba.s -hello.s -loop.s -t-dadd.s -t-ddiv.s -t-div.s -t-div1.s -t-divu.s -t-divu1.s -t-ldl.s -t-ldr.s -t-lwl.s -t-lwr.s -t-macros.i -t-mtsa.s -t-mult1.s -t-pabsh.s -t-pabsw.s -t-paddb.s -t-paddsb.s -t-paddsh.s -t-paddsw.s -t-paddub.s -t-padduh.s -t-padduw.s -t-padsbh.s -t-pcpyh.s -t-pdivbw.s -t-pdivuw.s -t-pdivw.s -t-pexcw.s -t-pexoh.s -t-pext5.s -t-pextlb.s -t-pextlh.s -t-pextlw.s -t-pextub.s -t-pextuh.s -t-pextuw.s -t-phmaddh.s -t-phmsubh.s -t-pinth.s -t-pintoh.s -t-pmaddh.s -t-pmadduw.s -t-pmaddw.s -t-pmfhl-lh.s -t-pmfhl-lw.s -t-pmfhl-sh.s -t-pmfhl-slw.s -t-pmfhl-uw.s -t-pmsubh.s -t-pmthl-lw.s -t-pmulth.s -t-pmultuw.s -t-pmultw.s -t-ppac5.s -t-ppacb.s -t-ppach.s -t-ppacw.s -t-prot3w.s -t-psllvw.s -t-psravw.s -t-psrlvw.s -t-psubsb.s -t-psubsh.s -t-psubsw.s -t-psubub.s -t-psubuh.s -t-psubuw.s -t-psubw.s -t-qfsrv.s -t-sdl.s -t-sdr.s -t-sub.s -t-swl.s -t-swr.s -tick.s -trap.s - -Things-to-lose: - -# The lines between the "Do-last:" line and the end of the file -# are executed as a /bin/sh shell script after everything else is -# done. - -Do-last: - -# eof diff --git a/sim/testsuite/mips64r5900-elf/ChangeLog b/sim/testsuite/mips64r5900-elf/ChangeLog deleted file mode 100644 index af9a411..0000000 --- a/sim/testsuite/mips64r5900-elf/ChangeLog +++ /dev/null @@ -1,107 +0,0 @@ -Wed Nov 11 17:42:49 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * f-rsqrt.s: div(-0) can set both I/SI + D/SD. - -Thu Nov 5 10:37:40 EST 1998 Frank Ch. Eigler <fche@cygnus.com> - - * t-prot3w.s: Correct test of prot3w insn. - -Thu Nov 5 20:22:21 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * f-rsqrt.s: Add tests for 0/sqrt(0) etc. - -Thu Oct 29 12:07:06 1998 Frank Ch. Eigler <fche@cygnus.com> - - * t-psrlvw.s (test_psrlvw): Add test for sign-extension in insn. - * t-padsbh.s: New test. - * t-mult1.s: New test. - * Makefile.in: Run them. - -Tue Oct 27 15:20:16 EST 1998 Frank Ch. Eigler <fche@cygnus.com> - - * t-prot3w.s: Test changed spec of prot3w insn. - -Wed Jul 15 14:57:26 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * f-div.s: Add tests of more edge conditions. - * f-rsqrt.s: Add third argument to RSQRT. - * f-cond.s: Replace C.LE.S with C.OLE.S and C.LT.S with C.OLT.S. - -Mon May 25 15:46:32 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * t-ldl.s, t-ldr.s, t-lwl.s, t-lwr.s, t-sdl.s, t-sdr.s, t-swl.s, - t-swr.s: New files. - * Makefile.in (TESTS): Update. - -Thu May 21 19:04:52 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (TESTS): Add t-sub.ok. - (t-sub.s): New file. - -Thu May 14 14:43:17 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * t-div.s, t-ddiv.s, t-div1.s: Check DIV for x/0 and MIN_INT/-1. - * t-divu1.s, t-divu.s: Check x/0 and x/MAX_INT. - * t-dadd: Test. - * trap.s: Test trap instruction. - * Makefile.in (TESTS): Update - - * f-add.s, f-adda.s, f-madd.s, f-madda.s, f-msub.s, f-msuba.s: Add - more test cases. - -Thu Apr 30 18:57:47 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * f-adda.s: Handle to-the-max accumulator values in madd.s. - - * t-macros.i: Use msub.s instead of madd.s to get a value from the - accumulator. Use suba.s instead of adda.s to get a value into the - accumulator. - -Thu Apr 16 17:44:17 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * f-mul.s, f-mula.s: More overflow/underflow tests. - - * f-cvt.s: Swap cvt.w.s and cvt.s.w was testing backwards. - - * t-macros.i (loadfpx, checkfpx, checkaccx): Define, accept hex - values. - (checkfp): Force FP-SCR register bit zero to 1 when checking. - -Wed Feb 25 20:26:29 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * f-*.s: New files. - - * Makefile.in (TESTS): Add floating point f-* tests. - - * t-macros.i: Add lots of floating point macros. - -Mon Feb 2 16:50:21 1998 Andrew Cagney <cagney@b1.cygnus.com> - - * t-sdl.s: New test. - (dest): 8 byte align sdl destination. - - * Makefile.in: Update. - -Wed Sep 3 14:32:42 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (.o.run): Replace .tx59 with .run. - -Mon Sep 1 16:58:13 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * Makefile.in (TESTS): Add t-psrlvw, t-pabsh, t-pabsw. - (.s.o, .o.tx59): Add -Ttext 0xa002000, to ld. Add -I <srcdir> to - as. - - t-psrlvw.s, t-pabsh, t-pabsw: New files. - -Tue Jul 29 10:56:53 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * t-mtsa.s: Check move/from SA instructions. - -Mon Jul 28 20:51:16 1997 Andrew Cagney <cagney@b1.cygnus.com> - - * t-pdivuw.s: Also check normal cases. - -Tue Jul 15 13:34:07 1997 Andrew Cagney <cagney@sendai.cygnus.com> - - ChangeLog: Create diff --git a/sim/testsuite/mips64r5900-elf/Makefile.in b/sim/testsuite/mips64r5900-elf/Makefile.in deleted file mode 100644 index 120337e..0000000 --- a/sim/testsuite/mips64r5900-elf/Makefile.in +++ /dev/null @@ -1,271 +0,0 @@ -# Makefile for regression testing the GNU debugger. -# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - -# GDB is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. - -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -VPATH = @srcdir@ -srcdir = @srcdir@ -srcroot = $(srcdir)/.. - -prefix = @prefix@ -exec_prefix = @exec_prefix@ - -host_alias = @host_alias@ -target_alias = @target_alias@ -program_transform_name = @program_transform_name@ -build_canonical = @build@ -host_canonical = @host@ -target_canonical = @target@ -target_cpu = @target_cpu@ - - -SHELL = /bin/sh -SUBDIRS = @subdirs@ -RPATH_ENVVAR = @RPATH_ENVVAR@ - -EXPECT = `if [ -f $${rootme}/../../expect/expect ] ; then \ - echo $${rootme}/../../expect/expect ; \ - else echo expect ; fi` - -RUNTEST = $(RUNTEST_FOR_TARGET) - -RUNTESTFLAGS = - -RUNTEST_FOR_TARGET = `\ - if [ -f $${srcdir}/../../../dejagnu/runtest ]; then \ - echo $${srcdir}/../../../dejagnu/runtest; \ - else \ - if [ "$(host_canonical)" = "$(target_canonical)" ]; then \ - echo runtest; \ - else \ - t='$(program_transform_name)'; echo runtest | sed -e '' $$t; \ - fi; \ - fi` - - -AS_FOR_TARGET = `\ - if [ -x ../../../gas/as-new ]; then \ - echo ../../../gas/as-new ; \ - else \ - echo $(target_alias)-as ; \ - fi` - -LD_FOR_TARGET = `\ - if [ -x ../../../ld/ld-new ]; then \ - echo ../../../ld/ld-new ; \ - else \ - echo $(target_alias)-ld ; \ - fi` - -RUN_FOR_TARGET = `\ - if [ -x ../../../sim/mips/run ]; then \ - echo ../../../sim/mips/run ; \ - else \ - echo $(target_alias)-run ; \ - fi` - -TESTS = \ - hello.hi \ - exit47.ko \ - \ - f-abs.ok \ - f-add.ok \ - f-adda.ok \ - $(f-bc1f.ok) \ - $(f-bc1fl.ok) \ - $(f-bc1t.ok) \ - $(f-bc1tl.ok) \ - f-cond.ok \ - $(f-cfc1.ok) \ - $(f-ctc1.ok) \ - f-cvt.ok \ - f-div.ok \ - $(f-lwc1.ok) \ - f-madd.ok \ - f-madda.ok \ - f-max.ok \ - $(f-mfc1.ok) \ - f-min.ok \ - f-msub.ok \ - f-msuba.ok \ - $(f-mtc1.ok) \ - f-mul.ok \ - f-mula.ok \ - f-neg.ok \ - f-rsqrt.ok \ - f-sqrt.ok \ - f-sub.ok \ - f-suba.ok \ - $(f-swc1.ok) \ - \ - t-dadd.ok \ - t-ddiv.ok \ - t-div.ok \ - t-div1.ok \ - t-divu.ok \ - t-divu1.ok \ - t-sub.ok \ - \ - t-mtsa.ok \ - t-pabsh.ok \ - t-pabsw.ok \ - t-paddb.ok \ - t-paddsb.ok \ - t-paddsh.ok \ - t-paddsw.ok \ - t-paddub.ok \ - t-padduh.ok \ - t-padduw.ok \ - t-pcpyh.ok \ - t-pdivbw.ok \ - t-pdivuw.ok \ - t-pdivw.ok \ - t-pexcw.ok \ - t-pexoh.ok \ - t-pext5.ok \ - t-pextlb.ok \ - t-pextlh.ok \ - t-pextlw.ok \ - t-pextub.ok \ - t-pextuh.ok \ - t-pextuw.ok \ - t-phmaddh.ok \ - t-phmsubh.ok \ - t-pinth.ok \ - t-pintoh.ok \ - t-pmaddh.ok \ - t-pmadduw.ok \ - t-pmaddw.ok \ - t-pmfhl-lh.ok \ - t-pmfhl-lw.ok \ - t-pmfhl-sh.ok \ - t-pmfhl-slw.ok \ - t-pmfhl-uw.ok \ - t-pmsubh.ok \ - t-pmthl-lw.ok \ - t-pmulth.ok \ - t-pmultuw.ok \ - t-pmultw.ok \ - t-ppac5.ok \ - t-ppacb.ok \ - t-ppach.ok \ - t-ppacw.ok \ - t-prot3w.ok \ - t-psllvw.ok \ - t-psrlvw.ok \ - t-psravw.ok \ - t-psubsb.ok \ - t-psubsh.ok \ - t-psubsw.ok \ - t-psubub.ok \ - t-psubuh.ok \ - t-psubuw.ok \ - t-psubw.ok \ - t-qfsrv.ok \ - t-sdl.ok \ - \ - trap.ok \ - -check: sanity $(TESTS) -sanity: - @eval echo AS_FOR_TARGET = $(AS_FOR_TARGET) - @eval echo LD_FOR_TARGET = $(LD_FOR_TARGET) - @eval echo RUN_FOR_TARGET = $(RUN_FOR_TARGET) - - - -# Rules for running all the tests, put into three types -# exit success, exit fail, print "Hello World" - -.u.log: - uudecode $*.u - $(RUN_FOR_TARGET) $* > $*.log - - -# Rules for running the tests - -.SUFFIXES: .u .uue .ok .ok .run .hi .ko .ko -.run.ok: - rm -f tmp-$* $*.ok - ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* - mv tmp-$* $*.ok -.run.hi: - rm -f tmp-$* $*.hi diff-$* - ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* - echo 'Hello World!' | diff - tmp-$* > diff-$* - cat tmp-$* diff-$* > $*.hi -.run.ko: - rm -f tmp-$* $*.ko - set +e ; \ - ulimit -t 5 ; $(RUN_FOR_TARGET) $*.run > tmp-$* ; \ - if [ $$? -eq 47 ] ; then \ - exit 0 ; \ - else \ - exit 1 ; \ - fi - mv tmp-$* $*.ko - - -# Rules for building all the tests and packing them into -# uuencoded files. - -.run.u: - uuencode < $*.run $*.run > $*.u - @echo "Move $*.u $*.uue" -.uue.run: - uudecode $(srcdir)/$*.uue -.o.run: - $(LD_FOR_TARGET) -Ttext 0xa0020000 -o $*.run $*.o -.s.o: - $(AS_FOR_TARGET) -I $(srcdir) $(srcdir)/$*.s -o $*.o - - -# -# Standard -# -clean mostlyclean: - -rm -f *~ core *.o a.out *.x *.grt *.run tmp-* diff-* - rm -f $(TESTS) -# if [ x"${SUBDIRS}" != x ] ; then \ -# for dir in ${SUBDIRS}; \ -# do \ -# echo "$$dir:"; \ -# if [ -d $$dir ]; then \ -# (cd $$dir; $(MAKE) clean); \ -# fi; \ -# done ; \ -# else true; fi - -distclean maintainer-clean realclean: clean - -rm -f *~ core - -rm -f Makefile config.status *-init.exp - -rm -fr *.log summary detail *.plog *.sum *.psum site.* -# if [ x"${SUBDIRS}" != x ] ; then \ -# for dir in ${SUBDIRS}; \ -# do \ -# echo "$$dir:"; \ -# if [ -d $$dir ]; then \ -# (cd $$dir; $(MAKE) distclean); \ -# fi; \ -# done ; \ -# else true; fi - -Makefile : Makefile.in config.status - $(SHELL) config.status - -config.status: configure - $(SHELL) config.status --recheck diff --git a/sim/testsuite/mips64r5900-elf/f-abs.s b/sim/testsuite/mips64r5900-elf/f-abs.s deleted file mode 100644 index 289849f..0000000 --- a/sim/testsuite/mips64r5900-elf/f-abs.s +++ /dev/null @@ -1,18 +0,0 @@ -.include "t-macros.i" - - start - -test_abs1: - clearfcsr - loadfp $f1 4.0 - abs.s $f2, $f1 - checkfp 0 $f2 4.0 - -test_abs2: - clearfcsr - loadfp $f1 4.0 - neg.s $f1, $f1 - abs.s $f2, $f1 - checkfp 0 $f2 4.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-add.s b/sim/testsuite/mips64r5900-elf/f-add.s deleted file mode 100644 index caf006f..0000000 --- a/sim/testsuite/mips64r5900-elf/f-add.s +++ /dev/null @@ -1,38 +0,0 @@ -.include "t-macros.i" - - start - -test_add1: - clearfcsr - loadfp $f1 4.0 - loadfp $f2 0.1 - add.s $f3, $f2, $f1 - checkfp 0 $f3 4.1 - -test_add2: - clearfcsr - loadfp $f1 , -4.0 - loadfp $f2 8.0 - add.s $f3, $f2, $f1 - checkfp 0 $f3 4.0 - -test_add3: - clearfcsr - loadfpmax $f1 - loadfpmax $f2 - add.s $f3, $f2, $f1 - checkfpmax FCSR_O $f3 - -test_add4: - clearfcsr - loadfpmax $f1 - neg.s $f1, $f1 - loadfpmax $f2 - neg.s $f2, $f2 - add.s $f3, $f2, $f1 - checkfcsr FCSR_O - clearfcsr - neg.s $f3, $f3 - checkfpmax 0 $f3 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-adda.s b/sim/testsuite/mips64r5900-elf/f-adda.s deleted file mode 100644 index ecffa1a..0000000 --- a/sim/testsuite/mips64r5900-elf/f-adda.s +++ /dev/null @@ -1,40 +0,0 @@ -.include "t-macros.i" - - start - -test_adda1: - clearfcsr - loadfp $f1 4.0 - loadfp $f2 0.1 - adda.s $f1, $f2 - checkacc 0 4.1 - -test_add2: - clearfcsr - loadfp $f1 , -4.0 - loadfp $f2 8.0 - adda.s $f2, $f1 - checkacc 0 4.0 - -test_add3: - clearfcsr - loadfpmax $f1 - loadfpmax $f2 - adda.s $f2, $f1 - checkaccmax FCSR_O - -test_add4: - clearfcsr - loadfpmax $f1 - neg.s $f1, $f1 - loadfpmax $f2 - neg.s $f2, $f2 - adda.s $f1, $f2 - checkfcsr FCSR_O - clearfcsr - msub.s $f3, $f0, $f0 - neg.s $f3, $f3 - clearfcsr - checkfpmax 0 $f3 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-cond.s b/sim/testsuite/mips64r5900-elf/f-cond.s deleted file mode 100644 index effa8b1..0000000 --- a/sim/testsuite/mips64r5900-elf/f-cond.s +++ /dev/null @@ -1,57 +0,0 @@ -.include "t-macros.i" - - start - - loadfp $f1 1.0 - loadfp $f2 2.0 - loadfp $f3 3.0 - -test_f1: - clearfcsr - c.f.s $f1, $f1 - checkfcsr 0 - - -test_eq1: - clearfcsr - c.eq.s $f1, $f1 - checkfcsr FCSR_C - -test_eq2: - clearfcsr - c.eq.s $f1, $f2 - checkfcsr 0 - - -test_lt1: - clearfcsr - c.lt.s $f1, $f1 - checkfcsr 0 - -test_lt2: - clearfcsr - c.lt.s $f1, $f2 - checkfcsr FCSR_C - -test_lt3: - clearfcsr - c.lt.s $f3, $f2 - checkfcsr 0 - - -test_le1: - clearfcsr - c.le.s $f1, $f1 - checkfcsr FCSR_C - -test_le2: - clearfcsr - c.le.s $f1, $f2 - checkfcsr FCSR_C - -test_le3: - clearfcsr - c.le.s $f3, $f2 - checkfcsr 0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-cvt.s b/sim/testsuite/mips64r5900-elf/f-cvt.s deleted file mode 100644 index 8853280..0000000 --- a/sim/testsuite/mips64r5900-elf/f-cvt.s +++ /dev/null @@ -1,34 +0,0 @@ -.include "t-macros.i" - - start - -test_cvt1: - clearfcsr - loadfp $f1 4.0 - cvt.s.w $f2, $f1 - mfc1 $10, $2 - check10 0 4 - -test_cvt2: - clearfcsr - loadfp $f1 4.0 - neg.s $f1, $f1 - cvt.s.w $f2, $f1 - mfc1 $10, $2 - check10 0 , -4 - -test_cvt3: - clearfcsr - li $4, 4 - mtc1 $4, $4 - cvt.w.s $f3, $f4 - checkfp 0 $f3 4.0 - -test_cvt4: - clearfcsr - li $4, -4 - mtc1 $4, $4 - cvt.w.s $f3, $f4 - checkfp 0 $f3 , -4.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-div.s b/sim/testsuite/mips64r5900-elf/f-div.s deleted file mode 100644 index dfdd344..0000000 --- a/sim/testsuite/mips64r5900-elf/f-div.s +++ /dev/null @@ -1,27 +0,0 @@ -.include "t-macros.i" - - start - -test_div1: - clearfcsr - loadfp $f1 2.0 - loadfp $f2 4.0 - div.s $f3, $f2, $f1 - checkfp 0 $f3 2.0 - - -test_div2: - clearfcsr - loadfp $f1 0.0 - loadfp $f2 0.0 - div.s $f3, $f2, $f1 - checkfpmax FCSR_I $f3 - -test_div3: - clearfcsr - loadfp $f1 0.0 - loadfp $f2 1.0 - div.s $f3, $f2, $f1 - checkfpmax FCSR_D $f3 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-madd.s b/sim/testsuite/mips64r5900-elf/f-madd.s deleted file mode 100644 index 034041d..0000000 --- a/sim/testsuite/mips64r5900-elf/f-madd.s +++ /dev/null @@ -1,21 +0,0 @@ -.include "t-macros.i" - - start - -test_madd1: - clearfcsr - loadacc 1.0 - loadfp $f1 2.0 - loadfp $f2 4.0 - madd.s $f3, $f2, $f1 - checkfp 0 $f3 9.0 - -test_madd2: - clearfcsr - loadacc 4.0 - loadfp $f1 2.0 - loadfp $f2 2.0 - madd.s $f3, $f2, $f1 - checkfp 0 $f3 8.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-madda.s b/sim/testsuite/mips64r5900-elf/f-madda.s deleted file mode 100644 index eee9580..0000000 --- a/sim/testsuite/mips64r5900-elf/f-madda.s +++ /dev/null @@ -1,13 +0,0 @@ -.include "t-macros.i" - - start - -test_madda1: - clearfcsr - loadacc 8.0 - loadfp $f1 2.0 - loadfp $f2 4.0 - madda.s $f2, $f1 - checkacc 0 16.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-max.s b/sim/testsuite/mips64r5900-elf/f-max.s deleted file mode 100644 index 59c862b..0000000 --- a/sim/testsuite/mips64r5900-elf/f-max.s +++ /dev/null @@ -1,18 +0,0 @@ -.include "t-macros.i" - - start - - loadfp $f1, 1.0 - loadfp $f2, 2.0 - -test_max1: - clearfcsr - max.s $f3, $f1, $f2 - checkfp 0 $f3 2.0 - -test_max2: - clearfcsr - max.s $f3, $f2, $f1 - checkfp 0 $f3 2.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-min.s b/sim/testsuite/mips64r5900-elf/f-min.s deleted file mode 100644 index 9663e48..0000000 --- a/sim/testsuite/mips64r5900-elf/f-min.s +++ /dev/null @@ -1,18 +0,0 @@ -.include "t-macros.i" - - start - - loadfp $f1, 1.0 - loadfp $f2, 2.0 - -test_min1: - clearfcsr - min.s $f3, $f1, $f2 - checkfp 0 $f3 1.0 - -test_min2: - clearfcsr - min.s $f3, $f2, $f1 - checkfp 0 $f3 1.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-msub.s b/sim/testsuite/mips64r5900-elf/f-msub.s deleted file mode 100644 index 04e3348..0000000 --- a/sim/testsuite/mips64r5900-elf/f-msub.s +++ /dev/null @@ -1,13 +0,0 @@ -.include "t-macros.i" - - start - -test_msub1: - clearfcsr - loadacc 4.0 - loadfp $f1 1.0 - loadfp $f2 2.0 - msub.s $f3, $f2, $f1 - checkfp 0 $f3 2.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-msuba.s b/sim/testsuite/mips64r5900-elf/f-msuba.s deleted file mode 100644 index ce2d5a4..0000000 --- a/sim/testsuite/mips64r5900-elf/f-msuba.s +++ /dev/null @@ -1,13 +0,0 @@ -.include "t-macros.i" - - start - -test_msuba1: - clearfcsr - loadacc 2.0 - loadfp $f1 1.0 - loadfp $f2 2.0 - msuba.s $f2, $f1 - checkacc 0 0.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-mul.s b/sim/testsuite/mips64r5900-elf/f-mul.s deleted file mode 100644 index d7131dc..0000000 --- a/sim/testsuite/mips64r5900-elf/f-mul.s +++ /dev/null @@ -1,12 +0,0 @@ -.include "t-macros.i" - - start - -test_mul1: - clearfcsr - loadfp $f1 2.0 - loadfp $f2 4.0 - mul.s $f3, $f2, $f1 - checkfp 0 $f3 8.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-mula.s b/sim/testsuite/mips64r5900-elf/f-mula.s deleted file mode 100644 index 83bc85e..0000000 --- a/sim/testsuite/mips64r5900-elf/f-mula.s +++ /dev/null @@ -1,12 +0,0 @@ -.include "t-macros.i" - - start - -test_mula1: - clearfcsr - loadfp $f1 2.0 - loadfp $f2 4.0 - mula.s $f2, $f1 - checkacc 0 8.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-neg.s b/sim/testsuite/mips64r5900-elf/f-neg.s deleted file mode 100644 index 0757c0e..0000000 --- a/sim/testsuite/mips64r5900-elf/f-neg.s +++ /dev/null @@ -1,11 +0,0 @@ -.include "t-macros.i" - - start - -test_neg1: - clearfcsr - loadfp $f1 4.0 - neg.s $f3, $f1 - checkfp 0 $f3 , -4.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-rsqrt.s b/sim/testsuite/mips64r5900-elf/f-rsqrt.s deleted file mode 100644 index feb3454..0000000 --- a/sim/testsuite/mips64r5900-elf/f-rsqrt.s +++ /dev/null @@ -1,179 +0,0 @@ -.include "t-macros.i" - - start - - ### $f3 = $f2 / sqrt ($f1) - -test_rsqrt: - loadfp $f1 4.0 - loadfp $f2 1.0 - rsqrt.s $f3, $f2, $f1 - checkfp 0 $f3 0.5 - - ################ - - -## +1.0 / sqrt (+0.0) -## -> 0x7fffffff (+Max) D+SD -test_rsqrt_1: - clearfcsr - loadfp $f1, +1.0 - loadfp $f2, +0.0 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00010021 $f3 0x7fffffff - - -## -1.0 / sqrt (+0.0) -## -> 0xffffffff (-Max) D+SD -test_rsqrt_2: - clearfcsr - loadfp $f1, -1.0 - loadfp $f2, +0.0 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00010021 $f3 0xffffffff - - -## 0 / sqrt (-0) -##and 0 / sqrt (0) -## ->0x7fffffff I + SI -test_rsqrt_3a: - clearfcsr - loadfp $f1, +0.0 - loadfp $f2, -0.0 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0x7fffffff - -test_rsqrt_3b: - clearfcsr - loadfp $f1, +0.0 - loadfp $f2, +0.0 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0x7fffffff - - -## Correctly: -## (-0) / sqrt (-0) -## ->FFFFFFFF (I + SI) -test_rsqrt_4a: - clearfcsr - loadfp $f1, -0.0 - loadfp $f2, -0.0 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0xffffffff - -test_rsqrt_4b: - clearfcsr - loadfp $f1, -0.0 - loadfp $f2, +0.0 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0xffffffff - - -## (max) / sqrt (min*2) -> no O+SO -## -test_rsqrt_5aa: - clearfcsr - loadfpx $f1, 0x7fffffff - loadfpx $f2, 0x00800001 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00000001 $f3 0x7fffffff - -test_rsqrt_5ab: - clearfcsr - loadfpx $f1, 0x7fffffff - loadfpx $f2, 0x80800001 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0x7fffffff - -test_rsqrt_5ba: - clearfcsr - loadfpx $f1, 0xffffffff - loadfpx $f2, 0x00800001 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00000001 $f3 0xffffffff - -test_rsqrt_5bb: - clearfcsr - loadfpx $f1, 0xffffffff - loadfpx $f2, 0x80800001 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0xffffffff - - -## (max) / sqrt (min*2) -> no U+SU -## -test_rsqrt_6aa: - clearfcsr - loadfpx $f1, 0x00800001 - loadfpx $f2, 0x7fffffff - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00000001 $f3 0x00000000 - -test_rsqrt_6ab: - clearfcsr - loadfpx $f1, 0x00800001 - loadfpx $f2, 0xffffffff - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0x00000000 - -test_rsqrt_6ba: - clearfcsr - loadfpx $f1, 0x80800001 - loadfpx $f2, 0x7fffffff - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00000001 $f3 0x80000000 - -test_rsqrt_6bb: - clearfcsr - loadfpx $f1, 0x80800001 - loadfpx $f2, 0xffffffff - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020041 $f3 0x80000000 - - -## Correctly: -## (max/min) / sqrt ([+-]0) -## ->MAX/MIN (D + SD) -test_rsqrt_7aa: - clearfcsr - loadfpx $f1, 0x7fffffff - loadfpx $f2, 0x00000000 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00010021 $f3 0x7fffffff - -test_rsqrt_7ab: - clearfcsr - loadfpx $f1, 0x7fffffff - loadfpx $f2, 0x80000000 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00010021 $f3 0x7fffffff - -test_rsqrt_7ba: - clearfcsr - loadfpx $f1, 0xffffffff - loadfpx $f2, 0x00000000 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00010021 $f3 0xffffffff - -test_rsqrt_7bb: - clearfcsr - loadfpx $f1, 0xffffffff - loadfpx $f2, 0x80000000 - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00010021 $f3 0xffffffff - - -## Like max/sqrt but check that bits are set/cleared -## -test_rsqrt_9aa: - clearfcsr - loadfpx $f1, 0x7fffffff - loadfpx $f2, 0x00000000 - rsqrt.s $f3, $f1, $f2 - loadfpx $f1, 0x00800001 - loadfpx $f2, 0xffffffff - rsqrt.s $f3, $f1, $f2 - checkfpx 1 0x00020061 $f3 0x00000000 - - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-sqrt.s b/sim/testsuite/mips64r5900-elf/f-sqrt.s deleted file mode 100644 index ab76604..0000000 --- a/sim/testsuite/mips64r5900-elf/f-sqrt.s +++ /dev/null @@ -1,24 +0,0 @@ -.include "t-macros.i" - - start - -test_sqrt_4_0: - clearfcsr - loadfp $f1 4.0 - sqrt.s $f2, $f1 - checkfp 0 $f2 2.0 - -test_sqrt_0_01: - clearfcsr - loadfp $f1 0.01 - sqrt.s $f2, $f1 - checkfp 0 $f2 0.1 - -test_sqrt_minus_4_0: - clearfcsr - loadfp $f1 4.0 - neg.s $f1, $f1 - sqrt.s $f2, $f1 - checkfp FCSR_I $f2 2.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-sub.s b/sim/testsuite/mips64r5900-elf/f-sub.s deleted file mode 100644 index 59f8898..0000000 --- a/sim/testsuite/mips64r5900-elf/f-sub.s +++ /dev/null @@ -1,12 +0,0 @@ -.include "t-macros.i" - - start - -test_sub1: - clearfcsr - loadfp $f1 1.0 - loadfp $f2 2.0 - sub.s $f3, $f2, $f1 - checkfp 0 $f3 1.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/f-suba.s b/sim/testsuite/mips64r5900-elf/f-suba.s deleted file mode 100644 index abb1f95..0000000 --- a/sim/testsuite/mips64r5900-elf/f-suba.s +++ /dev/null @@ -1,13 +0,0 @@ -.include "t-macros.i" - - start - -test_suba1: - clearfcsr - loadacc 0.0 - loadfp $f1 1.0 - loadfp $f2 2.0 - suba.s $f2, $f1 - checkacc 0 1.0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-dadd.s b/sim/testsuite/mips64r5900-elf/t-dadd.s deleted file mode 100644 index 7f1c410..0000000 --- a/sim/testsuite/mips64r5900-elf/t-dadd.s +++ /dev/null @@ -1,20 +0,0 @@ -.include "t-macros.i" - - start - - # don't overflow - -test_dadd: - - load $7 0xdeadbeefdeadbeef 0x7fffffffffffffff - load $8 0xdeadbeefdeadbeef 0xffffffffffffffff - dadd $10, $7, $8 - check10 0x0000000000000000 0x7ffffffffffffffe - -test_dadd_1: - load $7 0xdeadbeefdeadbeef 0x8000000000000000 - load $8 0xdeadbeefdeadbeef 0x7fffffffffffffff - dadd $10, $7, $8 - check10 0x0000000000000000 0xffffffffffffffff - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-ddiv.s b/sim/testsuite/mips64r5900-elf/t-ddiv.s deleted file mode 100644 index e4b327b..0000000 --- a/sim/testsuite/mips64r5900-elf/t-ddiv.s +++ /dev/null @@ -1,23 +0,0 @@ -.include "t-macros.i" - - start - -test_div: - - load $7 0xdeadbeefdeadbeef 0x8000000000000000 - load $8 0xdeadbeefdeadbeef 0xffffffffffffffff - # NB: That $0 is needed! - ddiv $0, $7, $8 - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0x0000000000000000 0x8000000000000000 - -test_div_0: - load $7 0xdeadbeefdeadbeef 0x8000000000000000 - load $8 0xdeadbeefdeadbeef 0x0000000000000000 - # NB: That $0 is needed! - ddiv $0, $7, $8 - # don't crash! - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0x0000000000000000 0x8000000000000000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-div.s b/sim/testsuite/mips64r5900-elf/t-div.s deleted file mode 100644 index 0cb3e7c..0000000 --- a/sim/testsuite/mips64r5900-elf/t-div.s +++ /dev/null @@ -1,22 +0,0 @@ -.include "t-macros.i" - - start - -test_div: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff - # NB: That $0 is needed! - div $0, $7,$8 - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0x0000000000000000 0xffffffff80000000 - -test_div_0: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000 - # NB: That $0 is needed! - div $0, $7,$8 - # don't crash! - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0x0000000000000000 0xffffffff80000000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-div1.s b/sim/testsuite/mips64r5900-elf/t-div1.s deleted file mode 100644 index 325b8b5..0000000 --- a/sim/testsuite/mips64r5900-elf/t-div1.s +++ /dev/null @@ -1,20 +0,0 @@ -.include "t-macros.i" - - start - -test_div: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff - div1 $7,$8 - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0xffffffff80000000 0x0000000000000000 - -test_div_0: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000 - div1 $7,$8 - # don't crash! - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0xffffffff80000000 0x0000000000000000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-divu.s b/sim/testsuite/mips64r5900-elf/t-divu.s deleted file mode 100644 index dbcc5e4..0000000 --- a/sim/testsuite/mips64r5900-elf/t-divu.s +++ /dev/null @@ -1,20 +0,0 @@ -.include "t-macros.i" - - start - -test_div: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff - divu $0, $7,$8 - checkHI 0x0000000000000000 0xffffffff80000000 - checkLO 0x0000000000000000 0x0000000000000000 - -test_div_0: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000 - divu $0, $7,$8 - # don't crash! - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0x0000000000000000 0xffffffff80000000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-divu1.s b/sim/testsuite/mips64r5900-elf/t-divu1.s deleted file mode 100644 index fcdd62b..0000000 --- a/sim/testsuite/mips64r5900-elf/t-divu1.s +++ /dev/null @@ -1,20 +0,0 @@ -.include "t-macros.i" - - start - -test_div: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeefffffffff - divu1 $7,$8 - checkHI 0xffffffff80000000 0x0000000000000000 - checkLO 0x0000000000000000 0x0000000000000000 - -test_div_0: - load $7 0xdeadbeefdeadbeef 0xdeadbeef80000000 - load $8 0xdeadbeefdeadbeef 0xdeadbeef00000000 - divu1 $7,$8 - # don't crash! - checkHI 0x0000000000000000 0x0000000000000000 - checkLO 0xffffffff80000000 0x0000000000000000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-ldl.s b/sim/testsuite/mips64r5900-elf/t-ldl.s deleted file mode 100644 index 1df0128..0000000 --- a/sim/testsuite/mips64r5900-elf/t-ldl.s +++ /dev/null @@ -1,112 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - .byte 0xb9 - .byte 0xba - .byte 0xbb - .byte 0xbc - .byte 0xbd - .byte 0xbe - .byte 0xbf - - .text - ld $8, byteaddr - - -test_ldl_0: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb0cccccccccccccc - -test_ldl_1: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 1($8) - check10 0xdeadbeefdeadbeef 0xb1b0cccccccccccc - -test_ldl_2: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 2($8) - check10 0xdeadbeefdeadbeef 0xb2b1b0cccccccccc - -test_ldl_3: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 3($8) - check10 0xdeadbeefdeadbeef 0xb3b2b1b0cccccccc - -test_ldl_4: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 4($8) - check10 0xdeadbeefdeadbeef 0xb4b3b2b1b0cccccc - -test_ldl_5: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 5($8) - check10 0xdeadbeefdeadbeef 0xb5b4b3b2b1b0cccc - -test_ldl_6: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 6($8) - check10 0xdeadbeefdeadbeef 0xb6b5b4b3b2b1b0cc - -test_ldl_7: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 7($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - - -test_ldl_8: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 8($8) - check10 0xdeadbeefdeadbeef 0xb8cccccccccccccc - -test_ldl_9: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 9($8) - check10 0xdeadbeefdeadbeef 0xb9b8cccccccccccc - -test_ldl_10: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 10($8) - check10 0xdeadbeefdeadbeef 0xbab9b8cccccccccc - -test_ldl_11: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 11($8) - check10 0xdeadbeefdeadbeef 0xbbbab9b8cccccccc - -test_ldl_12: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 12($8) - check10 0xdeadbeefdeadbeef 0xbcbbbab9b8cccccc - -test_ldl_13: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 13($8) - check10 0xdeadbeefdeadbeef 0xbdbcbbbab9b8cccc - -test_ldl_14: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 14($8) - check10 0xdeadbeefdeadbeef 0xbebdbcbbbab9b8cc - -test_ldl_15: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldl $10, 15($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-ldr.s b/sim/testsuite/mips64r5900-elf/t-ldr.s deleted file mode 100644 index 774fbb1..0000000 --- a/sim/testsuite/mips64r5900-elf/t-ldr.s +++ /dev/null @@ -1,112 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - .byte 0xb9 - .byte 0xba - .byte 0xbb - .byte 0xbc - .byte 0xbd - .byte 0xbe - .byte 0xbf - - .text - ld $8, byteaddr - - -test_ldr_0: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_ldr_1: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 1($8) - check10 0xdeadbeefdeadbeef 0xccb7b6b5b4b3b2b1 - -test_ldr_2: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 2($8) - check10 0xdeadbeefdeadbeef 0xccccb7b6b5b4b3b2 - -test_ldr_3: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 3($8) - check10 0xdeadbeefdeadbeef 0xccccccb7b6b5b4b3 - -test_ldr_4: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 4($8) - check10 0xdeadbeefdeadbeef 0xccccccccb7b6b5b4 - -test_ldr_5: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 5($8) - check10 0xdeadbeefdeadbeef 0xccccccccccb7b6b5 - -test_ldr_6: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 6($8) - check10 0xdeadbeefdeadbeef 0xccccccccccccb7b6 - -test_ldr_7: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 7($8) - check10 0xdeadbeefdeadbeef 0xccccccccccccccb7 - - -test_ldr_8: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_ldr_9: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 9($8) - check10 0xdeadbeefdeadbeef 0xccbfbebdbcbbbab9 - -test_ldr_10: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 10($8) - check10 0xdeadbeefdeadbeef 0xccccbfbebdbcbbba - -test_ldr_11: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 11($8) - check10 0xdeadbeefdeadbeef 0xccccccbfbebdbcbb - -test_ldr_12: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 12($8) - check10 0xdeadbeefdeadbeef 0xccccccccbfbebdbc - -test_ldr_13: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 13($8) - check10 0xdeadbeefdeadbeef 0xccccccccccbfbebd - -test_ldr_14: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 14($8) - check10 0xdeadbeefdeadbeef 0xccccccccccccbfbe - -test_ldr_15: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - ldr $10, 15($8) - check10 0xdeadbeefdeadbeef 0xccccccccccccccbf - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-lwl.s b/sim/testsuite/mips64r5900-elf/t-lwl.s deleted file mode 100644 index 8bda059..0000000 --- a/sim/testsuite/mips64r5900-elf/t-lwl.s +++ /dev/null @@ -1,65 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - - - .text - ld $8, byteaddr - -test_lwl0: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 0($8) - check10 0xdeadbeefdeadbeef 0xffffffffb0cccccc - -test_lwl1: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 1($8) - check10 0xdeadbeefdeadbeef 0xffffffffb1b0cccc - -test_lwl2: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 2($8) - check10 0xdeadbeefdeadbeef 0xffffffffb2b1b0cc - -test_lwl3: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 3($8) - check10 0xdeadbeefdeadbeef 0xffffffffb3b2b1b0 - - -test_lwl4: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 4($8) - check10 0xdeadbeefdeadbeef 0xffffffffb4cccccc - -test_lwl5: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 5($8) - check10 0xdeadbeefdeadbeef 0xffffffffb5b4cccc - -test_lwl6: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 6($8) - check10 0xdeadbeefdeadbeef 0xffffffffb6b5b4cc - -test_lwl7: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwl $10, 7($8) - check10 0xdeadbeefdeadbeef 0xffffffffb7b6b5b4 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-lwr.s b/sim/testsuite/mips64r5900-elf/t-lwr.s deleted file mode 100644 index efb1cbc..0000000 --- a/sim/testsuite/mips64r5900-elf/t-lwr.s +++ /dev/null @@ -1,65 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - - - .text - ld $8, byteaddr - -test_lwr_0: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 0($8) - check10 0xdeadbeefdeadbeef 0xffffffffb3b2b1b0 - -test_lwr_1: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 1($8) - check10 0xdeadbeefdeadbeef 0xffffffffccb3b2b1 - -test_lwr_2: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 2($8) - check10 0xdeadbeefdeadbeef 0xffffffffccccb3b2 - -test_lwr_3: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 3($8) - check10 0xdeadbeefdeadbeef 0xffffffffccccccb3 - - -test_lwr_4: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 4($8) - check10 0xdeadbeefdeadbeef 0xffffffffb7b6b5b4 - -test_lwr_5: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 5($8) - check10 0xdeadbeefdeadbeef 0xffffffffccb7b6b5 - -test_lwr_6: - load $10 0xdeadbeefdeadbeef 0xffffffffcccccccc - lwr $10, 6($8) - check10 0xdeadbeefdeadbeef 0xffffffffccccb7b6 - -test_lwr_7: - load $10 0xdeadbeefdeadbeef 0xcccccccccccccccc - lwr $10, 7($8) - check10 0xdeadbeefdeadbeef 0xffffffffccccccb7 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-mult1.s b/sim/testsuite/mips64r5900-elf/t-mult1.s deleted file mode 100644 index cccccfb..0000000 --- a/sim/testsuite/mips64r5900-elf/t-mult1.s +++ /dev/null @@ -1,13 +0,0 @@ -.include "t-macros.i" - - start - -test_mult1: - load $8 0xffffffff7fffffff 0x0000000080000000 - load $9 0x10000000ffffffff 0x00000000ffffffff - mult1 $10, $8, $9 - check10 0x0000000000000000 0xffffffff80000000 - checkHI 0x000000007fffffff 0x0000000000000000 - checkLO 0xffffffff80000000 0x0000000000000000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-pabsh.s b/sim/testsuite/mips64r5900-elf/t-pabsh.s deleted file mode 100644 index 0d29843..0000000 --- a/sim/testsuite/mips64r5900-elf/t-pabsh.s +++ /dev/null @@ -1,10 +0,0 @@ -.include "t-macros.i" - - start - - load $8 0x8000800080008000 0xffffffffffffffff -test_pabsh: - pabsh $10, $8 - check10 0x7fff7fff7fff7fff 0x0001000100010001 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-pabsw.s b/sim/testsuite/mips64r5900-elf/t-pabsw.s deleted file mode 100644 index 18a02da..0000000 --- a/sim/testsuite/mips64r5900-elf/t-pabsw.s +++ /dev/null @@ -1,10 +0,0 @@ -.include "t-macros.i" - - start - - load $8 0x8000000080000000 0xffffffffffffffff -test_pabsw: - pabsw $10, $8 - check10 0x7fffffff7fffffff 0x0000000100000001 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-padsbh.s b/sim/testsuite/mips64r5900-elf/t-padsbh.s deleted file mode 100644 index 30970cc..0000000 --- a/sim/testsuite/mips64r5900-elf/t-padsbh.s +++ /dev/null @@ -1,11 +0,0 @@ -.include "t-macros.i" - - start - -test_padsbh: - load $8 0x0122800745658006 0x89a80005cdeb0004 - load $9 0x0001fff90002fffa 0x00037ffb00047ffc - padsbh $10,$9,$8 - check10 0x0123800045678000 0x765b7ff632197ff8 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-prot3w.s b/sim/testsuite/mips64r5900-elf/t-prot3w.s deleted file mode 100644 index 1c9f018..0000000 --- a/sim/testsuite/mips64r5900-elf/t-prot3w.s +++ /dev/null @@ -1,14 +0,0 @@ -.include "t-macros.i" - - start - -test_prot3w: - load $8 0x3333333311111111 0x2222222244444444 - prot3w $10,$8 #Expectation: - - # Prior to PR 17362, this was: - # check10 0x1111111122222222 0x3333333344444444 - - check10 0x1111111144444444 0x2222222233333333 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-psrlvw.s b/sim/testsuite/mips64r5900-elf/t-psrlvw.s deleted file mode 100644 index c3e8597..0000000 --- a/sim/testsuite/mips64r5900-elf/t-psrlvw.s +++ /dev/null @@ -1,11 +0,0 @@ -.include "t-macros.i" - - start - - load $8 0x00ff0000ffff0000 0x0000ffffffff0000 - load $9 0x00ff0000ffff0000 0x0000ffffffff0000 -test_psrlvw: - psrlvw $10,$8,$9 #Expectation: - check10 0xffffffffffff0000 0xffffffffffff0000 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-sdl.s b/sim/testsuite/mips64r5900-elf/t-sdl.s deleted file mode 100644 index ae76f74..0000000 --- a/sim/testsuite/mips64r5900-elf/t-sdl.s +++ /dev/null @@ -1,15 +0,0 @@ -.include "t-macros.i" - - start - -test_sdl: - load $8 0x0000000000000000 dest - load $9 0xbeefdead 0xdeadbeef - sdl $9, 7($8) - ld $10, dest - - check10 0x0000000000000000 0xdeadbeef - - exit0 - -dest: .long 0 diff --git a/sim/testsuite/mips64r5900-elf/t-sdr.s b/sim/testsuite/mips64r5900-elf/t-sdr.s deleted file mode 100644 index 59c2587..0000000 --- a/sim/testsuite/mips64r5900-elf/t-sdr.s +++ /dev/null @@ -1,159 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - .byte 0xb9 - .byte 0xba - .byte 0xbb - .byte 0xbc - .byte 0xbd - .byte 0xbe - .byte 0xbf - - .text - ld $8, byteaddr - -test_sdr_0: - load $10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - sdr $10, 0($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_1: - load $10 0xdeadbeefdeadbeef 0xccb7b6b5b4b3b2b1 - sdr $10, 1($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_2: - load $10 0xdeadbeefdeadbeef 0xccccb7b6b5b4b3b2 - sdr $10, 2($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_3: - load $10 0xdeadbeefdeadbeef 0xccccccb7b6b5b4b3 - sdr $10, 3($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_4: - load $10 0xdeadbeefdeadbeef 0xccccccccb7b6b5b4 - sdr $10, 4($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_5: - load $10 0xdeadbeefdeadbeef 0xccccccccccb7b6b5 - sdr $10, 5($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_6: - load $10 0xdeadbeefdeadbeef 0xccccccccccccb7b6 - sdr $10, 6($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_7: - load $10 0xdeadbeefdeadbeef 0xccccccccccccccb7 - sdr $10, 7($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - - -test_sdr_8: - load $10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - sdr $10, 8($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_9: - load $10 0xdeadbeefdeadbeef 0xccbfbebdbcbbbab9 - sdr $10, 9($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_10: - load $10 0xdeadbeefdeadbeef 0xccccbfbebdbcbbba - sdr $10, 10($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_11: - load $10 0xdeadbeefdeadbeef 0xccccccbfbebdbcbb - sdr $10, 11($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_12: - load $10 0xdeadbeefdeadbeef 0xccccccccbfbebdbc - sdr $10, 12($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_13: - load $10 0xdeadbeefdeadbeef 0xccccccccccbfbebd - sdr $10, 13($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_14: - load $10 0xdeadbeefdeadbeef 0xccccccccccccbfbe - sdr $10, 14($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - -test_sdr_15: - load $10 0xdeadbeefdeadbeef 0xccccccccccccccbf - sdr $10, 15($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - ld $10, 8($8) - check10 0xdeadbeefdeadbeef 0xbfbebdbcbbbab9b8 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-sub.s b/sim/testsuite/mips64r5900-elf/t-sub.s deleted file mode 100644 index ef314ae..0000000 --- a/sim/testsuite/mips64r5900-elf/t-sub.s +++ /dev/null @@ -1,26 +0,0 @@ -.include "t-macros.i" - - start - -test_sub: - - load $7 0x0000000000000000 0xffffffff80000001 - load $8 0x0000000000000000 0xffffffffffffffff - sub $10, $7, $8 - check10 0x0000000000000000 0xffffffff80000002 - -test_sub2: - load $7 0x0000000000000000 0xffffffff80000001 - load $8 0x0000000000000000 0x0000000000000001 - sub $10, $7, $8 - check10 0x0000000000000000 0xffffffff80000000 - - -test_sub3: - load $7 0x0000000000000000 0x0000000000000001 - load $8 0x0000000000000000 0x0000000000000002 - sub $10, $7, $8 - check10 0x0000000000000000 0xffffffffffffffff - - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-swl.s b/sim/testsuite/mips64r5900-elf/t-swl.s deleted file mode 100644 index 3edbb2b..0000000 --- a/sim/testsuite/mips64r5900-elf/t-swl.s +++ /dev/null @@ -1,73 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - - - .text - ld $8, byteaddr - -test_swl_0: - load $10 0xdeadbeefdeadbeef 0xffffffffb0cccccc - swl $10, 0($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swl_1: - load $10 0xdeadbeefdeadbeef 0xffffffffb1b0cccc - swl $10, 1($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swl_2: - load $10 0xdeadbeefdeadbeef 0xffffffffb2b1b0cc - swl $10, 2($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swl_3: - load $10 0xdeadbeefdeadbeef 0xffffffffb3b2b1b0 - swl $10, 3($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - - -test_swl_4: - load $10 0xdeadbeefdeadbeef 0xffffffffb4cccccc - swl $10, 4($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swl_5: - load $10 0xdeadbeefdeadbeef 0xffffffffb5b4cccc - swl $10, 5($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swl_6: - load $10 0xdeadbeefdeadbeef 0xffffffffb6b5b4cc - swl $10, 6($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swl_7: - load $10 0xdeadbeefdeadbeef 0xffffffffb7b6b5b4 - swl $10, 7($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/t-swr.s b/sim/testsuite/mips64r5900-elf/t-swr.s deleted file mode 100644 index e51d2eb..0000000 --- a/sim/testsuite/mips64r5900-elf/t-swr.s +++ /dev/null @@ -1,73 +0,0 @@ -.include "t-macros.i" - - start - - .align 3 - .data -byteaddr: .word bytes - .align 7 -bytes: - .byte 0xb0 - .byte 0xb1 - .byte 0xb2 - .byte 0xb3 - .byte 0xb4 - .byte 0xb5 - .byte 0xb6 - .byte 0xb7 - .byte 0xb8 - - - .text - ld $8, byteaddr - -test_swr_0: - load $10 0xdeadbeefdeadbeef 0xffffffffb3b2b1b0 - swr $10, 0($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swr_1: - load $10 0xdeadbeefdeadbeef 0xffffffffccb3b2b1 - swr $10, 1($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swr_2: - load $10 0xdeadbeefdeadbeef 0xffffffffccccb3b2 - swr $10, 2($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swr_3: - load $10 0xdeadbeefdeadbeef 0xffffffffccccccb3 - swr $10, 3($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - - -test_swr_4: - load $10 0xdeadbeefdeadbeef 0xffffffffb7b6b5b4 - swr $10, 4($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swr_5: - load $10 0xdeadbeefdeadbeef 0xffffffffccb7b6b5 - swr $10, 5($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swr_6: - load $10 0xdeadbeefdeadbeef 0xffffffffccccb7b6 - swr $10, 6($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - -test_swr_7: - load $10 0xdeadbeefdeadbeef 0xffffffffccccccb7 - swr $10, 7($8) - ld $10, 0($8) - check10 0xdeadbeefdeadbeef 0xb7b6b5b4b3b2b1b0 - - exit0 diff --git a/sim/testsuite/mips64r5900-elf/trap.s b/sim/testsuite/mips64r5900-elf/trap.s deleted file mode 100644 index 14e8dbc..0000000 --- a/sim/testsuite/mips64r5900-elf/trap.s +++ /dev/null @@ -1,63 +0,0 @@ - .include "t-macros.i" - - start - - mtc0 $0,$12 - mtc0 $0,$11 - mtc0 $0,$13 - - # install our jump table - la $24, jump_table - li $25, 0x80000180 - li $26, 0xbfc00380 - lw $27, 0($24) - sw $27, 0($25) - sw $27, 0($26) - lw $27, 4($24) - sw $27, 4($25) - sw $27, 4($26) - lw $27, 8($24) - sw $27, 8($25) - sw $27, 8($26) - - la $25, LocalHandler - la $27, address_trap - la $31, address_return - li $2, 1 - li $3, 1 -address_trap: - tge $2, $3 - b fail - -address_return: - exit0 - -fail: - exit47 - -jump_table: - .align 7 - la $24, LocalHandler - jr $24 - - - .align 7 -LocalHandler: - - mfc0 $25,$12 - andi $7,$25,0x002 # check that exl bit was set - beq $7,$0,fail - - mfc0 $25,$14 - bne $27,$25,fail # compare with the exception program counter - mfc0 $25,$13 - andi $25,$25,0x000000ff # extract excpt code, not checking int*[5:0] - li $8,(( 13 )<<2) # expected value of cause register - bne $25,$8,fail - mtc0 $31,$14 # return address from handler - nop - nop - nop - nop - eret - nop diff --git a/sim/testsuite/sim/.Sanitize b/sim/testsuite/sim/.Sanitize deleted file mode 100644 index fc0784f..0000000 --- a/sim/testsuite/sim/.Sanitize +++ /dev/null @@ -1,40 +0,0 @@ -# .Sanitize for devo/sim/testsuite/sim - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -# All files listed between the "Things-to-keep:" line and the -# "Files-to-sed:" line will be kept. All other files will be removed. -# Directories listed in this section will have their own Sanitize -# called. Directories not listed will be removed in their entirety -# with rm -rf. - -sky_files="sky" -if ( echo $* | grep keep\-sky > /dev/null ) ; then - keep_these_too="${sky_files} ${keep_these_too}" -else - lose_these_too="${sky_files} ${lose_these_too}" -fi - -Things-to-keep: - -fr30 -m32r - -Things-to-lose: - -Do-last: - -# End of file. diff --git a/sim/testsuite/sim/fr30/.Sanitize b/sim/testsuite/sim/fr30/.Sanitize deleted file mode 100644 index f66bf75..0000000 --- a/sim/testsuite/sim/fr30/.Sanitize +++ /dev/null @@ -1,134 +0,0 @@ -# .Sanitize for devo/sim/testsuite/sim/fr30 - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -Things-to-keep: - -testutils.inc - -allinsn.exp -misc.exp - -add.ms -div.ms -hello.ms - -add.cgs -add2.cgs -addc.cgs -addn.cgs -addn2.cgs -addsp.cgs -and.cgs -andb.cgs -andccr.cgs -andh.cgs -asr.cgs -asr2.cgs -bandh.cgs -bandl.cgs -bc.cgs -beorh.cgs -beorl.cgs -beq.cgs -bge.cgs -bgt.cgs -bhi.cgs -ble.cgs -bls.cgs -blt.cgs -bn.cgs -bnc.cgs -bne.cgs -bno.cgs -bnv.cgs -borh.cgs -borl.cgs -bp.cgs -bra.cgs -btsth.cgs -btstl.cgs -bv.cgs -call.cgs -cmp.cgs -cmp2.cgs -copld.cgs -copop.cgs -copst.cgs -copsv.cgs -div0s.cgs -div0u.cgs -div1.cgs -div2.cgs -div3.cgs -div4s.cgs -dmov.cgs -dmovb.cgs -dmovh.cgs -enter.cgs -eor.cgs -eorb.cgs -eorh.cgs -extsb.cgs -extsh.cgs -extub.cgs -extuh.cgs -int.cgs -inte.cgs -jmp.cgs -ld.cgs -ldi20.cgs -ldi32.cgs -ldi8.cgs -ldm0.cgs -ldm1.cgs -ldres.cgs -ldub.cgs -lduh.cgs -leave.cgs -lsl.cgs -lsl2.cgs -lsr.cgs -lsr2.cgs -mov.cgs -mul.cgs -mulh.cgs -mulu.cgs -muluh.cgs -nop.cgs -or.cgs -orb.cgs -orccr.cgs -orh.cgs -ret.cgs -reti.cgs -st.cgs -stb.cgs -sth.cgs -stilm.cgs -stm0.cgs -stm1.cgs -stres.cgs -sub.cgs -subc.cgs -subn.cgs -xchb.cgs - -Things-to-lose: - -Do-last: - -# End of file. diff --git a/sim/testsuite/sim/fr30/add.cgs b/sim/testsuite/sim/fr30/add.cgs deleted file mode 100644 index 1409df1..0000000 --- a/sim/testsuite/sim/fr30/add.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# fr30 testcase for add $Rj,$Ri, add $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - ; Test add $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - add r7,r8 - test_cc 0 0 0 0 - test_h_gr 3,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 1,r8 - set_cc 0x05 ; Set mask opposite of expected - add r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - set_cc 0x08 ; Set mask opposite of expected - add r8,r8 - test_cc 0 1 1 1 - test_h_gr 0,r8 - - ; Test add $u4Ri - mvi_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of expected - add 0,r8 - test_cc 0 0 0 0 - test_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of expected - add 1,r8 - test_cc 0 0 0 0 - test_h_gr 5,r8 - set_cc 0x0f ; Set mask opposite of expected - add 15,r8 - test_cc 0 0 0 0 - test_h_gr 20,r8 - mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits - set_cc 0x05 ; Set mask opposite of expected - add 1,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - set_cc 0x08 ; Set mask opposite of expected - add r8,r8 ; test zero, carry and overflow bits - test_cc 0 1 1 1; - test_h_gr 0,r8 - - pass diff --git a/sim/testsuite/sim/fr30/add.ms b/sim/testsuite/sim/fr30/add.ms deleted file mode 100644 index 9da6868..0000000 --- a/sim/testsuite/sim/fr30/add.ms +++ /dev/null @@ -1,13 +0,0 @@ -# fr30 testcase for add $Rj,$Ri -# cpu {} - - .include "testutils.inc" - - START - - .text - .global add -add: - add ac,ac - fail - EXIT 0 diff --git a/sim/testsuite/sim/fr30/add2.cgs b/sim/testsuite/sim/fr30/add2.cgs deleted file mode 100644 index 856acde..0000000 --- a/sim/testsuite/sim/fr30/add2.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# fr30 testcase for add2 $m4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - mvi_h_gr 30,r8 - set_cc 0x0e ; Set mask opposite of expected - add2 -16,r8 ; Max value of immediate field - test_cc 0 0 0 1 - test_h_gr 14,r8 - - set_cc 0x0e ; Set mask opposite of expected - add2 -3,r8 ; Mid value of immediate field - test_cc 0 0 0 1 - test_h_gr 11,r8 - - set_cc 0x0e ; Set mask opposite of expected - add2 -1,r8 ; Min value of immediate field - test_cc 0 0 0 1 - test_h_gr 10,r8 - - set_cc 0x0a ; Set mask opposite of expected - add2 -10,r8 ; Test zero and carry bits - test_cc 0 1 0 1 - test_h_gr 0,r8 - - set_cc 0x07 ; Set mask opposite of expected - add2 -16,r8 ; Test negative bit - test_cc 1 0 0 0 - test_h_gr -16,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0c ; Set mask opposite of expected - add2 -1,r8 ; Test overflow bit - test_cc 0 0 1 1 - test_h_gr 0x7fffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addc.cgs b/sim/testsuite/sim/fr30/addc.cgs deleted file mode 100644 index e135478..0000000 --- a/sim/testsuite/sim/fr30/addc.cgs +++ /dev/null @@ -1,50 +0,0 @@ -# fr30 testcase for addc $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0e ; Make sure carry bit is off - addc r7,r8 - test_cc 0 0 0 0 - test_h_gr 3,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 1,r8 - set_cc 0x04 ; Make sure carry bit is off - addc r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - set_cc 0x08 ; Make sure carry bit is off - addc r8,r8 - test_cc 0 1 1 1 - test_h_gr 0,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Make sure carry bit is on - addc r7,r8 - test_cc 0 0 0 0 - test_h_gr 4,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 0,r8 - set_cc 0x05 ; Make sure carry bit is on - addc r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0x7fffffff,r7 - set_cc 0x0b ; Make sure carry bit is on - addc r7,r8 - test_cc 0 1 0 1; - test_h_gr 0,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addn.cgs b/sim/testsuite/sim/fr30/addn.cgs deleted file mode 100644 index b7638d6..0000000 --- a/sim/testsuite/sim/fr30/addn.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# fr30 testcase for addn $Rj,$Ri, addn $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global addn -addn: - ; Test addn $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn r7,r8 - test_cc 1 1 1 1 - test_h_gr 3,r8 - - mvi_h_gr 0x7fffffff,r7 - mvi_h_gr 1,r8 - set_cc 0x05 ; Set mask opposite of normal result - addn r7,r8 - test_cc 0 1 0 1 - test_h_gr 0x80000000,r8 - - set_cc 0x08 ; Set mask opposite of normal result - addn r8,r8 - test_cc 1 0 0 0 - test_h_gr 0,r8 - - ; Test addn $u4Ri - mvi_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn 0,r8 - test_cc 1 1 1 1 - test_h_gr 4,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn 1,r8 - test_cc 1 1 1 1 - test_h_gr 5,r8 - set_cc 0x0f ; Set mask opposite of normal result - addn 15,r8 - test_cc 1 1 1 1 - test_h_gr 20,r8 - mvi_h_gr 0x7fffffff,r8 ; test neg and overflow bits - set_cc 0x05 ; Set mask opposite of normal result - addn 1,r8 - test_cc 0 1 0 1 - test_h_gr 0x80000000,r8 - set_cc 0x08 ; Set mask opposite of normal result - addn r8,r8 ; test zero, carry and overflow bits - test_cc 1 0 0 0; - test_h_gr 0,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addn2.cgs b/sim/testsuite/sim/fr30/addn2.cgs deleted file mode 100644 index 9525baf..0000000 --- a/sim/testsuite/sim/fr30/addn2.cgs +++ /dev/null @@ -1,43 +0,0 @@ -# fr30 testcase for addn2 $m4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - mvi_h_gr 30,r8 - set_cc 0x0e ; Set mask opposite of normal result - addn2 -16,r8 ; Max value of immediate field - test_cc 1 1 1 0 - test_h_gr 14,r8 - - set_cc 0x0e ; Set mask opposite of normal result - addn2 -3,r8 ; Mid value of immediate field - test_cc 1 1 1 0 - test_h_gr 11,r8 - - set_cc 0x0e ; Set mask opposite of normal result - addn2 -1,r8 ; Min value of immediate field - test_cc 1 1 1 0 - test_h_gr 10,r8 - - set_cc 0x0a ; Set mask opposite of normal result - addn2 -10,r8 ; Test zero and carry bits - test_cc 1 0 1 0 - test_h_gr 0,r8 - - set_cc 0x07 ; Set mask opposite of normal result - addn2 -16,r8 ; Test negative bit - test_cc 0 1 1 1 - test_h_gr -16,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0c ; Set mask opposite of normal result - addn2 -1,r8 ; Test overflow bit - test_cc 1 1 0 0 - test_h_gr 0x7fffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/addsp.cgs b/sim/testsuite/sim/fr30/addsp.cgs deleted file mode 100644 index da5bc36..0000000 --- a/sim/testsuite/sim/fr30/addsp.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# fr30 testcase for addsp $s10 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global addsp -addsp: - ; Test addsp $s10 - mvr_h_gr sp,r7 ; save stack pointer permanently - mvr_h_gr sp,r8 ; Shadow updated sp - set_cc 0x0f ; Condition codes are irrelevent - addsp 508 - test_cc 1 1 1 1 - inci_h_gr 508,r8 - testr_h_gr r8,sp - - set_cc 0x0e ; Condition codes are irrelevent - addsp 0 - test_cc 1 1 1 0 - testr_h_gr r8,sp - - set_cc 0x0d ; Condition codes are irrelevent - addsp -512 - test_cc 1 1 0 1 - inci_h_gr -512,r8 - testr_h_gr r8,sp - - pass diff --git a/sim/testsuite/sim/fr30/allinsn.exp b/sim/testsuite/sim/fr30/allinsn.exp deleted file mode 100644 index cbdbbf3..0000000 --- a/sim/testsuite/sim/fr30/allinsn.exp +++ /dev/null @@ -1,16 +0,0 @@ -# FR30 simulator testsuite. - -if [istarget fr30*-*-*] { - # load support procs - # load_lib cgen.exp - - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src - } -} diff --git a/sim/testsuite/sim/fr30/and.cgs b/sim/testsuite/sim/fr30/and.cgs deleted file mode 100644 index 49db6fd..0000000 --- a/sim/testsuite/sim/fr30/and.cgs +++ /dev/null @@ -1,51 +0,0 @@ -# fr30 testcase for and $Rj,$Ri, and $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global and -and: - ; Test and $Rj,$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0x55555555,r8 - set_cc 0x0b ; Set mask opposite of expected - and r7,r8 - test_cc 0 1 1 1 - test_h_gr 0,r8 - - mvi_h_gr 0xffff0000,r8 - set_cc 0x04 ; Set mask opposite of expected - and r7,r8 - test_cc 1 0 0 0 - test_h_gr 0xaaaa0000,r8 - - mvi_h_gr 0xffff,r8 - set_cc 0x0d ; Set mask opposite of expected - and r7,r8 - test_cc 0 0 0 1 - test_h_gr 0xaaaa,r8 - - ; Test and $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - and r7,@sp - test_cc 0 1 1 1 - test_h_mem 0,sp - - mvi_h_mem 0xffff0000,sp - set_cc 0x04 ; Set mask opposite of expected - and r7,@sp - test_cc 1 0 0 0 - test_h_mem 0xaaaa0000,sp - - mvi_h_mem 0xffff,sp - set_cc 0x0d ; Set mask opposite of expected - and r7,@sp - test_cc 0 0 0 1 - test_h_mem 0xaaaa,sp - - pass diff --git a/sim/testsuite/sim/fr30/andb.cgs b/sim/testsuite/sim/fr30/andb.cgs deleted file mode 100644 index c01d49d..0000000 --- a/sim/testsuite/sim/fr30/andb.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# fr30 testcase for andb $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global andb -andb: - ; Test andb $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - andb r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Set mask opposite of expected - andb r7,@sp - test_cc 1 0 0 0 - test_h_mem 0xaaffffff,sp - - mvi_h_mem 0x0fffffff,sp - set_cc 0x0d ; Set mask opposite of expected - andb r7,@sp - test_cc 0 0 0 1 - test_h_mem 0x0affffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/andccr.cgs b/sim/testsuite/sim/fr30/andccr.cgs deleted file mode 100644 index 7f8f99e..0000000 --- a/sim/testsuite/sim/fr30/andccr.cgs +++ /dev/null @@ -1,51 +0,0 @@ -# fr30 testcase for andccr $u8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global andccr -andccr: - set_cc 0x00 - set_i 0 - set_s_system - andccr 0xff - test_cc 0 0 0 0 - test_i 0 - test_s_system - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0xff - test_cc 1 1 1 1 - test_i 1 - test_s_user - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0xaa - test_cc 1 0 1 0 - test_i 0 - test_s_user - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0xc0 - test_cc 0 0 0 0 - test_i 0 - test_s_system - - set_cc 0x0f - set_i 1 - set_s_user - andccr 0x3f ; no effect - test_cc 1 1 1 1 - test_i 1 - test_s_user - - pass diff --git a/sim/testsuite/sim/fr30/andh.cgs b/sim/testsuite/sim/fr30/andh.cgs deleted file mode 100644 index a172fc7..0000000 --- a/sim/testsuite/sim/fr30/andh.cgs +++ /dev/null @@ -1,31 +0,0 @@ -# fr30 testcase for andh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global andh -andh: - ; Test andh $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - andh r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00005555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Set mask opposite of expected - andh r7,@sp - test_cc 1 0 0 0 - test_h_mem 0xaaaaffff,sp - - mvi_h_mem 0x00ffffff,sp - set_cc 0x0d ; Set mask opposite of expected - andh r7,@sp - test_cc 0 0 0 1 - test_h_mem 0x00aaffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/asr.cgs b/sim/testsuite/sim/fr30/asr.cgs deleted file mode 100644 index f783d41..0000000 --- a/sim/testsuite/sim/fr30/asr.cgs +++ /dev/null @@ -1,65 +0,0 @@ -# fr30 testcase for asr $Rj,$Ri, asr $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global asr -asr: - ; Test asr $Rj,$Ri - mvi_h_gr 0xdeadbee0,r7 ; Shift by 0 - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - asr r7,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0xdeadbee1,r7 ; Shift by 1 - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr r7,r8 - test_cc 1 0 1 0 - test_h_gr 0xc0000000,r8 - - mvi_h_gr 0xdeadbeff,r7 ; Shift by 31 - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr r7,r8 - test_cc 1 0 1 0 - test_h_gr -1,r8 - - mvi_h_gr 0xdeadbeff,r7 ; clear register - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - asr r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - ; Test asr $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - asr 0,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr 1,r8 - test_cc 1 0 1 0 - test_h_gr 0xc0000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr 15,r8 - test_cc 1 0 1 0 - test_h_gr 0xffff0000,r8 - - mvi_h_gr 0x00004000,r8 - set_cc 0x0a ; Set mask opposite of expected - asr 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/asr2.cgs b/sim/testsuite/sim/fr30/asr2.cgs deleted file mode 100644 index 884e40d..0000000 --- a/sim/testsuite/sim/fr30/asr2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for asr2 $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global asr2 -asr2: - ; Test asr2 $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - asr2 0,r8 - test_cc 1 0 0 0 - test_h_gr 0xffff8000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr2 1,r8 - test_cc 1 0 1 0 - test_h_gr 0xffffc000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x07 ; Set mask opposite of expected - asr2 15,r8 - test_cc 1 0 1 0 - test_h_gr -1,r8 - - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - asr2 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/bandh.cgs b/sim/testsuite/sim/fr30/bandh.cgs deleted file mode 100644 index 45ab5e5..0000000 --- a/sim/testsuite/sim/fr30/bandh.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for bandh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bandh -bandh: - ; Test bandh $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - bandh 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x05555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Condition codes should not change - bandh 0x0a,@sp - test_cc 0 1 0 0 - test_h_mem 0xafffffff,sp - - mvi_h_mem 0xe5ffffff,sp - set_cc 0x0a ; Condition codes should not change - bandh 0x07,@sp - test_cc 1 0 1 0 - test_h_mem 0x65ffffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/bandl.cgs b/sim/testsuite/sim/fr30/bandl.cgs deleted file mode 100644 index 9cd4825..0000000 --- a/sim/testsuite/sim/fr30/bandl.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for bandl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bandl -bandl: - ; Test bandl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - bandl 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x50555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Condition codes should not change - bandl 0x0a,@sp - test_cc 0 1 0 0 - test_h_mem 0xfaffffff,sp - - mvi_h_mem 0x5effffff,sp - set_cc 0x0a ; Condition codes should not change - bandl 0x07,@sp - test_cc 1 0 1 0 - test_h_mem 0x56ffffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/bc.cgs b/sim/testsuite/sim/fr30/bc.cgs deleted file mode 100644 index 0502625..0000000 --- a/sim/testsuite/sim/fr30/bc.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bc $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bc -bc: - ; Test bc $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bc - - set_cc 0x0e ; condition codes are irrelevent - no_branch bc - - set_cc 0x0d ; condition codes are irrelevent - take_branch bc - - set_cc 0x0c ; condition codes are irrelevent - no_branch bc - - set_cc 0x0b ; condition codes are irrelevent - take_branch bc - - set_cc 0x0a ; condition codes are irrelevent - no_branch bc - - set_cc 0x09 ; condition codes are irrelevent - take_branch bc - - set_cc 0x08 ; condition codes are irrelevent - no_branch bc - - set_cc 0x07 ; condition codes are irrelevent - take_branch bc - - set_cc 0x06 ; condition codes are irrelevent - no_branch bc - - set_cc 0x05 ; condition codes are irrelevent - take_branch bc - - set_cc 0x04 ; condition codes are irrelevent - no_branch bc - - set_cc 0x03 ; condition codes are irrelevent - take_branch bc - - set_cc 0x02 ; condition codes are irrelevent - no_branch bc - - set_cc 0x01 ; condition codes are irrelevent - take_branch bc - - set_cc 0x00 ; condition codes are irrelevent - no_branch bc - - ; Test bc:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bc:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bc:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bc:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bc:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bc:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bc:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bc:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bc:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bc:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bc:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bc:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bc:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bc:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bc:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bc:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bc:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/beorh.cgs b/sim/testsuite/sim/fr30/beorh.cgs deleted file mode 100644 index 6d07f1a..0000000 --- a/sim/testsuite/sim/fr30/beorh.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for beorh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global beorh -beorh: - ; Test beorh $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - beorh 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0xf5555555,sp - - mvi_h_mem 0x0fffffff,sp - set_cc 0x04 ; Condition codes should not change - beorh 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0x0fffffff,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x0a ; Condition codes should not change - beorh 0x0f,@sp - test_cc 1 0 1 0 - test_h_mem 0x0fffffff,sp - - mvi_h_mem 0x9eadbeef,sp - set_cc 0x09 ; Condition codes should not change - beorh 0x04,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/beorl.cgs b/sim/testsuite/sim/fr30/beorl.cgs deleted file mode 100644 index f7ea053..0000000 --- a/sim/testsuite/sim/fr30/beorl.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for beorl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global beorl -beorl: - ; Test beorl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - beorl 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x5f555555,sp - - mvi_h_mem 0xf0ffffff,sp - set_cc 0x04 ; Condition codes should not change - beorl 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0xf0ffffff,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x0a ; Condition codes should not change - beorl 0x0f,@sp - test_cc 1 0 1 0 - test_h_mem 0xf0ffffff,sp - - mvi_h_mem 0xddadbeef,sp - set_cc 0x09 ; Condition codes should not change - beorl 0x03,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/beq.cgs b/sim/testsuite/sim/fr30/beq.cgs deleted file mode 100644 index edd797e..0000000 --- a/sim/testsuite/sim/fr30/beq.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for beq $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global beq -beq: - ; Test beq $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch beq - - set_cc 0x0e ; condition codes are irrelevent - take_branch beq - - set_cc 0x0d ; condition codes are irrelevent - take_branch beq - - set_cc 0x0c ; condition codes are irrelevent - take_branch beq - - set_cc 0x0b ; condition codes are irrelevent - no_branch beq - - set_cc 0x0a ; condition codes are irrelevent - no_branch beq - - set_cc 0x09 ; condition codes are irrelevent - no_branch beq - - set_cc 0x08 ; condition codes are irrelevent - no_branch beq - - set_cc 0x07 ; condition codes are irrelevent - take_branch beq - - set_cc 0x06 ; condition codes are irrelevent - take_branch beq - - set_cc 0x05 ; condition codes are irrelevent - take_branch beq - - set_cc 0x04 ; condition codes are irrelevent - take_branch beq - - set_cc 0x03 ; condition codes are irrelevent - no_branch beq - - set_cc 0x02 ; condition codes are irrelevent - no_branch beq - - set_cc 0x01 ; condition codes are irrelevent - no_branch beq - - set_cc 0x00 ; condition codes are irrelevent - no_branch beq - - ; Test beq:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d beq:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d beq:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d beq:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d beq:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d beq:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d beq:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d beq:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d beq:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d beq:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d beq:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d beq:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d beq:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d beq:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d beq:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d beq:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d beq:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bge.cgs b/sim/testsuite/sim/fr30/bge.cgs deleted file mode 100644 index dd7796c..0000000 --- a/sim/testsuite/sim/fr30/bge.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bge $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bge -bge: - ; Test bge $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bge - - set_cc 0x0e ; condition codes are irrelevent - take_branch bge - - set_cc 0x0d ; condition codes are irrelevent - no_branch bge - - set_cc 0x0c ; condition codes are irrelevent - no_branch bge - - set_cc 0x0b ; condition codes are irrelevent - take_branch bge - - set_cc 0x0a ; condition codes are irrelevent - take_branch bge - - set_cc 0x09 ; condition codes are irrelevent - no_branch bge - - set_cc 0x08 ; condition codes are irrelevent - no_branch bge - - set_cc 0x07 ; condition codes are irrelevent - no_branch bge - - set_cc 0x06 ; condition codes are irrelevent - no_branch bge - - set_cc 0x05 ; condition codes are irrelevent - take_branch bge - - set_cc 0x04 ; condition codes are irrelevent - take_branch bge - - set_cc 0x03 ; condition codes are irrelevent - no_branch bge - - set_cc 0x02 ; condition codes are irrelevent - no_branch bge - - set_cc 0x01 ; condition codes are irrelevent - take_branch bge - - set_cc 0x00 ; condition codes are irrelevent - take_branch bge - - ; Test bge:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bge:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bge:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bge:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bge:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bge:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bge:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bge:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bge:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bge:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bge:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bge:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bge:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bge:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bge:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bge:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bge:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bgt.cgs b/sim/testsuite/sim/fr30/bgt.cgs deleted file mode 100644 index 525ac2e..0000000 --- a/sim/testsuite/sim/fr30/bgt.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bgt $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bgt -bgt: - ; Test bgt $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0e ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0d ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0c ; condition codes are irrelevent - no_branch bgt - - set_cc 0x0b ; condition codes are irrelevent - take_branch bgt - - set_cc 0x0a ; condition codes are irrelevent - take_branch bgt - - set_cc 0x09 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x08 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x07 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x06 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x05 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x04 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x03 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x02 ; condition codes are irrelevent - no_branch bgt - - set_cc 0x01 ; condition codes are irrelevent - take_branch bgt - - set_cc 0x00 ; condition codes are irrelevent - take_branch bgt - - ; Test bgt:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bgt:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bgt:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bgt:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bgt:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bgt:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bgt:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bgt:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bgt:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bgt:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bgt:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bgt:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bgt:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bgt:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bgt:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bgt:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bgt:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bhi.cgs b/sim/testsuite/sim/fr30/bhi.cgs deleted file mode 100644 index f5a1549..0000000 --- a/sim/testsuite/sim/fr30/bhi.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bhi $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bhi -bhi: - ; Test bhi $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0e ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0d ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0c ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0b ; condition codes are irrelevent - no_branch bhi - - set_cc 0x0a ; condition codes are irrelevent - take_branch bhi - - set_cc 0x09 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x08 ; condition codes are irrelevent - take_branch bhi - - set_cc 0x07 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x06 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x05 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x04 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x03 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x02 ; condition codes are irrelevent - take_branch bhi - - set_cc 0x01 ; condition codes are irrelevent - no_branch bhi - - set_cc 0x00 ; condition codes are irrelevent - take_branch bhi - - ; Test bhi:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bhi:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bhi:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bhi:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bhi:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bhi:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bhi:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bhi:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bhi:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bhi:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bhi:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bhi:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bhi:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bhi:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bhi:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bhi:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bhi:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/ble.cgs b/sim/testsuite/sim/fr30/ble.cgs deleted file mode 100644 index 1a33f78..0000000 --- a/sim/testsuite/sim/fr30/ble.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for ble $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ble -ble: - ; Test ble $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch ble - - set_cc 0x0e ; condition codes are irrelevent - take_branch ble - - set_cc 0x0d ; condition codes are irrelevent - take_branch ble - - set_cc 0x0c ; condition codes are irrelevent - take_branch ble - - set_cc 0x0b ; condition codes are irrelevent - no_branch ble - - set_cc 0x0a ; condition codes are irrelevent - no_branch ble - - set_cc 0x09 ; condition codes are irrelevent - take_branch ble - - set_cc 0x08 ; condition codes are irrelevent - take_branch ble - - set_cc 0x07 ; condition codes are irrelevent - take_branch ble - - set_cc 0x06 ; condition codes are irrelevent - take_branch ble - - set_cc 0x05 ; condition codes are irrelevent - take_branch ble - - set_cc 0x04 ; condition codes are irrelevent - take_branch ble - - set_cc 0x03 ; condition codes are irrelevent - take_branch ble - - set_cc 0x02 ; condition codes are irrelevent - take_branch ble - - set_cc 0x01 ; condition codes are irrelevent - no_branch ble - - set_cc 0x00 ; condition codes are irrelevent - no_branch ble - - ; Test ble:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d ble:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d ble:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d ble:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d ble:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d ble:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d ble:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d ble:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d ble:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d ble:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d ble:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d ble:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d ble:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d ble:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d ble:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d ble:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d ble:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bls.cgs b/sim/testsuite/sim/fr30/bls.cgs deleted file mode 100644 index c0148b7..0000000 --- a/sim/testsuite/sim/fr30/bls.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bls $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bls -bls: - ; Test bls $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bls - - set_cc 0x0e ; condition codes are irrelevent - take_branch bls - - set_cc 0x0d ; condition codes are irrelevent - take_branch bls - - set_cc 0x0c ; condition codes are irrelevent - take_branch bls - - set_cc 0x0b ; condition codes are irrelevent - take_branch bls - - set_cc 0x0a ; condition codes are irrelevent - no_branch bls - - set_cc 0x09 ; condition codes are irrelevent - take_branch bls - - set_cc 0x08 ; condition codes are irrelevent - no_branch bls - - set_cc 0x07 ; condition codes are irrelevent - take_branch bls - - set_cc 0x06 ; condition codes are irrelevent - take_branch bls - - set_cc 0x05 ; condition codes are irrelevent - take_branch bls - - set_cc 0x04 ; condition codes are irrelevent - take_branch bls - - set_cc 0x03 ; condition codes are irrelevent - take_branch bls - - set_cc 0x02 ; condition codes are irrelevent - no_branch bls - - set_cc 0x01 ; condition codes are irrelevent - take_branch bls - - set_cc 0x00 ; condition codes are irrelevent - no_branch bls - - ; Test bls:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bls:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bls:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bls:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bls:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bls:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bls:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bls:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bls:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bls:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bls:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bls:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bls:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bls:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bls:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bls:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bls:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/blt.cgs b/sim/testsuite/sim/fr30/blt.cgs deleted file mode 100644 index f7b6ff1..0000000 --- a/sim/testsuite/sim/fr30/blt.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for blt $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global blt -blt: - ; Test blt $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch blt - - set_cc 0x0e ; condition codes are irrelevent - no_branch blt - - set_cc 0x0d ; condition codes are irrelevent - take_branch blt - - set_cc 0x0c ; condition codes are irrelevent - take_branch blt - - set_cc 0x0b ; condition codes are irrelevent - no_branch blt - - set_cc 0x0a ; condition codes are irrelevent - no_branch blt - - set_cc 0x09 ; condition codes are irrelevent - take_branch blt - - set_cc 0x08 ; condition codes are irrelevent - take_branch blt - - set_cc 0x07 ; condition codes are irrelevent - take_branch blt - - set_cc 0x06 ; condition codes are irrelevent - take_branch blt - - set_cc 0x05 ; condition codes are irrelevent - no_branch blt - - set_cc 0x04 ; condition codes are irrelevent - no_branch blt - - set_cc 0x03 ; condition codes are irrelevent - take_branch blt - - set_cc 0x02 ; condition codes are irrelevent - take_branch blt - - set_cc 0x01 ; condition codes are irrelevent - no_branch blt - - set_cc 0x00 ; condition codes are irrelevent - no_branch blt - - ; Test blt:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d blt:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d blt:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d blt:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d blt:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d blt:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d blt:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d blt:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d blt:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d blt:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d blt:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d blt:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d blt:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d blt:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d blt:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d blt:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d blt:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bn.cgs b/sim/testsuite/sim/fr30/bn.cgs deleted file mode 100644 index 45858fc..0000000 --- a/sim/testsuite/sim/fr30/bn.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bn $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bn -bn: - ; Test bn $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bn - - set_cc 0x0e ; condition codes are irrelevent - take_branch bn - - set_cc 0x0d ; condition codes are irrelevent - take_branch bn - - set_cc 0x0c ; condition codes are irrelevent - take_branch bn - - set_cc 0x0b ; condition codes are irrelevent - take_branch bn - - set_cc 0x0a ; condition codes are irrelevent - take_branch bn - - set_cc 0x09 ; condition codes are irrelevent - take_branch bn - - set_cc 0x08 ; condition codes are irrelevent - take_branch bn - - set_cc 0x07 ; condition codes are irrelevent - no_branch bn - - set_cc 0x06 ; condition codes are irrelevent - no_branch bn - - set_cc 0x05 ; condition codes are irrelevent - no_branch bn - - set_cc 0x04 ; condition codes are irrelevent - no_branch bn - - set_cc 0x03 ; condition codes are irrelevent - no_branch bn - - set_cc 0x02 ; condition codes are irrelevent - no_branch bn - - set_cc 0x01 ; condition codes are irrelevent - no_branch bn - - set_cc 0x00 ; condition codes are irrelevent - no_branch bn - - ; Test bn:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bn:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bn:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bn:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bn:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bn:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bn:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bn:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bn:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bn:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bn:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bn:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bn:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bn:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bn:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bn:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bn:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bnc.cgs b/sim/testsuite/sim/fr30/bnc.cgs deleted file mode 100644 index 9968c43..0000000 --- a/sim/testsuite/sim/fr30/bnc.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bnc $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bnc -bc: - ; Test bnc $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bnc - - set_cc 0x0e ; condition codes are irrelevent - take_branch bnc - - set_cc 0x0d ; condition codes are irrelevent - no_branch bnc - - set_cc 0x0c ; condition codes are irrelevent - take_branch bnc - - set_cc 0x0b ; condition codes are irrelevent - no_branch bnc - - set_cc 0x0a ; condition codes are irrelevent - take_branch bnc - - set_cc 0x09 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x08 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x07 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x06 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x05 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x04 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x03 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x02 ; condition codes are irrelevent - take_branch bnc - - set_cc 0x01 ; condition codes are irrelevent - no_branch bnc - - set_cc 0x00 ; condition codes are irrelevent - take_branch bnc - - ; Test bnc:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bnc:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bnc:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bnc:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bnc:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bnc:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bnc:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bnc:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bnc:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bnc:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bnc:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bnc:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bnc:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bnc:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bnc:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bnc:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bnc:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bne.cgs b/sim/testsuite/sim/fr30/bne.cgs deleted file mode 100644 index 58971de..0000000 --- a/sim/testsuite/sim/fr30/bne.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bne $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bne -bne: - ; Test bne $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bne - - set_cc 0x0e ; condition codes are irrelevent - no_branch bne - - set_cc 0x0d ; condition codes are irrelevent - no_branch bne - - set_cc 0x0c ; condition codes are irrelevent - no_branch bne - - set_cc 0x0b ; condition codes are irrelevent - take_branch bne - - set_cc 0x0a ; condition codes are irrelevent - take_branch bne - - set_cc 0x09 ; condition codes are irrelevent - take_branch bne - - set_cc 0x08 ; condition codes are irrelevent - take_branch bne - - set_cc 0x07 ; condition codes are irrelevent - no_branch bne - - set_cc 0x06 ; condition codes are irrelevent - no_branch bne - - set_cc 0x05 ; condition codes are irrelevent - no_branch bne - - set_cc 0x04 ; condition codes are irrelevent - no_branch bne - - set_cc 0x03 ; condition codes are irrelevent - take_branch bne - - set_cc 0x02 ; condition codes are irrelevent - take_branch bne - - set_cc 0x01 ; condition codes are irrelevent - take_branch bne - - set_cc 0x00 ; condition codes are irrelevent - take_branch bne - - ; Test bne:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bne:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bne:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bne:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bne:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bne:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bne:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bne:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bne:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bne:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bne:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bne:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bne:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bne:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bne:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bne:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bne:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bno.cgs b/sim/testsuite/sim/fr30/bno.cgs deleted file mode 100644 index faef9ba..0000000 --- a/sim/testsuite/sim/fr30/bno.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bno $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bno -bno: - ; Test bno $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bno - - set_cc 0x0e ; condition codes are irrelevent - no_branch bno - - set_cc 0x0d ; condition codes are irrelevent - no_branch bno - - set_cc 0x0c ; condition codes are irrelevent - no_branch bno - - set_cc 0x0b ; condition codes are irrelevent - no_branch bno - - set_cc 0x0a ; condition codes are irrelevent - no_branch bno - - set_cc 0x09 ; condition codes are irrelevent - no_branch bno - - set_cc 0x08 ; condition codes are irrelevent - no_branch bno - - set_cc 0x07 ; condition codes are irrelevent - no_branch bno - - set_cc 0x06 ; condition codes are irrelevent - no_branch bno - - set_cc 0x05 ; condition codes are irrelevent - no_branch bno - - set_cc 0x04 ; condition codes are irrelevent - no_branch bno - - set_cc 0x03 ; condition codes are irrelevent - no_branch bno - - set_cc 0x02 ; condition codes are irrelevent - no_branch bno - - set_cc 0x01 ; condition codes are irrelevent - no_branch bno - - set_cc 0x00 ; condition codes are irrelevent - no_branch bno - - ; Test bno:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bno:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bno:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bno:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bno:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bno:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bno:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bno:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bno:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bno:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bno:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bno:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bno:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bno:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bno:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bno:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bno:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bnv.cgs b/sim/testsuite/sim/fr30/bnv.cgs deleted file mode 100644 index 7615abd..0000000 --- a/sim/testsuite/sim/fr30/bnv.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bnv $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bnv -bnv: - ; Test bnv $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bnv - - set_cc 0x0e ; condition codes are irrelevent - no_branch bnv - - set_cc 0x0d ; condition codes are irrelevent - take_branch bnv - - set_cc 0x0c ; condition codes are irrelevent - take_branch bnv - - set_cc 0x0b ; condition codes are irrelevent - no_branch bnv - - set_cc 0x0a ; condition codes are irrelevent - no_branch bnv - - set_cc 0x09 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x08 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x07 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x06 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x05 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x04 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x03 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x02 ; condition codes are irrelevent - no_branch bnv - - set_cc 0x01 ; condition codes are irrelevent - take_branch bnv - - set_cc 0x00 ; condition codes are irrelevent - take_branch bnv - - ; Test bnv:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bnv:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bnv:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bnv:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bnv:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bnv:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bnv:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bnv:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bnv:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - no_branch_d bnv:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - no_branch_d bnv:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bnv:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bnv:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - no_branch_d bnv:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - no_branch_d bnv:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bnv:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bnv:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/borh.cgs b/sim/testsuite/sim/fr30/borh.cgs deleted file mode 100644 index 039f18a..0000000 --- a/sim/testsuite/sim/fr30/borh.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for borh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global borh -borh: - ; Test borh $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - borh 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0xf5555555,sp - - mvi_h_mem 0x0fffffff,sp - set_cc 0x04 ; Condition codes should not change - borh 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0x0fffffff,sp - - mvi_h_mem 0xceadbeef,sp - set_cc 0x09 ; Condition codes should not change - borh 0x01,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/borl.cgs b/sim/testsuite/sim/fr30/borl.cgs deleted file mode 100644 index beb2bbb..0000000 --- a/sim/testsuite/sim/fr30/borl.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for borl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global borl -borl: - ; Test borl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0f ; Condition codes should not change - borl 0x0a,@sp - test_cc 1 1 1 1 - test_h_mem 0x5f555555,sp - - mvi_h_mem 0xf0ffffff,sp - set_cc 0x04 ; Condition codes should not change - borl 0x00,@sp - test_cc 0 1 0 0 - test_h_mem 0xf0ffffff,sp - - mvi_h_mem 0xdcadbeef,sp - set_cc 0x09 ; Condition codes should not change - borl 0x02,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/bp.cgs b/sim/testsuite/sim/fr30/bp.cgs deleted file mode 100644 index 3753283..0000000 --- a/sim/testsuite/sim/fr30/bp.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bp $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bp -bp: - ; Test bp $label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch bp - - set_cc 0x0e ; condition codes are irrelevent - no_branch bp - - set_cc 0x0d ; condition codes are irrelevent - no_branch bp - - set_cc 0x0c ; condition codes are irrelevent - no_branch bp - - set_cc 0x0b ; condition codes are irrelevent - no_branch bp - - set_cc 0x0a ; condition codes are irrelevent - no_branch bp - - set_cc 0x09 ; condition codes are irrelevent - no_branch bp - - set_cc 0x08 ; condition codes are irrelevent - no_branch bp - - set_cc 0x07 ; condition codes are irrelevent - take_branch bp - - set_cc 0x06 ; condition codes are irrelevent - take_branch bp - - set_cc 0x05 ; condition codes are irrelevent - take_branch bp - - set_cc 0x04 ; condition codes are irrelevent - take_branch bp - - set_cc 0x03 ; condition codes are irrelevent - take_branch bp - - set_cc 0x02 ; condition codes are irrelevent - take_branch bp - - set_cc 0x01 ; condition codes are irrelevent - take_branch bp - - set_cc 0x00 ; condition codes are irrelevent - take_branch bp - - ; Test bp:d label9 - set_cc 0x0f ; condition codes are irrelevent - no_branch_d bp:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - no_branch_d bp:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bp:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bp:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - no_branch_d bp:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - no_branch_d bp:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bp:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bp:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bp:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bp:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bp:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bp:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bp:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bp:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bp:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bp:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/bra.cgs b/sim/testsuite/sim/fr30/bra.cgs deleted file mode 100644 index 3732f74..0000000 --- a/sim/testsuite/sim/fr30/bra.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bra $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bra -bra: - ; Test bra $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bra - - set_cc 0x0e ; condition codes are irrelevent - take_branch bra - - set_cc 0x0d ; condition codes are irrelevent - take_branch bra - - set_cc 0x0c ; condition codes are irrelevent - take_branch bra - - set_cc 0x0b ; condition codes are irrelevent - take_branch bra - - set_cc 0x0a ; condition codes are irrelevent - take_branch bra - - set_cc 0x09 ; condition codes are irrelevent - take_branch bra - - set_cc 0x08 ; condition codes are irrelevent - take_branch bra - - set_cc 0x07 ; condition codes are irrelevent - take_branch bra - - set_cc 0x06 ; condition codes are irrelevent - take_branch bra - - set_cc 0x05 ; condition codes are irrelevent - take_branch bra - - set_cc 0x04 ; condition codes are irrelevent - take_branch bra - - set_cc 0x03 ; condition codes are irrelevent - take_branch bra - - set_cc 0x02 ; condition codes are irrelevent - take_branch bra - - set_cc 0x01 ; condition codes are irrelevent - take_branch bra - - set_cc 0x00 ; condition codes are irrelevent - take_branch bra - - ; Test bra:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bra:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bra:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - take_branch_d bra:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - take_branch_d bra:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bra:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bra:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - take_branch_d bra:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - take_branch_d bra:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bra:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bra:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - take_branch_d bra:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - take_branch_d bra:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bra:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bra:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - take_branch_d bra:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - take_branch_d bra:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/btsth.cgs b/sim/testsuite/sim/fr30/btsth.cgs deleted file mode 100644 index 2897c34..0000000 --- a/sim/testsuite/sim/fr30/btsth.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for btsth $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global btsth -btsth: - ; Test btsth $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - btsth 0x0a,@sp - test_cc 0 1 1 1 - test_h_mem 0x55555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x04 ; Set mask opposite of expected - btsth 0x0a,@sp - test_cc 1 0 0 0 - test_h_mem 0xffffffff,sp - - mvi_h_mem 0xe5ffffff,sp - set_cc 0x0e ; Set mask opposite of expected - btsth 0x07,@sp - test_cc 0 0 1 0 - test_h_mem 0xe5ffffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/btstl.cgs b/sim/testsuite/sim/fr30/btstl.cgs deleted file mode 100644 index cef5a92..0000000 --- a/sim/testsuite/sim/fr30/btstl.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# fr30 testcase for btstl $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global btstl -btstl: - ; Test btstl $Rj,@$Ri - mvi_h_mem 0x55555555,sp - set_cc 0x0b ; Set mask opposite of expected - btstl 0x0a,@sp - test_cc 0 1 1 1 - test_h_mem 0x55555555,sp - - mvi_h_mem 0xffffffff,sp - set_cc 0x0c ; Set mask opposite of expected - btstl 0x0a,@sp - test_cc 0 0 0 0 - test_h_mem 0xffffffff,sp - - mvi_h_mem 0x5effffff,sp - set_cc 0x0e ; Set mask opposite of expected - btstl 0x07,@sp - test_cc 0 0 1 0 - test_h_mem 0x5effffff,sp - - pass diff --git a/sim/testsuite/sim/fr30/bv.cgs b/sim/testsuite/sim/fr30/bv.cgs deleted file mode 100644 index 68cb9acf..0000000 --- a/sim/testsuite/sim/fr30/bv.cgs +++ /dev/null @@ -1,109 +0,0 @@ -# fr30 testcase for bv $label9 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global bv -bv: - ; Test bv $label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch bv - - set_cc 0x0e ; condition codes are irrelevent - take_branch bv - - set_cc 0x0d ; condition codes are irrelevent - no_branch bv - - set_cc 0x0c ; condition codes are irrelevent - no_branch bv - - set_cc 0x0b ; condition codes are irrelevent - take_branch bv - - set_cc 0x0a ; condition codes are irrelevent - take_branch bv - - set_cc 0x09 ; condition codes are irrelevent - no_branch bv - - set_cc 0x08 ; condition codes are irrelevent - no_branch bv - - set_cc 0x07 ; condition codes are irrelevent - take_branch bv - - set_cc 0x06 ; condition codes are irrelevent - take_branch bv - - set_cc 0x05 ; condition codes are irrelevent - no_branch bv - - set_cc 0x04 ; condition codes are irrelevent - no_branch bv - - set_cc 0x03 ; condition codes are irrelevent - take_branch bv - - set_cc 0x02 ; condition codes are irrelevent - take_branch bv - - set_cc 0x01 ; condition codes are irrelevent - no_branch bv - - set_cc 0x00 ; condition codes are irrelevent - no_branch bv - - ; Test bv:d label9 - set_cc 0x0f ; condition codes are irrelevent - take_branch_d bv:d 0xf - - set_cc 0x0e ; condition codes are irrelevent - take_branch_d bv:d 0xe - - set_cc 0x0d ; condition codes are irrelevent - no_branch_d bv:d 0xd - - set_cc 0x0c ; condition codes are irrelevent - no_branch_d bv:d 0xc - - set_cc 0x0b ; condition codes are irrelevent - take_branch_d bv:d 0xb - - set_cc 0x0a ; condition codes are irrelevent - take_branch_d bv:d 0xa - - set_cc 0x09 ; condition codes are irrelevent - no_branch_d bv:d 0x9 - - set_cc 0x08 ; condition codes are irrelevent - no_branch_d bv:d 0x8 - - set_cc 0x07 ; condition codes are irrelevent - take_branch_d bv:d 0x7 - - set_cc 0x06 ; condition codes are irrelevent - take_branch_d bv:d 0x6 - - set_cc 0x05 ; condition codes are irrelevent - no_branch_d bv:d 0x5 - - set_cc 0x04 ; condition codes are irrelevent - no_branch_d bv:d 0x4 - - set_cc 0x03 ; condition codes are irrelevent - take_branch_d bv:d 0x3 - - set_cc 0x02 ; condition codes are irrelevent - take_branch_d bv:d 0x2 - - set_cc 0x01 ; condition codes are irrelevent - no_branch_d bv:d 0x1 - - set_cc 0x00 ; condition codes are irrelevent - no_branch_d bv:d 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/call.cgs b/sim/testsuite/sim/fr30/call.cgs deleted file mode 100644 index da0d450..0000000 --- a/sim/testsuite/sim/fr30/call.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for call @$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global call - - ; Test call $Ri - mvi_h_gr #func1,r0 - set_cc 0x0f ; condition codes shouldn't change -call1: - call @r0 - fail -func1: - test_cc 1 1 1 1 - mvi_h_gr #call1,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - - mvi_h_gr #func2,r0 - set_cc 0x0f ; condition codes shouldn't change -call2: - call:d @r0 - ldi:8 1,r0 ; Must assume this works - fail -func2: - test_cc 1 1 1 1 - mvi_h_gr #call2,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - - pass diff --git a/sim/testsuite/sim/fr30/cmp.cgs b/sim/testsuite/sim/fr30/cmp.cgs deleted file mode 100644 index 7bfbbf8..0000000 --- a/sim/testsuite/sim/fr30/cmp.cgs +++ /dev/null @@ -1,53 +0,0 @@ -# fr30 testcase for cmp $Rj,$Ri, cmp $u4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global cmp -cmp: - ; Test cmp $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - cmp r7,r8 - test_cc 0 0 0 0 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - cmp r7,r8 - test_cc 0 0 1 0 - - set_cc 0x0b ; Set mask opposite of expected - cmp r8,r8 - test_cc 0 1 0 0 - - mvi_h_gr 0,r8 - set_cc 0x06 ; Set mask opposite of expected - cmp r7,r8 - test_cc 1 0 0 1 - - ; Test cmp $u4,$Ri - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - cmp 1,r8 - test_cc 0 0 0 0 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - cmp 1,r8 - test_cc 0 0 1 0 - - mvi_h_gr 0,r8 - set_cc 0x0b ; Set mask opposite of expected - cmp 0,r8 - test_cc 0 1 0 0 - - set_cc 0x06 ; Set mask opposite of expected - cmp 15,r8 - test_cc 1 0 0 1 - - pass diff --git a/sim/testsuite/sim/fr30/cmp2.cgs b/sim/testsuite/sim/fr30/cmp2.cgs deleted file mode 100644 index 7ba6201..0000000 --- a/sim/testsuite/sim/fr30/cmp2.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# fr30 testcase for cmp2 $u4,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global cmp2 -cmp2: - ; Test cmp2 $u4,$Ri - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - cmp2 -1,r8 - test_cc 0 0 0 1 - - mvi_h_gr 0x7ffffffe,r8 - set_cc 0x04 ; Set mask opposite of expected - cmp2 -2,r8 - test_cc 1 0 1 1 - - mvi_h_gr -16,r8 - set_cc 0x0b ; Set mask opposite of expected - cmp2 -16,r8 - test_cc 0 1 0 0 - - pass diff --git a/sim/testsuite/sim/fr30/copld.cgs b/sim/testsuite/sim/fr30/copld.cgs deleted file mode 100644 index e0ababb..0000000 --- a/sim/testsuite/sim/fr30/copld.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copld $u4,$cc,$Rj,CRi -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copld -copld: - ; Test copld copld $u4,$cc,$Rj,CRi - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copld 0,0,r0,cr15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copld 15,255,r15,cr0 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/copop.cgs b/sim/testsuite/sim/fr30/copop.cgs deleted file mode 100644 index b0afd77..0000000 --- a/sim/testsuite/sim/fr30/copop.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copop $u4,$cc,$CRj,CRi -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copop -copop: - ; Test copop copop $u4,$cc,$CRj,CRi - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copop 0,0,cr0,cr15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copop 15,255,cr0,cr15 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/copst.cgs b/sim/testsuite/sim/fr30/copst.cgs deleted file mode 100644 index 00120b2..0000000 --- a/sim/testsuite/sim/fr30/copst.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copst $u4,$cc,$CRj,Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copst -copst: - ; Test copst copst $u4,$cc,$CRj,Ri - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copst 0,0,cr0,r15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copst 15,255,cr15,r0 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/copsv.cgs b/sim/testsuite/sim/fr30/copsv.cgs deleted file mode 100644 index e00a4f5..0000000 --- a/sim/testsuite/sim/fr30/copsv.cgs +++ /dev/null @@ -1,21 +0,0 @@ -# fr30 testcase for copsv $u4,$cc,$CRj,Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global copsv -copsv: - ; Test copsv copsv $u4,$cc,$CRj,Ri - ; The current implementation is a noop - set_cc 0x0f ; Condition codes are irrelevent - copsv 0,0,cr0,r15 - test_cc 1 1 1 1 - - set_cc 0x0e ; Condition codes are irrelevent - copsv 15,255,cr15,r0 - test_cc 1 1 1 0 - - pass diff --git a/sim/testsuite/sim/fr30/div.ms b/sim/testsuite/sim/fr30/div.ms deleted file mode 100644 index d5d7173..0000000 --- a/sim/testsuite/sim/fr30/div.ms +++ /dev/null @@ -1,131 +0,0 @@ -# fr30 testcase for division -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div -div: - ; example 1 from div0s the manual - mvi_h_gr 0x01234567,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - div0s r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div2 r2 - div3 - div4s - test_h_gr 0x01234567,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xffffffff,mdl - test_dbits 0x3 - - ; example 2 from div0s the manual - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - mvi_h_gr 0x1234567,r2 - mvi_h_gr 1,r0 - mvi_h_gr 32,r1 - div0s r2 -loop1: sub r0,r1 - bne:d loop1 - div1 r2 - div2 r2 - div3 - div4s - test_h_gr 0x01234567,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xffffffff,mdl - test_dbits 0x3 - - ; example 1 from div0u in the manual - mvi_h_gr 0x01234567,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - div0u r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - div1 r2 - test_h_gr 0x01234567,r2 - test_h_dr 0x00000078,mdh - test_h_dr 0x000000e0,mdl - test_dbits 0x0 - - ; example 2 from div0u in the manual - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0xfedcba98,mdl - mvi_h_gr 0x1234567,r2 - mvi_h_gr 1,r0 - mvi_h_gr 32,r1 - div0u r2 -loop2: sub r0,r1 - bne:d loop2 - div1 r2 - test_h_gr 0x01234567,r2 - test_h_dr 0x00000078,mdh - test_h_dr 0x000000e0,mdl - test_dbits 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/div0s.cgs b/sim/testsuite/sim/fr30/div0s.cgs deleted file mode 100644 index 84d76c4..0000000 --- a/sim/testsuite/sim/fr30/div0s.cgs +++ /dev/null @@ -1,64 +0,0 @@ -# fr30 testcase for div0s $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div0s -div0s: - ; Test div0s $Rj,$Ri - ; example from the manual - negative dividend - mvi_h_gr 0x0fffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0xfffffff0,mdl - set_dbits 0x0 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0x0fffffff,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xfffffff0,mdl - test_dbits 0x3 - - ; negative divisor - mvi_h_gr 0xffffffff,r2 - mvi_h_dr 0xffffffff,mdh - mvi_h_dr 0x7fffffff,mdl - set_dbits 0x1 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0xffffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x7fffffff,mdl - test_dbits 0x2 - - ; Both sign bits 0 - mvi_h_gr 0x0fffffff,r2 - mvi_h_dr 0xffffffff,mdh - mvi_h_dr 0x7ffffff0,mdl - set_dbits 0x3 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0x0fffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x7ffffff0,mdl - test_dbits 0x0 - - ; Both sign bits 1 - mvi_h_gr 0xffffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0xffffffff,mdl - set_dbits 0x2 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0s r2 - test_cc 1 1 1 1 - test_h_gr 0xffffffff,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0xffffffff,mdl - test_dbits 0x1 - - pass diff --git a/sim/testsuite/sim/fr30/div0u.cgs b/sim/testsuite/sim/fr30/div0u.cgs deleted file mode 100644 index 8fd84a6..0000000 --- a/sim/testsuite/sim/fr30/div0u.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# fr30 testcase for div0u $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div0u -div0u: - ; Test div0u $Rj,$Ri - ; operand register has no effect - mvi_h_gr 0xdeadbeef,r2 - mvi_h_dr 0xdeadbeef,mdh - mvi_h_dr 0x0ffffff0,mdl - set_dbits 0x3 ; Set opposite of expected - set_cc 0x0f ; Condition codes should not change - div0u r2 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0ffffff0,mdl - test_dbits 0x0 - - pass diff --git a/sim/testsuite/sim/fr30/div1.cgs b/sim/testsuite/sim/fr30/div1.cgs deleted file mode 100644 index dac35fe..0000000 --- a/sim/testsuite/sim/fr30/div1.cgs +++ /dev/null @@ -1,113 +0,0 @@ -# fr30 testcase for div1 $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div1 -div1: - ; Test div1 $Ri - ; example from the manual -- all status bits 0 - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00ffffff,mdh - mvi_h_dr 0x00000000,mdl - set_dbits 0x0 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00ffffff,mdh ; misprinted in manual? - test_h_dr 0x00000001,mdl - - ; D0 == 1 - set_dbits 0x1 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x1 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x01fffffe,mdh - test_h_dr 0x00000002,mdl - - ; D1 == 1 - set_dbits 0x2 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x2 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x03fffffc,mdh - test_h_dr 0x00000004,mdl - - ; D0 == 1, D1 == 1 - set_dbits 0x3 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 0 - test_dbits 0x3 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x08fffff7,mdh - test_h_dr 0x00000009,mdl - - ; C == 1 - mvi_h_gr 0x11ffffef,r2 - set_dbits 0x0 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x0 - test_h_gr 0x11ffffef,r2 - test_h_dr 0x11ffffee,mdh - test_h_dr 0x00000012,mdl - - ; D0 == 1, C == 1 - mvi_h_gr 0x23ffffdd,r2 - set_dbits 0x1 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x1 - test_h_gr 0x23ffffdd,r2 - test_h_dr 0xffffffff,mdh - test_h_dr 0x00000025,mdl - - ; D1 == 1, C == 1 - mvi_h_gr 0x00000003,r2 - set_dbits 0x2 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x2 - test_h_gr 0x00000003,r2 - test_h_dr 0x00000001,mdh - test_h_dr 0x0000004b,mdl - - ; D0 == 1, D1 == 1, C == 1 - mvi_h_gr 0xfffffffe,r2 - set_dbits 0x3 - set_cc 0x00 - div1 r2 - test_cc 0 0 0 1 - test_dbits 0x3 - test_h_gr 0xfffffffe,r2 - test_h_dr 0x00000002,mdh - test_h_dr 0x00000096,mdl - - ; remainder is zero - mvi_h_gr 0x00000004,r2 - set_dbits 0x0 - set_cc 0x00 - div1 r2 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00000004,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000012d,mdl - - pass - - - diff --git a/sim/testsuite/sim/fr30/div2.cgs b/sim/testsuite/sim/fr30/div2.cgs deleted file mode 100644 index 03000a2..0000000 --- a/sim/testsuite/sim/fr30/div2.cgs +++ /dev/null @@ -1,120 +0,0 @@ -# fr30 testcase for div2 $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div2 -div2: - ; Test div2 $Ri - ; example from the manual -- all status bits 0 - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00ffffff,mdh - mvi_h_dr 0x0000000f,mdl - set_dbits 0x0 - set_cc 0x00 - div2 r2 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1 - mvi_h_dr 0x00ffffff,mdh - set_dbits 0x1 - set_cc 0x00 - div2 r2 - test_cc 0 1 0 0 - test_dbits 0x1 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000000f,mdl - - ; D1 == 1 - mvi_h_dr 0x00ffffff,mdh - set_dbits 0x2 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 0 - test_dbits 0x2 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00ffffff,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1, D1 == 1 - set_dbits 0x3 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 0 - test_dbits 0x3 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00ffffff,mdh - test_h_dr 0x0000000f,mdl - - ; C == 1 - mvi_h_dr 0x11ffffee,mdh - mvi_h_gr 0x11ffffef,r2 - set_dbits 0x0 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x0 - test_h_gr 0x11ffffef,r2 - test_h_dr 0x11ffffee,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1, C == 1 - mvi_h_dr 0x23ffffdc,mdh - mvi_h_gr 0x23ffffdd,r2 - set_dbits 0x1 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x1 - test_h_gr 0x23ffffdd,r2 - test_h_dr 0x23ffffdc,mdh - test_h_dr 0x0000000f,mdl - - ; D1 == 1, C == 1 - mvi_h_dr 0xfffffffd,mdh - mvi_h_gr 0x00000004,r2 - set_dbits 0x2 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x2 - test_h_gr 0x00000004,r2 - test_h_dr 0xfffffffd,mdh - test_h_dr 0x0000000f,mdl - - ; D0 == 1, D1 == 1, C == 1 - mvi_h_dr 0x00000002,mdh - mvi_h_gr 0xffffffff,r2 - set_dbits 0x3 - set_cc 0x00 - div2 r2 - test_cc 0 0 0 1 - test_dbits 0x3 - test_h_gr 0xffffffff,r2 - test_h_dr 0x00000002,mdh - test_h_dr 0x0000000f,mdl - - ; remainder is zero - mvi_h_dr 0x00000004,mdh - mvi_h_gr 0x00000004,r2 - set_dbits 0x0 - set_cc 0x00 - div2 r2 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00000004,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x0000000f,mdl - - pass - - - diff --git a/sim/testsuite/sim/fr30/div3.cgs b/sim/testsuite/sim/fr30/div3.cgs deleted file mode 100644 index ee7da1a..0000000 --- a/sim/testsuite/sim/fr30/div3.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# fr30 testcase for div3 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div3 -div3: - ; Test div3 - ; example from the manual - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0x0000000f,mdl - set_dbits 0x0 - set_cc 0x04 - div3 - test_cc 0 1 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x00000010,mdl - - set_dbits 0x0 - set_cc 0x00 - div3 - test_cc 0 0 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0x00000010,mdl - - pass diff --git a/sim/testsuite/sim/fr30/div4s.cgs b/sim/testsuite/sim/fr30/div4s.cgs deleted file mode 100644 index 3b98eca..0000000 --- a/sim/testsuite/sim/fr30/div4s.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# fr30 testcase for div4s -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global div4s -div4s: - ; Test div4s - ; example from the manual - mvi_h_gr 0x00ffffff,r2 - mvi_h_dr 0x00000000,mdh - mvi_h_dr 0x0000000f,mdl - set_dbits 0x3 - set_cc 0x0f - div4s - test_cc 1 1 1 1 - test_dbits 0x3 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0xfffffff1,mdl - - set_dbits 0x0 - set_cc 0x00 - div4s - test_cc 0 0 0 0 - test_dbits 0x0 - test_h_gr 0x00ffffff,r2 - test_h_dr 0x00000000,mdh - test_h_dr 0xfffffff1,mdl - - pass diff --git a/sim/testsuite/sim/fr30/dmov.cgs b/sim/testsuite/sim/fr30/dmov.cgs deleted file mode 100644 index bd2e5cc..0000000 --- a/sim/testsuite/sim/fr30/dmov.cgs +++ /dev/null @@ -1,73 +0,0 @@ -# fr30 testcase for dmov -# mach(): fr30 - - .include "testutils.inc" - START - - .text - .global dmov -dmov: - ; Test dmov @$dir10,$R13 - mvi_h_gr 0xdeadbeef,r1 - mvi_h_gr 0x200,r2 - mvr_h_mem r1,r2 - set_cc 0x0f ; Condition codes shouldn't change - dmov @0x200,r13 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r13 - - ; Test dmov $R13,@$dir10 - mvi_h_gr 0xbeefdead,r13 - set_cc 0x0e ; Condition codes shouldn't change - dmov r13,@0x200 - test_cc 1 1 1 0 - test_h_mem 0xbeefdead,r2 - - ; Test dmov @$dir10,@R13+ - mvi_h_gr 0x1fc,r13 - set_cc 0x0d ; Condition codes shouldn't change - dmov @0x200,@r13+ - test_cc 1 1 0 1 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefdead,r2 - inci_h_gr 4,r2 - test_h_mem 0xbeefdead,r2 - test_h_gr 0x200,r13 - - ; Test dmov @$R13+,@$dir10 - mvi_h_gr 0x1fc,r13 - mvi_h_mem 0xdeadbeef,r13 - set_cc 0x0c ; Condition codes shouldn't change - dmov @r13+,@0x200 - test_cc 1 1 0 0 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xdeadbeef,r2 - inci_h_gr 4,r2 - test_h_mem 0xdeadbeef,r2 - test_h_gr 0x200,r13 - - ; Test dmov @$dir10,@-R15 - mvi_h_gr 0x200,r15 - mvi_h_mem 0xdeadbeef,r15 - set_cc 0x0b ; Condition codes shouldn't change - dmov @0x200,@-r15 - test_cc 1 0 1 1 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xdeadbeef,r2 - inci_h_gr 4,r2 - test_h_mem 0xdeadbeef,r2 - test_h_gr 0x1fc,r15 - - ; Test dmov @$R15+,@$dir10 - mvi_h_gr 0x1fc,r15 - mvi_h_mem 0xbeefdead,r15 - set_cc 0x0a ; Condition codes shouldn't change - dmov @r15+,@0x200 - test_cc 1 0 1 0 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefdead,r2 - inci_h_gr 4,r2 - test_h_mem 0xbeefdead,r2 - test_h_gr 0x200,r15 - - pass diff --git a/sim/testsuite/sim/fr30/dmovb.cgs b/sim/testsuite/sim/fr30/dmovb.cgs deleted file mode 100644 index 96cfb9d..0000000 --- a/sim/testsuite/sim/fr30/dmovb.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# fr30 testcase for dmovb -# mach(): fr30 - - .include "testutils.inc" - START - - .text - .global dmovb -dmovb: - ; Test dmovb @$dir8,$R13 - mvi_h_gr 0xdeadbeef,r1 - mvi_h_gr 0x80,r2 - mvr_h_mem r1,r2 - set_cc 0x0f ; Condition codes shouldn't change - dmovb @0x80,r13 - test_cc 1 1 1 1 - test_h_gr 0xffffffde,r13 - - ; Test dmovb $R13,@$dir8 - mvi_h_gr 0xbeefdead,r13 - set_cc 0x0e ; Condition codes shouldn't change - dmovb r13,@0x80 - test_cc 1 1 1 0 - test_h_mem 0xadadbeef,r2 - - ; Test dmovb @$dir8,@R13+ - mvi_h_gr 0x7c,r13 - mvi_h_mem 0xdeadbeef,r13 - set_cc 0x0d ; Condition codes shouldn't change - dmovb @0x7f,@r13+ - test_cc 1 1 0 1 - mvi_h_gr 0x7c,r2 - test_h_mem 0xefadbeef,r2 - test_h_gr 0x7d,r13 - - ; Test dmovb @$R13+,@$dir8 - mvi_h_gr 0x7c,r13 - mvi_h_mem 0xbeefdead,r13 - set_cc 0x0c ; Condition codes shouldn't change - dmovb @r13+,@0x7f - test_cc 1 1 0 0 - mvi_h_gr 0x7c,r2 - test_h_mem 0xbeefdebe,r2 - test_h_gr 0x7d,r13 - - pass diff --git a/sim/testsuite/sim/fr30/dmovh.cgs b/sim/testsuite/sim/fr30/dmovh.cgs deleted file mode 100644 index 86afb44..0000000 --- a/sim/testsuite/sim/fr30/dmovh.cgs +++ /dev/null @@ -1,46 +0,0 @@ -# fr30 testcase for dmovh -# mach(): fr30 - - .include "testutils.inc" - START - - .text - .global dmovh -dmovh: - ; Test dmovh @$dir9,$R13 - mvi_h_gr 0xdeadbeef,r1 - mvi_h_gr 0x100,r2 - mvr_h_mem r1,r2 - set_cc 0x0f ; Condition codes shouldn't change - dmovh @0x100,r13 - test_cc 1 1 1 1 - test_h_gr 0xffffdead,r13 - - ; Test dmovh $R13,@$dir9 - mvi_h_gr 0xdeadbeef,r13 - set_cc 0x0e ; Condition codes shouldn't change - dmovh r13,@0x100 - test_cc 1 1 1 0 - test_h_mem 0xbeefbeef,r2 - - ; Test dmovh @$dir9,@R13+ - mvi_h_gr 0x1fc,r13 - mvi_h_mem 0xdeadbeef,r13 - set_cc 0x0d ; Condition codes shouldn't change - dmovh @0x1fe,@r13+ - test_cc 1 1 0 1 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefbeef,r2 - test_h_gr 0x1fe,r13 - - ; Test dmovh @$R13+,@$dir9 - mvi_h_gr 0x1fc,r13 - mvi_h_mem 0xbeefdead,r13 - set_cc 0x0c ; Condition codes shouldn't change - dmovh @r13+,@0x1fe - test_cc 1 1 0 0 - mvi_h_gr 0x1fc,r2 - test_h_mem 0xbeefbeef,r2 - test_h_gr 0x1fe,r13 - - pass diff --git a/sim/testsuite/sim/fr30/enter.cgs b/sim/testsuite/sim/fr30/enter.cgs deleted file mode 100644 index ae75e16..0000000 --- a/sim/testsuite/sim/fr30/enter.cgs +++ /dev/null @@ -1,34 +0,0 @@ -# fr30 testcase for enter $u10 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global enter -enter: - ; Test enter $u10 - mvr_h_gr sp,r7 ; save stack pointer - mvr_h_gr sp,r8 ; shadow stack pointer - mvr_h_gr sp,r14 ; Initialize - set_cc 0x0f ; Condition codes are irrelevent - enter 0 - test_cc 1 1 1 1 - testr_h_gr r8,sp - inci_h_gr -4,r8 - testr_h_gr r14,r8 - testr_h_mem r7,r14 - - mvr_h_gr sp,r8 ; shadow stack pointer - mvr_h_gr r14,r9 ; save - set_cc 0x0e ; Condition codes are irrelevent - enter 0x3fc - test_cc 1 1 1 0 - inci_h_gr -4,r8 - testr_h_gr r14,r8 - testr_h_mem r9,r14 - inci_h_gr -0x3f8,r8 - testr_h_gr r8,sp - - pass diff --git a/sim/testsuite/sim/fr30/eor.cgs b/sim/testsuite/sim/fr30/eor.cgs deleted file mode 100644 index a870761..0000000 --- a/sim/testsuite/sim/fr30/eor.cgs +++ /dev/null @@ -1,69 +0,0 @@ -# fr30 testcase for eor $Rj,$Ri, eor $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global eor -eor: - ; Test eor $Rj,$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0x55555555,r8 - set_cc 0x07 ; Set mask opposite of expected - eor r7,r8 - test_cc 1 0 1 1 - test_h_gr 0xffffffff,r8 - - mvi_h_gr 0x00000000,r7 - mvi_h_gr 0x00000000,r8 - set_cc 0x08 ; Set mask opposite of expected - eor r7,r8 - test_cc 0 1 0 0 - test_h_gr 0x00000000,r8 - - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0xaaaaaaaa,r8 - set_cc 0x0b ; Set mask opposite of expected - eor r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - mvi_h_gr 0xdead0000,r7 - mvi_h_gr 0x0000beef,r8 - set_cc 0x05 ; Set mask opposite of expected - eor r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xdeadbeef,r8 - - ; Test eor $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - eor r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffffffff,sp - - mvi_h_gr 0x00000000,r7 - mvi_h_mem 0x00000000,sp - set_cc 0x08 ; Set mask opposite of expected - eor r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00000000,sp - - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0xaaaaaaaa,sp - set_cc 0x0b ; Set mask opposite of expected - eor r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00000000,sp - - mvi_h_gr 0xdead0000,r7 - mvi_h_mem 0x0000beef,sp - set_cc 0x05 ; Set mask opposite of expected - eor r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/eorb.cgs b/sim/testsuite/sim/fr30/eorb.cgs deleted file mode 100644 index 540f3f7..0000000 --- a/sim/testsuite/sim/fr30/eorb.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# fr30 testcase for eorb $Rj,$Ri, eorb $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global eorb -eorb: - ; Test eorb $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - eorb r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xff555555,sp - - mvi_h_gr 0xaaaaaa00,r7 - mvi_h_mem 0x00555555,sp - set_cc 0x08 ; Set mask opposite of expected - eorb r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00555555,sp - - mvi_h_gr 0xaaaaaa55,r7 - mvi_h_mem 0x55aaaaaa,sp - set_cc 0x0b ; Set mask opposite of expected - eorb r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x00aaaaaa,sp - - mvi_h_gr 0x000000d0,r7 - mvi_h_mem 0x0eadbeef,sp - set_cc 0x05 ; Set mask opposite of expected - eorb r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/eorh.cgs b/sim/testsuite/sim/fr30/eorh.cgs deleted file mode 100644 index 7cf8473..0000000 --- a/sim/testsuite/sim/fr30/eorh.cgs +++ /dev/null @@ -1,40 +0,0 @@ -# fr30 testcase for eorh $Rj,$Ri, eorh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global eorh -eorh: - ; Test eorh $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - eorh r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffff5555,sp - - mvi_h_gr 0xaaaa0000,r7 - mvi_h_mem 0x00005555,sp - set_cc 0x08 ; Set mask opposite of expected - eorh r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00005555,sp - - mvi_h_gr 0xaaaa5555,r7 - mvi_h_mem 0x5555aaaa,sp - set_cc 0x0b ; Set mask opposite of expected - eorh r7,@sp - test_cc 0 1 1 1 - test_h_mem 0x0000aaaa,sp - - mvi_h_gr 0x0000de00,r7 - mvi_h_mem 0x00adbeef,sp - set_cc 0x05 ; Set mask opposite of expected - eorh r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/extsb.cgs b/sim/testsuite/sim/fr30/extsb.cgs deleted file mode 100644 index 6a18d7e..0000000 --- a/sim/testsuite/sim/fr30/extsb.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for extsb $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extsb -extsb: - ; Test extsb $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 0 1 - test_h_gr 0xffffff80,r7 - - mvi_h_gr 0xffffff7f,r7 - set_cc 0x0c ; Condition codes are irrelevent - extsb r7 - test_cc 1 1 0 0 - test_h_gr 0x7f,r7 - - pass diff --git a/sim/testsuite/sim/fr30/extsh.cgs b/sim/testsuite/sim/fr30/extsh.cgs deleted file mode 100644 index eb12fd0..0000000 --- a/sim/testsuite/sim/fr30/extsh.cgs +++ /dev/null @@ -1,48 +0,0 @@ -# fr30 testcase for extsh $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extsh -extsh: - ; Test extsh $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_gr 0x7fff,r7 - set_cc 0x0c ; Condition codes are irrelevent - extsh r7 - test_cc 1 1 0 0 - test_h_gr 0x7fff,r7 - - mvi_h_gr 0x8000,r7 - set_cc 0x0b ; Condition codes are irrelevent - extsh r7 - test_cc 1 0 1 1 - test_h_gr 0xffff8000,r7 - - mvi_h_gr 0xffff7fff,r7 - set_cc 0x0a ; Condition codes are irrelevent - extsh r7 - test_cc 1 0 1 0 - test_h_gr 0x7fff,r7 - - pass diff --git a/sim/testsuite/sim/fr30/extub.cgs b/sim/testsuite/sim/fr30/extub.cgs deleted file mode 100644 index ddcc683..0000000 --- a/sim/testsuite/sim/fr30/extub.cgs +++ /dev/null @@ -1,42 +0,0 @@ -# fr30 testcase for extub $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extub -extub: - ; Test extub $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extub r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extub r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extub r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_gr 0xffffff7f,r7 - set_cc 0x0c ; Condition codes are irrelevent - extub r7 - test_cc 1 1 0 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0xffffff80,r7 - set_cc 0x0b ; Condition codes are irrelevent - extub r7 - test_cc 1 0 1 1 - test_h_gr 0x80,r7 - - pass diff --git a/sim/testsuite/sim/fr30/extuh.cgs b/sim/testsuite/sim/fr30/extuh.cgs deleted file mode 100644 index fa2579e..0000000 --- a/sim/testsuite/sim/fr30/extuh.cgs +++ /dev/null @@ -1,54 +0,0 @@ -# fr30 testcase for extuh $Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global extuh -extuh: - ; Test extuh $Ri - mvi_h_gr 0,r7 - set_cc 0x0f ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_gr 0x7f,r7 - set_cc 0x0e ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 1 0 - test_h_gr 0x7f,r7 - - mvi_h_gr 0x80,r7 - set_cc 0x0d ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_gr 0x7fff,r7 - set_cc 0x0e ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 1 0 - test_h_gr 0x7fff,r7 - - mvi_h_gr 0x8000,r7 - set_cc 0x0d ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 0 1 - test_h_gr 0x8000,r7 - - mvi_h_gr 0xffff7fff,r7 - set_cc 0x0c ; Condition codes are irrelevent - extuh r7 - test_cc 1 1 0 0 - test_h_gr 0x7fff,r7 - - mvi_h_gr 0xffff8000,r7 - set_cc 0x0b ; Condition codes are irrelevent - extuh r7 - test_cc 1 0 1 1 - test_h_gr 0x8000,r7 - - pass diff --git a/sim/testsuite/sim/fr30/hello.ms b/sim/testsuite/sim/fr30/hello.ms deleted file mode 100644 index cf7499b..0000000 --- a/sim/testsuite/sim/fr30/hello.ms +++ /dev/null @@ -1,19 +0,0 @@ -# output: Hello world! -# mach(): fr30 - - .global _start -_start: - -; write (hello world) - ldi32 #14,r6 - ldi32 #hello,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 -; exit (0) - ldi32 #0,r4 - ldi32 #1,r0 - int #10 - -length: .long 14 -hello: .ascii "Hello world!\r\n" diff --git a/sim/testsuite/sim/fr30/int.cgs b/sim/testsuite/sim/fr30/int.cgs deleted file mode 100644 index a48bca9..0000000 --- a/sim/testsuite/sim/fr30/int.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# fr30 testcase for add $u8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global add -add: - ; Test add $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - add r7,r8 - test_cc 0 0 0 0 - test_h_gr 3,r8 - - - pass diff --git a/sim/testsuite/sim/fr30/inte.cgs b/sim/testsuite/sim/fr30/inte.cgs deleted file mode 100644 index a15bfd9..0000000 --- a/sim/testsuite/sim/fr30/inte.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for inte -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global inte -inte: - ; Test inte which is essentially int #9 - mvr_h_gr tbr,r7 - inci_h_gr 0x3d8,r7 - mvi_h_mem pass,r7 - mvi_h_gr doint,r9 - inci_h_gr 2,r9 - mvr_h_gr ssp,r10 - set_cc 0x0f ; Condition codes should not change - set_s_user ; Set opposite of expected - set_i 1 ; Should not change - mvr_h_gr ps,r8 -doint: inte - fail - -pass: - test_cc 1 1 1 1 - test_ilm 4 - test_s_system - test_i 1 - inci_h_gr -4,r10 - testr_h_mem r8,r10 - inci_h_gr -4,r10 - testr_h_mem r9,r10 - testr_h_dr r10,ssp - - pass diff --git a/sim/testsuite/sim/fr30/jmp.cgs b/sim/testsuite/sim/fr30/jmp.cgs deleted file mode 100644 index db4af22..0000000 --- a/sim/testsuite/sim/fr30/jmp.cgs +++ /dev/null @@ -1,29 +0,0 @@ -# fr30 testcase for jmp @$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global jmp - - ; Test jmp $Ri - mvi_h_gr #func1,r0 - set_cc 0x0f ; condition codes shouldn't change -jmp1: - jmp @r0 - fail -func1: - test_cc 1 1 1 1 - mvi_h_gr #func2,r0 - set_cc 0x0f ; condition codes shouldn't change -jmp2: - jmp:d @r0 - ldi:8 1,r0 ; Must assume this works - fail -func2: - test_cc 1 1 1 1 - testr_h_gr 1,r0 - - pass diff --git a/sim/testsuite/sim/fr30/ld.cgs b/sim/testsuite/sim/fr30/ld.cgs deleted file mode 100644 index 9ff8a75..0000000 --- a/sim/testsuite/sim/fr30/ld.cgs +++ /dev/null @@ -1,220 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# ld $Rj,$Ri -# ld @($R13,$Rj),$Ri -# ld @($R14,$disp10),$Ri -# ld @($R15,$udisp6),$Ri -# ld @$R15+,$Ri -# ld @$R15+,$Rs - - .include "testutils.inc" - - START - - .text - .global ld -ld: - ; Test ld $Rj,$Ri - mvi_h_mem #0x00000000,sp - set_cc 0x0f ; condition codes should not change - ld @sp,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x00000001,sp - set_cc 0x07 ; condition codes should not change - ld @sp,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffffff,sp - set_cc 0x0b ; condition codes should not change - ld @sp,r7 - test_cc 1 0 1 1 - test_h_gr 0x7fffffff,r7 - - mvi_h_mem #0x80000000,sp - set_cc 0x0d ; condition codes should not change - ld @sp,r7 - test_cc 1 1 0 1 - test_h_gr 0x80000000,r7 - - mvi_h_mem #0xffffffff,sp - set_cc 0x0e ; condition codes should not change - ld @sp,r7 - test_cc 1 1 1 0 - test_h_gr -1,r7 - - ; Test ld @($R13,$Rj),$Ri - mvr_h_gr sp,r13 - inci_h_gr -8,r13 - mvi_h_gr 8,r8 - - mvi_h_mem #0x00000000,sp - set_cc 0x0f ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x00000001,sp - set_cc 0x07 ; condition codes should not change - ld @(r13,r8),r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffffff,sp - set_cc 0x0b ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 0 1 1 - test_h_gr 0x7fffffff,r7 - - mvi_h_mem #0x80000000,sp - set_cc 0x0d ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 1 0 1 - test_h_gr 0x80000000,r7 - - mvi_h_mem #0xffffffff,sp - set_cc 0x0e ; condition codes should not change - ld @(r13,r8),r7 - test_cc 1 1 1 0 - test_h_gr -1,r7 - - ; Test ld @($R14,$disp10),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0x1fc,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - ld @(r14,0x1fc),r7 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0xfc,r14 - set_cc 0x07 ; condition codes should not change - ld @(r14,0x100),r7 - test_cc 0 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x100,r14 - set_cc 0x0b ; condition codes should not change - ld @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x100,r14 - set_cc 0x0d ; condition codes should not change - ld @(r14,-0x100),r7 - test_cc 1 1 0 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x100,r14 - set_cc 0x0e ; condition codes should not change - ld @(r14,-0x200),r7 - test_cc 1 1 1 0 - test_h_gr 0xdeadbeef,r7 - - ; Test ld @($R15,$udisp6),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0x3c,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - ld @(r14,0x3c),r7 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x1c,r14 - set_cc 0x07 ; condition codes should not change - ld @(r14,0x20),r7 - test_cc 0 1 1 1 - test_h_gr 0xdeadbeef,r7 - - inci_h_gr 0x20,r14 - set_cc 0x0b ; condition codes should not change - ld @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xdeadbeef,r7 - - ; Test ld @$R15+,$Ri - mvr_h_gr sp,r8 ; save original stack pointer - mvr_h_gr r8,r9 - inci_h_gr 4,r9 ; original stack pointer + 4 - mvi_h_mem #0xdeadbeef,sp ; prime memory - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,r7 - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,r7 - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,sp - test_cc 1 1 1 1 - test_h_gr 0xdeadbeef,sp ; should not have been incremented - - ; Test ld @$R15+,$Rs - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,tbr - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,tbr - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,rp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,rp - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,mdh - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,mdh - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,mdl - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,mdl - testr_h_gr sp,r9 ; should have been incremented - - ; Failing tests moved to the bottom - set_s_user - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,ssp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,ssp - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,usp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,usp - test_h_gr 0xdeadbeef,sp ; should not have been incremented - - set_s_system - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,usp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,usp - testr_h_gr sp,r9 ; should have been incremented - - mvr_h_gr r8,sp ; restore original stack pointer - set_cc 0x0f ; condition codes should not change - ld @r15+,ssp - test_cc 1 1 1 1 - test_h_dr 0xdeadbeef,ssp - test_h_gr 0xdeadbeef,sp ; should not have been incremented - - pass diff --git a/sim/testsuite/sim/fr30/ldi20.cgs b/sim/testsuite/sim/fr30/ldi20.cgs deleted file mode 100644 index c7a4ef4..0000000 --- a/sim/testsuite/sim/fr30/ldi20.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# fr30 testcase for ldi20 $i20,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldi20 -ldi20: - ; Test ldi20 $i20,$Ri - set_cc 0x0f ; condition codes should not change - ldi20 #0x00000000,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - set_cc 0x07 ; condition codes should not change - ldi:20 1,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - set_cc 0x0b ; condition codes should not change - ldi20 0x7ffff,r7 - test_cc 1 0 1 1 - test_h_gr 0x0007ffff,r7 - - set_cc 0x0d ; condition codes should not change - ldi:20 0x80000,r7 - test_cc 1 1 0 1 - test_h_gr 0x00080000,r7 - - set_cc 0x0e ; condition codes should not change - ldi20 0xfffff,r7 - test_cc 1 1 1 0 - test_h_gr 0x000fffff,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldi32.cgs b/sim/testsuite/sim/fr30/ldi32.cgs deleted file mode 100644 index 3e56db7..0000000 --- a/sim/testsuite/sim/fr30/ldi32.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# fr30 testcase for ldi32 $i32,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldi32 -ldi32: - ; Test ldi32 $i32,$Ri - set_cc 0x0f ; condition codes should not change - ldi32 #0x00000000,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - set_cc 0x07 ; condition codes should not change - ldi:32 1,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - set_cc 0x0b ; condition codes should not change - ldi32 0x7fffffff,r7 - test_cc 1 0 1 1 - test_h_gr 0x7fffffff,r7 - - set_cc 0x0d ; condition codes should not change - ldi:32 0x80000000,r7 - test_cc 1 1 0 1 - test_h_gr 0x80000000,r7 - - set_cc 0x0e ; condition codes should not change - ldi32 0xffffffff,r7 - test_cc 1 1 1 0 - test_h_gr -1,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldi8.cgs b/sim/testsuite/sim/fr30/ldi8.cgs deleted file mode 100644 index 9b15ede..0000000 --- a/sim/testsuite/sim/fr30/ldi8.cgs +++ /dev/null @@ -1,37 +0,0 @@ -# fr30 testcase for ldi8 $i8,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldi8 -ldi8: - ; Test ldi8 $i8,$Ri - set_cc 0x0f ; condition codes should not change - ldi8 #0x00000000,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - set_cc 0x07 ; condition codes should not change - ldi:20 1,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - set_cc 0x0b ; condition codes should not change - ldi8 0x7f,r7 - test_cc 1 0 1 1 - test_h_gr 0x0000007f,r7 - - set_cc 0x0d ; condition codes should not change - ldi:20 0x80,r7 - test_cc 1 1 0 1 - test_h_gr 0x00000080,r7 - - set_cc 0x0e ; condition codes should not change - ldi8 0xff,r7 - test_cc 1 1 1 0 - test_h_gr 0x000000ff,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldm0.cgs b/sim/testsuite/sim/fr30/ldm0.cgs deleted file mode 100644 index 9deb564..0000000 --- a/sim/testsuite/sim/fr30/ldm0.cgs +++ /dev/null @@ -1,60 +0,0 @@ -# fr30 testcase for ldm0 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldm0 -ldm0: - ; Test ldm0 ($reglist_low) - mvr_h_gr sp,r9 ; save stack pointer permanently - inci_h_gr -4,sp - mvi_h_mem 3,sp - inci_h_gr -4,sp - mvi_h_mem 2,sp - inci_h_gr -4,sp - mvi_h_mem 1,sp - inci_h_gr -4,sp - mvi_h_mem 0,sp - - set_cc 0x0f ; Condition codes should not change - ldm0 (r0,r2,r4,r6) - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r0 - test_h_gr 1,r2 - test_h_gr 2,r4 - test_h_gr 3,r6 - - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm0 (r1,r3,r5,r7) - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r1 - test_h_gr 1,r3 - test_h_gr 2,r5 - test_h_gr 3,r7 - - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm0 (r1,r5,r7,r3) ; Order speficied should not matter - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r1 - test_h_gr 1,r3 - test_h_gr 2,r5 - test_h_gr 3,r7 - - set_cc 0x0f ; Condition codes should not change - ldm0 () ; Nothing should happen - test_cc 1 1 1 1 - testr_h_gr sp,r9 - test_h_gr 0,r1 - test_h_gr 1,r3 - test_h_gr 2,r5 - test_h_gr 3,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldm1.cgs b/sim/testsuite/sim/fr30/ldm1.cgs deleted file mode 100644 index 33cfcdb..0000000 --- a/sim/testsuite/sim/fr30/ldm1.cgs +++ /dev/null @@ -1,59 +0,0 @@ -# fr30 testcase for ldm1 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldm1 -ldm1: - ; Test ldm1 ($reglist_low) - mvr_h_gr sp,r1 ; save stack pointer permanently - inci_h_gr -4,sp - mvi_h_mem 3,sp - inci_h_gr -4,sp - mvi_h_mem 2,sp - inci_h_gr -4,sp - mvi_h_mem 1,sp - inci_h_gr -4,sp - mvi_h_mem 0,sp - - set_cc 0x0f ; Condition codes should not change - ldm1 (r8,r10,r12,r14) - test_cc 1 1 1 1 - testr_h_gr sp,r1 - test_h_gr 0,r8 - test_h_gr 1,r10 - test_h_gr 2,r12 - test_h_gr 3,r14 - - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm1 (r9,r11,r13,r15) - test_cc 1 1 1 1 - test_h_gr 0,r9 - test_h_gr 1,r11 - test_h_gr 2,r13 - test_h_gr 3,r15 - - mvr_h_gr r1,sp ; restore stack pointer - inci_h_gr -16,sp - set_cc 0x0f ; Condition codes should not change - ldm1 (r9,r13,r15,r11); Order speficied should not matter - test_cc 1 1 1 1 - test_h_gr 0,r9 - test_h_gr 1,r11 - test_h_gr 2,r13 - test_h_gr 3,r15 - - mvr_h_gr r1,sp ; restore stack pointer - set_cc 0x0f ; Condition codes should not change - ldm1 () ; Nothing should happen - test_cc 1 1 1 1 - testr_h_gr sp,r1 - test_h_gr 0,r9 - test_h_gr 1,r11 - test_h_gr 2,r13 - - pass diff --git a/sim/testsuite/sim/fr30/ldres.cgs b/sim/testsuite/sim/fr30/ldres.cgs deleted file mode 100644 index 0083489..0000000 --- a/sim/testsuite/sim/fr30/ldres.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# fr30 testcase for ldres $@Ri+,$u4 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global ldres -ldres: - ; Test ldres $@Ri+,$u4 - ; The current implementation simply increments Ri - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - ldres @r7+,0 - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - ldres @r7+,0xf - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - pass diff --git a/sim/testsuite/sim/fr30/ldub.cgs b/sim/testsuite/sim/fr30/ldub.cgs deleted file mode 100644 index 97e00d9..0000000 --- a/sim/testsuite/sim/fr30/ldub.cgs +++ /dev/null @@ -1,115 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# ldub $Rj,$Ri -# ldub @($R13,$Rj),$Ri -# ldub @($R14,$disp8),$Ri - - .include "testutils.inc" - - START - - .text - .global ldub -ldub: - ; Test ldub $Rj,$Ri - mvi_h_mem #0x00adbeef,sp - set_cc 0x0f ; condition codes should not change - ldub @sp,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x01adbeef,sp - set_cc 0x07 ; condition codes should not change - ldub @sp,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fadbeef,sp - set_cc 0x0b ; condition codes should not change - ldub @sp,r7 - test_cc 1 0 1 1 - test_h_gr 0x7f,r7 - - mvi_h_mem #0x80adbeef,sp - set_cc 0x0d ; condition codes should not change - ldub @sp,r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_mem #0xffadbeef,sp - set_cc 0x0e ; condition codes should not change - ldub @sp,r7 - test_cc 1 1 1 0 - test_h_gr 0xff,r7 - - ; Test ldub @($R13,$Rj),$Ri - mvr_h_gr sp,r13 - inci_h_gr -8,r13 - mvi_h_gr 8,r8 - - mvi_h_mem #0x00adbeef,sp - set_cc 0x0f ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x01adbeef,sp - set_cc 0x07 ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fadbeef,sp - set_cc 0x0b ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 0 1 1 - test_h_gr 0x7f,r7 - - mvi_h_mem #0x80adbeef,sp - set_cc 0x0d ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 1 0 1 - test_h_gr 0x80,r7 - - mvi_h_mem #0xffadbeef,sp - set_cc 0x0e ; condition codes should not change - ldub @(r13,r8),r7 - test_cc 1 1 1 0 - test_h_gr 0xff,r7 - - ; Test ldub @($R14,$disp8),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0x7f,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - lduh @(r14,0x7f),r7 - test_cc 1 1 1 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x3e,r14 - set_cc 0x07 ; condition codes should not change - lduh @(r14,0x40),r7 - test_cc 0 1 1 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x40,r14 - set_cc 0x0b ; condition codes should not change - lduh @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x40,r14 - set_cc 0x0d ; condition codes should not change - lduh @(r14,-0x40),r7 - test_cc 1 1 0 1 - test_h_gr 0xde,r7 - - inci_h_gr 0x40,r14 - set_cc 0x0e ; condition codes should not change - lduh @(r14,-0x80),r7 - test_cc 1 1 1 0 - test_h_gr 0xde,r7 - - pass diff --git a/sim/testsuite/sim/fr30/lduh.cgs b/sim/testsuite/sim/fr30/lduh.cgs deleted file mode 100644 index 7d36b75..0000000 --- a/sim/testsuite/sim/fr30/lduh.cgs +++ /dev/null @@ -1,115 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# lduh $Rj,$Ri -# lduh @($R13,$Rj),$Ri -# lduh @($R14,$disp9),$Ri - - .include "testutils.inc" - - START - - .text - .global lduh -lduh: - ; Test lduh $Rj,$Ri - mvi_h_mem #0x0000beef,sp - set_cc 0x0f ; condition codes should not change - lduh @sp,r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x0001beef,sp - set_cc 0x07 ; condition codes should not change - lduh @sp,r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffbeef,sp - set_cc 0x0b ; condition codes should not change - lduh @sp,r7 - test_cc 1 0 1 1 - test_h_gr 0x7fff,r7 - - mvi_h_mem #0x8000beef,sp - set_cc 0x0d ; condition codes should not change - lduh @sp,r7 - test_cc 1 1 0 1 - test_h_gr 0x8000,r7 - - mvi_h_mem #0xffffbeef,sp - set_cc 0x0e ; condition codes should not change - lduh @sp,r7 - test_cc 1 1 1 0 - test_h_gr 0xffff,r7 - - ; Test lduh @($R13,$Rj),$Ri - mvr_h_gr sp,r13 - inci_h_gr -8,r13 - mvi_h_gr 8,r8 - - mvi_h_mem #0x0000beef,sp - set_cc 0x0f ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 1 1 1 - test_h_gr 0,r7 - - mvi_h_mem #0x0001beef,sp - set_cc 0x07 ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 0 1 1 1 - test_h_gr 1,r7 - - mvi_h_mem #0x7fffbeef,sp - set_cc 0x0b ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 0 1 1 - test_h_gr 0x7fff,r7 - - mvi_h_mem #0x8000beef,sp - set_cc 0x0d ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 1 0 1 - test_h_gr 0x8000,r7 - - mvi_h_mem #0xffffbeef,sp - set_cc 0x0e ; condition codes should not change - lduh @(r13,r8),r7 - test_cc 1 1 1 0 - test_h_gr 0xffff,r7 - - ; Test lduh @($R14,$disp9),$Ri - mvi_h_mem #0xdeadbeef,sp - mvr_h_gr sp,r14 - mvi_h_gr -0xfe,r8 - add_h_gr r8,r14 - - set_cc 0x0f ; condition codes should not change - lduh @(r14,0xfe),r7 - test_cc 1 1 1 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x7e,r14 - set_cc 0x07 ; condition codes should not change - lduh @(r14,0x80),r7 - test_cc 0 1 1 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x80,r14 - set_cc 0x0b ; condition codes should not change - lduh @(r14,0x0),r7 - test_cc 1 0 1 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x80,r14 - set_cc 0x0d ; condition codes should not change - lduh @(r14,-0x80),r7 - test_cc 1 1 0 1 - test_h_gr 0xdead,r7 - - inci_h_gr 0x80,r14 - set_cc 0x0e ; condition codes should not change - lduh @(r14,-0x100),r7 - test_cc 1 1 1 0 - test_h_gr 0xdead,r7 - - pass diff --git a/sim/testsuite/sim/fr30/leave.cgs b/sim/testsuite/sim/fr30/leave.cgs deleted file mode 100644 index 4d3dd70..0000000 --- a/sim/testsuite/sim/fr30/leave.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# fr30 testcase for leave -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global leave -leave: - ; Test leave $u10 - mvr_h_gr sp,r7 ; save Stack pointer - mvr_h_gr sp,r14 - inci_h_gr -4,r14 - mvi_h_mem 0xdeadbeef,r14 - mvi_h_gr 0xbeefdead,r15 - set_cc 0x0f ; Condition codes are irrelevent - leave - test_cc 1 1 1 1 - testr_h_gr sp,r7 - test_h_gr 0xdeadbeef,r14 - - pass diff --git a/sim/testsuite/sim/fr30/lsl.cgs b/sim/testsuite/sim/fr30/lsl.cgs deleted file mode 100644 index ead749f..0000000 --- a/sim/testsuite/sim/fr30/lsl.cgs +++ /dev/null @@ -1,65 +0,0 @@ -# fr30 testcase for lsl $Rj,$Ri, lsl $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsl -lsl: - ; Test lsl $Rj,$Ri - mvi_h_gr 0xdeadbee0,r7 ; Shift by 0 - mvi_h_gr 2,r8 - set_cc 0x0d ; Set mask opposite of expected - lsl r7,r8 - test_cc 0 0 0 0 - test_h_gr 2,r8 - - mvi_h_gr 0xdeadbee1,r7 ; Shift by 1 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - lsl r7,r8 - test_cc 0 0 1 0 - test_h_gr 4,r8 - - mvi_h_gr 0xdeadbeff,r7 ; Shift by 31 - mvi_h_gr 1,r8 - set_cc 0x07 ; Set mask opposite of expected - lsl r7,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0xdeadbeff,r7 ; clear register - mvi_h_gr 2,r8 - set_cc 0x0a ; Set mask opposite of expected - lsl r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - ; Test lsl $u4Ri - mvi_h_gr 2,r8 - set_cc 0x0d ; Set mask opposite of expected - lsl 0,r8 - test_cc 0 0 0 0 - test_h_gr 2,r8 - - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - lsl 1,r8 - test_cc 0 0 1 0 - test_h_gr 4,r8 - - mvi_h_gr 1,r8 - set_cc 0x0e ; Set mask opposite of expected - lsl 15,r8 - test_cc 0 0 1 0 - test_h_gr 0x00008000,r8 - - mvi_h_gr 0x00020000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsl 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/lsl2.cgs b/sim/testsuite/sim/fr30/lsl2.cgs deleted file mode 100644 index 58acf84..0000000 --- a/sim/testsuite/sim/fr30/lsl2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for lsl2 $Rj,$Ri, lsl2 $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsl2 -lsl2: - ; Test lsl2 $u4Ri - mvi_h_gr 2,r8 - set_cc 0x0d ; Set mask opposite of expected - lsl2 0,r8 - test_cc 0 0 0 0 - test_h_gr 0x20000,r8 - - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - lsl2 1,r8 - test_cc 0 0 1 0 - test_h_gr 0x40000,r8 - - mvi_h_gr 1,r8 - set_cc 0x07 ; Set mask opposite of expected - lsl2 15,r8 - test_cc 1 0 1 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 2,r8 - set_cc 0x0a ; Set mask opposite of expected - lsl2 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/lsr.cgs b/sim/testsuite/sim/fr30/lsr.cgs deleted file mode 100644 index 5b9587f..0000000 --- a/sim/testsuite/sim/fr30/lsr.cgs +++ /dev/null @@ -1,65 +0,0 @@ -# fr30 testcase for lsr $Rj,$Ri, lsr $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsr -lsr: - ; Test lsr $Rj,$Ri - mvi_h_gr 0xdeadbee0,r7 ; Shift by 0 - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - lsr r7,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0xdeadbee1,r7 ; Shift by 1 - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x40000000,r8 - - mvi_h_gr 0xdeadbeff,r7 ; Shift by 31 - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr r7,r8 - test_cc 0 0 1 0 - test_h_gr 1,r8 - - mvi_h_gr 0xdeadbeff,r7 ; clear register - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsr r7,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - ; Test lsr $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - lsr 0,r8 - test_cc 1 0 0 0 - test_h_gr 0x80000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr 1,r8 - test_cc 0 0 1 0 - test_h_gr 0x40000000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0e ; Set mask opposite of expected - lsr 15,r8 - test_cc 0 0 1 0 - test_h_gr 0x00010000,r8 - - mvi_h_gr 0x00004000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsr 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/lsr2.cgs b/sim/testsuite/sim/fr30/lsr2.cgs deleted file mode 100644 index fd6ceaa..0000000 --- a/sim/testsuite/sim/fr30/lsr2.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for lsr2 $u4,$Rj -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global lsr2 -lsr2: - ; Test lsr2 $u4Ri - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - lsr2 0,r8 - test_cc 0 0 0 0 - test_h_gr 0x00008000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0f ; Set mask opposite of expected - lsr2 1,r8 - test_cc 0 0 1 0 - test_h_gr 0x00004000,r8 - - mvi_h_gr 0x80000000,r8 - set_cc 0x0e ; Set mask opposite of expected - lsr2 15,r8 - test_cc 0 0 1 0 - test_h_gr 1,r8 - - mvi_h_gr 0x40000000,r8 - set_cc 0x0a ; Set mask opposite of expected - lsr2 15,r8 - test_cc 0 1 1 1 - test_h_gr 0x00000000,r8 - - pass diff --git a/sim/testsuite/sim/fr30/misc.exp b/sim/testsuite/sim/fr30/misc.exp deleted file mode 100644 index fe8224e..0000000 --- a/sim/testsuite/sim/fr30/misc.exp +++ /dev/null @@ -1,17 +0,0 @@ -# Miscellaneous FR30 simulator testcases - -if [istarget fr30*-*-*] { - # load support procs - # load_lib cgen.exp - - # The .ms suffix is for "miscellaneous .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src - } -} diff --git a/sim/testsuite/sim/fr30/mov.cgs b/sim/testsuite/sim/fr30/mov.cgs deleted file mode 100644 index bf99252..0000000 --- a/sim/testsuite/sim/fr30/mov.cgs +++ /dev/null @@ -1,108 +0,0 @@ -# fr30 testcase for mov $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mov -mov: - ; Test mov $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_dr 0xa,tbr - mvi_h_dr 0xb,rp - mvi_h_dr 0xc,mdh - mvi_h_dr 0xd,mdl - mvr_h_gr sp,ssp - mvr_h_gr sp,usp - - mov r7,r7 - set_cc 0x0f ; Condition codes should not change - test_cc 1 1 1 1 - test_h_gr 1,r7 - - mov r7,r8 - set_cc 0x0e ; Condition codes should not change - test_cc 1 1 1 0 - test_h_gr 1,r7 - test_h_gr 1,r8 - - ; Test mov $Rs,$Ri - set_cc 0x0d ; Condition codes should not change - mov tbr,r7 - test_cc 1 1 0 1 - test_h_gr 0xa,r7 - - set_cc 0x0c ; Condition codes should not change - mov rp,r7 - test_cc 1 1 0 0 - test_h_gr 0xb,r7 - - set_cc 0x0b ; Condition codes should not change - mov mdh,r7 - test_cc 1 0 1 1 - test_h_gr 0xc,r7 - - set_cc 0x0a ; Condition codes should not change - mov mdl,r7 - test_cc 1 0 1 0 - test_h_gr 0xd,r7 - - set_cc 0x09 ; Condition codes should not change - mov usp,r7 - test_cc 1 0 0 1 - testr_h_gr sp,r7 - - set_cc 0x08 ; Condition codes should not change - mov ssp,r7 - test_cc 1 0 0 0 - testr_h_gr sp,r7 - - ; Test mov $Ri,$Rs - set_cc 0x07 ; Condition codes should not change - mov r8,tbr - test_cc 0 1 1 1 - test_h_dr 0x1,tbr - - set_cc 0x06 ; Condition codes should not change - mov r8,rp - test_cc 0 1 1 0 - test_h_dr 0x1,rp - - set_cc 0x05 ; Condition codes should not change - mov r8,mdh - test_cc 0 1 0 1 - test_h_dr 0x1,mdh - - set_cc 0x04 ; Condition codes should not change - mov r8,mdl - test_cc 0 1 0 0 - test_h_dr 0x1,mdl - - set_cc 0x03 ; Condition codes should not change - mov r8,ssp - test_cc 0 0 1 1 - test_h_dr 0x1,ssp - - set_cc 0x02 ; Condition codes should not change - mov r8,usp - test_cc 0 0 1 0 - test_h_dr 0x1,usp - - ; Test mov $PS,$Ri - set_cc 0x01 ; Condition codes affect result - set_dbits 0x3 - mov ps,r7 - test_cc 0 0 0 1 - test_h_gr 0x00000601,r7 - - ; Test mov $Ri,PS - set_cc 0x01 ; Set opposite of expected - set_dbits 0x1 ; Set opposite of expected - mvi_h_gr 0x0000040e,r7 - mov r7,PS - test_cc 1 1 1 0 - test_dbits 0x2 - - pass diff --git a/sim/testsuite/sim/fr30/mul.cgs b/sim/testsuite/sim/fr30/mul.cgs deleted file mode 100644 index f7cbf58..0000000 --- a/sim/testsuite/sim/fr30/mul.cgs +++ /dev/null @@ -1,240 +0,0 @@ -# fr30 testcase for mul $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mul -mul: - ; Test mul $Rj,$Ri - ; Positive operands - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr 2,r8 - set_cc 0x0b ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x0a ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 0x3fffffff,r7 ; 31 bit result - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 32 bit result - mvi_h_gr 2,r8 - set_cc 0x04 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 1 0 - test_h_dr 0,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0x40000000,r7 ; 33 bit result - mvi_h_gr 4,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 1,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x7fffffff,r7 ; max positive result - mvi_h_gr 0x7fffffff,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x3fffffff,mdh - test_h_dr 0x00000001,mdl - - ; Mixed operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr -1,mdh - test_h_dr -6,mdl - - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr -1,mdh - test_h_dr -6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x06 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 0 - test_h_dr -1,mdh - test_h_dr -2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr -1,mdh - test_h_dr -2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr -2,r8 - set_cc 0x0b ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr -2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x0a ; Set mask opposite of expected - mul r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 0x20000001,r7 ; 31 bit result - mvi_h_gr -2,r8 - set_cc 0x07 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 1 - test_h_dr 0xffffffff,mdh - test_h_dr 0xbffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 32 bit result - mvi_h_gr -2,r8 - set_cc 0x06 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 0 0 - test_h_dr 0xffffffff,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0x40000001,r7 ; 32 bit result - mvi_h_gr -2,r8 - set_cc 0x0c ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 0 - test_h_dr 0xffffffff,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 33 bit result - mvi_h_gr -4,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0xffffffff,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x7fffffff,r7 ; max negative result - mvi_h_gr 0x80000000,r8 - set_cc 0x05 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xc0000000,mdh - test_h_dr 0x80000000,mdl - - ; Negative operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 6,mdl - - mvi_h_gr -1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x0e ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr -1,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 0xc0000001,r7 ; 31 bit result - mvi_h_gr -2,r8 - set_cc 0x0f ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0xc0000000,r7 ; 32 bit result - mvi_h_gr -2,r8 - set_cc 0x04 ; Set mask opposite of expected - mul r7,r8 - test_cc 1 0 1 0 - test_h_dr 0,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0xc0000000,r7 ; 33 bit result - mvi_h_gr -4,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 1,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x80000001,r7 ; almost max positive result - mvi_h_gr 0x80000001,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x3fffffff,mdh - test_h_dr 0x00000001,mdl - - - mvi_h_gr 0x80000000,r7 ; max positive result - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - mul r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x40000000,mdh - test_h_dr 0x00000000,mdl - - pass diff --git a/sim/testsuite/sim/fr30/mulh.cgs b/sim/testsuite/sim/fr30/mulh.cgs deleted file mode 100644 index 1421f07..0000000 --- a/sim/testsuite/sim/fr30/mulh.cgs +++ /dev/null @@ -1,211 +0,0 @@ -# fr30 testcase for mulh $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mulh -mulh: - ; Test mulh $Rj,$Ri - ; Positive operands - mvi_h_gr 0xdead0003,r7 ; multiply small numbers - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 6,mdl - - mvi_h_gr 0xdead0001,r7 ; multiply by 1 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 1 - mvi_h_gr 0xbeef0001,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0000,r7 ; multiply by 0 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 0 - mvi_h_gr 0xbeef0000,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdl - - mvi_h_gr 0xdead3fff,r7 ; 15 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0x00007ffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 16 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x0a ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 0 - test_h_dr 0x00008000,mdl - - mvi_h_gr 0xdead4000,r7 ; 17 bit result - mvi_h_gr 0xbeef0004,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x00010000,mdl - - mvi_h_gr 0xdead7fff,r7 ; max positive result - mvi_h_gr 0xbeef7fff,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x3fff0001,mdl - - ; Mixed operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr -6,mdl - - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr -6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x04 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 0 - test_h_dr -2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr -2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr -2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdl - - mvi_h_gr -2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdl - - mvi_h_gr 0xdead2001,r7 ; 15 bit result - mvi_h_gr -2,r8 - set_cc 0x05 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 1 - test_h_dr 0xffffbffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 16 bit result - mvi_h_gr -2,r8 - set_cc 0x04 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 0 0 - test_h_dr 0xffff8000,mdl - - mvi_h_gr 0xdead4001,r7 ; 16 bit result - mvi_h_gr -2,r8 - set_cc 0x06 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 1 0 - test_h_dr 0xffff7ffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 17 bit result - mvi_h_gr -4,r8 - set_cc 0x07 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xffff0000,mdl - - mvi_h_gr 0xdead7fff,r7 ; max negative result - mvi_h_gr 0xbeef8000,r8 - set_cc 0x07 ; Set mask opposite of expected - mulh r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xc0008000,mdl - - ; Negative operands - mvi_h_gr -3,r7 ; multiply small numbers - mvi_h_gr -2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 6,mdl - - mvi_h_gr -1,r7 ; multiply by 1 - mvi_h_gr -2,r8 - set_cc 0x08 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 0 - test_h_dr 2,mdl - - mvi_h_gr -2,r7 ; multiply by 1 - mvi_h_gr -1,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 2,mdl - - mvi_h_gr 0xdeadc001,r7 ; 15 bit result - mvi_h_gr -2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0x00007ffe,mdl - - mvi_h_gr 0xdeadc000,r7 ; 16 bit result - mvi_h_gr -2,r8 - set_cc 0x0a ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 0 - test_h_dr 0x00008000,mdl - - mvi_h_gr 0xdeadc000,r7 ; 17 bit result - mvi_h_gr -4,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x00010000,mdl - - mvi_h_gr 0xdead8001,r7 ; almost max positive result - mvi_h_gr 0xbeef8001,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x3fff0001,mdl - - mvi_h_gr 0xdead8000,r7 ; max positive result - mvi_h_gr 0xbeef8000,r8 - set_cc 0x0b ; Set mask opposite of expected - mulh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x40000000,mdl - - pass diff --git a/sim/testsuite/sim/fr30/mulu.cgs b/sim/testsuite/sim/fr30/mulu.cgs deleted file mode 100644 index 477583b..0000000 --- a/sim/testsuite/sim/fr30/mulu.cgs +++ /dev/null @@ -1,101 +0,0 @@ -# fr30 testcase for mulu $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global mulu -mulu: - ; Test mulu $Rj,$Ri - ; Positive operands - mvi_h_gr 3,r7 ; multiply small numbers - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 6,mdl - - mvi_h_gr 1,r7 ; multiply by 1 - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 2,r7 ; multiply by 1 - mvi_h_gr 1,r8 - set_cc 0x0f ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 2,mdl - - mvi_h_gr 0,r7 ; multiply by 0 - mvi_h_gr 2,r8 - set_cc 0x0b ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 2,r7 ; multiply by 0 - mvi_h_gr 0,r8 - set_cc 0x0a ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdh - test_h_dr 0,mdl - - mvi_h_gr 0x3fffffff,r7 ; 31 bit result - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 1 - test_h_dr 0,mdh - test_h_dr 0x7ffffffe,mdl - - mvi_h_gr 0x40000000,r7 ; 32 bit result - mvi_h_gr 2,r8 - set_cc 0x0e ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 0 0 - test_h_dr 0,mdh - test_h_dr 0x80000000,mdl - - mvi_h_gr 0x80000000,r7 ; 33 bit result - mvi_h_gr 2,r8 - set_cc 0x09 ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 1 1 - test_h_dr 1,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0x7fffffff,r7 ; max positive result - mvi_h_gr 0x7fffffff,r8 - set_cc 0x0d ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 0 1 1 - test_h_dr 0x3fffffff,mdh - test_h_dr 0x00000001,mdl - - mvi_h_gr 0x80000000,r7 ; max positive result - mvi_h_gr 0x80000000,r8 - set_cc 0x09 ; Set mask opposite of expected - mulu r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x40000000,mdh - test_h_dr 0x00000000,mdl - - mvi_h_gr 0xffffffff,r7 ; max positive result - mvi_h_gr 0xffffffff,r8 - set_cc 0x05 ; Set mask opposite of expected - mulu r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xfffffffe,mdh - test_h_dr 0x00000001,mdl - - pass diff --git a/sim/testsuite/sim/fr30/muluh.cgs b/sim/testsuite/sim/fr30/muluh.cgs deleted file mode 100644 index b0c847e..0000000 --- a/sim/testsuite/sim/fr30/muluh.cgs +++ /dev/null @@ -1,90 +0,0 @@ -# fr30 testcase for muluh $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global muluh -muluh: - ; Test muluh $Rj,$Ri - ; Positive operands - mvi_h_gr 0xdead0003,r7 ; multiply small numbers - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 6,mdl - - mvi_h_gr 0xdead0001,r7 ; multiply by 1 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x08 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 0 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 1 - mvi_h_gr 0xbeef0001,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 2,mdl - - mvi_h_gr 0xdead0000,r7 ; multiply by 0 - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0,mdl - - mvi_h_gr 0xdead0002,r7 ; multiply by 0 - mvi_h_gr 0xbeef0000,r8 - set_cc 0x08 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0,mdl - - mvi_h_gr 0xdead3fff,r7 ; 15 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x09 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 1 - test_h_dr 0x00007ffe,mdl - - mvi_h_gr 0xdead4000,r7 ; 16 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x08 ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 0 0 - test_h_dr 0x00008000,mdl - - mvi_h_gr 0xdead8000,r7 ; 17 bit result - mvi_h_gr 0xbeef0002,r8 - set_cc 0x0b ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x00010000,mdl - - mvi_h_gr 0xdead7fff,r7 ; max positive result - mvi_h_gr 0xbeef7fff,r8 - set_cc 0x0b ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x3fff0001,mdl - - mvi_h_gr 0xdead8000,r7 ; max positive result - mvi_h_gr 0xbeef8000,r8 - set_cc 0x0b ; Set mask opposite of expected - muluh r7,r8 - test_cc 0 1 1 1 - test_h_dr 0x40000000,mdl - - mvi_h_gr 0xdeadffff,r7 ; max positive result - mvi_h_gr 0xbeefffff,r8 - set_cc 0x07 ; Set mask opposite of expected - muluh r7,r8 - test_cc 1 0 1 1 - test_h_dr 0xfffe0001,mdl - - pass diff --git a/sim/testsuite/sim/fr30/nop.cgs b/sim/testsuite/sim/fr30/nop.cgs deleted file mode 100644 index 885c55c..0000000 --- a/sim/testsuite/sim/fr30/nop.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# fr30 testcase for nop -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global nop -nop: - ; Test nop - set_cc 0x0f ; Condition codes are irrelevent - nop - test_cc 1 1 1 1 - - pass diff --git a/sim/testsuite/sim/fr30/or.cgs b/sim/testsuite/sim/fr30/or.cgs deleted file mode 100644 index 8acb970..0000000 --- a/sim/testsuite/sim/fr30/or.cgs +++ /dev/null @@ -1,55 +0,0 @@ -# fr30 testcase for or $Rj,$Ri, or $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global or -or: - ; Test or $Rj,$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_gr 0x55555555,r8 - set_cc 0x07 ; Set mask opposite of expected - or r7,r8 - test_cc 1 0 1 1 - test_h_gr 0xffffffff,r8 - - mvi_h_gr 0x00000000,r7 - mvi_h_gr 0x00000000,r8 - set_cc 0x08 ; Set mask opposite of expected - or r7,r8 - test_cc 0 1 0 0 - test_h_gr 0x00000000,r8 - - mvi_h_gr 0xdead0000,r7 - mvi_h_gr 0x0000beef,r8 - set_cc 0x05 ; Set mask opposite of expected - or r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xdeadbeef,r8 - - ; Test or $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - or r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffffffff,sp - - mvi_h_gr 0x00000000,r7 - mvi_h_mem 0x00000000,sp - set_cc 0x08 ; Set mask opposite of expected - or r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00000000,sp - - mvi_h_gr 0xdead0000,r7 - mvi_h_mem 0x0000beef,sp - set_cc 0x05 ; Set mask opposite of expected - or r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/orb.cgs b/sim/testsuite/sim/fr30/orb.cgs deleted file mode 100644 index a7b36bf..0000000 --- a/sim/testsuite/sim/fr30/orb.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# fr30 testcase for orb $Rj,$Ri, orb $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global orb -orb: - ; Test orb $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - orb r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xff555555,sp - - mvi_h_gr 0xffffff00,r7 - mvi_h_mem 0x00ffffff,sp - set_cc 0x08 ; Set mask opposite of expected - orb r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x00ffffff,sp - - mvi_h_gr 0x000000d0,r7 - mvi_h_mem 0x0eadbeef,sp - set_cc 0x05 ; Set mask opposite of expected - orb r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/orccr.cgs b/sim/testsuite/sim/fr30/orccr.cgs deleted file mode 100644 index 3bc55a8..0000000 --- a/sim/testsuite/sim/fr30/orccr.cgs +++ /dev/null @@ -1,38 +0,0 @@ -# fr30 testcase for orccr $u8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global orccr -orccr: - orccr 0xff - test_cc 1 1 1 1 - test_i 1 - test_s_user - - set_cc 0x0f - orccr 0x00 - test_cc 1 1 1 1 - test_i 1 - test_s_user - - set_cc 0x00 - set_i 0 - set_s_system - orccr 0xaa - test_cc 1 0 1 0 - test_i 0 - test_s_user - - set_cc 0x00 - set_i 0 - set_s_system - orccr 0xc0 - test_cc 0 0 0 0 - test_i 0 - test_s_system - - pass diff --git a/sim/testsuite/sim/fr30/orh.cgs b/sim/testsuite/sim/fr30/orh.cgs deleted file mode 100644 index b30b402..0000000 --- a/sim/testsuite/sim/fr30/orh.cgs +++ /dev/null @@ -1,33 +0,0 @@ -# fr30 testcase for orh $Rj,$Ri, orh $Rj,@$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global orh -orh: - ; Test orh $Rj,@$Ri - mvi_h_gr 0xaaaaaaaa,r7 - mvi_h_mem 0x55555555,sp - set_cc 0x07 ; Set mask opposite of expected - orh r7,@sp - test_cc 1 0 1 1 - test_h_mem 0xffff5555,sp - - mvi_h_gr 0xffff0000,r7 - mvi_h_mem 0x0000ffff,sp - set_cc 0x08 ; Set mask opposite of expected - orh r7,@sp - test_cc 0 1 0 0 - test_h_mem 0x0000ffff,sp - - mvi_h_gr 0x0000de00,r7 - mvi_h_mem 0x00adbeef,sp - set_cc 0x05 ; Set mask opposite of expected - orh r7,@sp - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,sp - - pass diff --git a/sim/testsuite/sim/fr30/ret.cgs b/sim/testsuite/sim/fr30/ret.cgs deleted file mode 100644 index 413840e..0000000 --- a/sim/testsuite/sim/fr30/ret.cgs +++ /dev/null @@ -1,69 +0,0 @@ -# fr30 testcase for call @$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global call - - ; Test call $Ri - mvi_h_gr 0xdeadbeef,r9 - mvi_h_gr #func1,r0 - set_cc 0x0f ; condition codes shouldn't change -call1: - call @r0 - test_h_gr 0xbeefdead,r9 - pass - -func1: - test_cc 1 1 1 1 - mvi_h_gr #call1,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - save_rp - - mvi_h_gr #func2,r0 - set_cc 0x0f ; condition codes shouldn't change -call2: - call:d @r0 - ldi:8 1,r0 ; Must assume this works - restore_rp - ret -func2: - test_cc 1 1 1 1 - mvi_h_gr #call2,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - save_rp - - set_cc 0x0f ; condition codes shouldn't change -call3: - call func3 - restore_rp - ret -func3: - test_cc 1 1 1 1 - mvi_h_gr #call3,r7 - inci_h_gr 2,r7 - testr_h_dr r7,rp - save_rp - - set_cc 0x0f ; condition codes shouldn't change -call4: - call:d func4 - ldi:8 1,r0 ; Must assume this works - restore_rp - ret -func4: - test_cc 1 1 1 1 - mvi_h_gr #call4,r7 - inci_h_gr 4,r7 - testr_h_dr r7,rp - testr_h_gr 1,r0 - mvi_h_gr 0xbeefdead,r9 - ret - - fail diff --git a/sim/testsuite/sim/fr30/reti.cgs b/sim/testsuite/sim/fr30/reti.cgs deleted file mode 100644 index 76a1af0..0000000 --- a/sim/testsuite/sim/fr30/reti.cgs +++ /dev/null @@ -1,57 +0,0 @@ -# fr30 testcase for reti -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global reti -reti: - ; Test reti with low reset of ilm allowed - mvr_h_gr sp,r8 ; Save stack pointer - set_s_system - set_i 1 - set_ilm 15 ; attempt reset of low range - set_cc 0x0f ; Condition codes should not change - save_ps - inci_h_gr -4,sp - mvi_h_mem ret1,sp - set_i 0 ; Set opposite of expected - set_ilm 0 ; attempt reset of low range - set_cc 0x00 ; Set opposite of expected - - reti - fail - -ret1: - test_cc 1 1 1 1 - test_s_system - test_i 1 - test_ilm 15 - testr_h_gr r8,sp - - ; Test reti with low reset of ilm not allowed - mvr_h_gr sp,r8 ; Save stack pointer - set_s_system - set_i 0 - set_ilm 15 ; attempt reset of low range - set_cc 0x0f ; Condition codes should not change - save_ps - inci_h_gr -4,sp - mvi_h_mem ret2,sp - set_i 0 ; Set opposite of expected - set_ilm 16 ; disallow reset of low range - set_cc 0x00 ; Set opposite of expected - - reti - fail - -ret2: - test_cc 1 1 1 1 - test_s_system - test_i 0 - test_ilm 31 - testr_h_gr r8,sp - - pass diff --git a/sim/testsuite/sim/fr30/st.cgs b/sim/testsuite/sim/fr30/st.cgs deleted file mode 100644 index e458d14..0000000 --- a/sim/testsuite/sim/fr30/st.cgs +++ /dev/null @@ -1,194 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# st $Ri,@$Rj - - .include "testutils.inc" - - START - - .text - .global st -st: - mvr_h_gr sp,r9 ; Save stack pointer - ; Test st $Ri,@Rj - mvi_h_gr 0xdeadbeef,r8 - set_cc 0x0f ; Condition codes should not change - st r8,@sp - test_cc 1 1 1 1 - test_h_mem 0xdeadbeef,sp - test_h_gr 0xdeadbeef,r8 - - ; Test st $Ri,@(R13,Rj) - mvi_h_gr 0xbeefdead,r8 - mvr_h_gr sp,r1 - inci_h_gr -8,sp - mvr_h_gr sp,r2 - inci_h_gr 4,sp - - mvi_h_gr 4,r13 - set_cc 0x0e ; Condition codes should not change - st r8,@(r13,sp) - test_cc 1 1 1 0 - test_h_mem 0xbeefdead,r1 - test_h_gr 0xbeefdead,r8 - - mvi_h_gr 0,r13 - set_cc 0x0d ; Condition codes should not change - st r8,@(r13,sp) - test_cc 1 1 0 1 - test_h_mem 0xbeefdead,sp - test_h_gr 0xbeefdead,r8 - - mvi_h_gr -4,r13 - set_cc 0x0c ; Condition codes should not change - st r8,@(r13,sp) - test_cc 1 1 0 0 - test_h_mem 0xbeefdead,r2 - test_h_gr 0xbeefdead,r8 - - ; Test st $Ri,@(R14,$disp10) - mvi_h_gr 0xdeadbeef,r8 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr sp,r14 - inci_h_gr -508,r14 - mvr_h_gr r14,r2 - inci_h_gr -512,r14 - mvr_h_gr r14,r3 - inci_h_gr 512,r14 - - set_cc 0x0b ; Condition codes should not change - st r8,@(r14,508) - test_cc 1 0 1 1 - test_h_mem 0xdeadbeef,r1 - test_h_gr 0xdeadbeef,r8 - - set_cc 0x0a ; Condition codes should not change - st r8,@(r14,0) - test_cc 1 0 1 0 - test_h_mem 0xdeadbeef,r2 - test_h_gr 0xdeadbeef,r8 - - set_cc 0x09 ; Condition codes should not change - st r8,@(r14,-512) - test_cc 1 0 0 1 - test_h_mem 0xdeadbeef,r3 - test_h_gr 0xdeadbeef,r8 - - ; Test st $Ri,@(R15,$udisp6) - mvi_h_gr 0xbeefdead,r8 - mvr_h_gr r9,sp ; Restore stack pointer - inci_h_gr -60,sp - - set_cc 0x08 ; Condition codes should not change - st r8,@(r15,60) - test_cc 1 0 0 0 - test_h_mem 0xbeefdead,r9 - test_h_gr 0xbeefdead,r8 - - set_cc 0x07 ; Condition codes should not change - st r8,@(r15,0) - test_cc 0 1 1 1 - test_h_mem 0xbeefdead,r9 - test_h_gr 0xbeefdead,r8 - - ; Test st $Ri,@-R15 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr r9,r10 - - set_cc 0x06 ; Condition codes should not change - st r15,@-r15 - test_cc 0 1 1 0 - testr_h_mem r9,sp ; original value stored - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - mvi_h_gr 0xdeadbeef,r8 - set_cc 0x05 ; Condition codes should not change - st r8,@-r15 - test_cc 0 1 0 1 - test_h_mem 0xdeadbeef,sp - test_h_gr 0xdeadbeef,r8 - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - ; Test st $Rs,@-R15 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr r9,r10 - mvi_h_dr 0xbeefdead,tbr - mvi_h_dr 0xdeadbeef,rp - mvi_h_dr 0x0000dead,mdh - mvi_h_dr 0xbeef0000,mdl - - set_cc 0x04 ; Condition codes should not change - st tbr,@-r15 - test_cc 0 1 0 0 - test_h_mem 0xbeefdead,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x03 ; Condition codes should not change - st rp,@-r15 - test_cc 0 0 1 1 - test_h_mem 0xdeadbeef,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x02 ; Condition codes should not change - st mdh,@-r15 - test_cc 0 0 1 0 - test_h_mem 0x0000dead,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x01 ; Condition codes should not change - st mdl,@-r15 - test_cc 0 0 0 1 - test_h_mem 0xbeef0000,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - mvr_h_gr sp,usp - set_s_user - set_cc 0x00 ; Condition codes should not change - st ssp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x00 ; Condition codes should not change - st usp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp ; original value stored - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - mvr_h_gr sp,ssp - set_s_system - set_cc 0x00 ; Condition codes should not change - st usp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - set_cc 0x00 ; Condition codes should not change - st ssp,@-r15 - test_cc 0 0 0 0 - testr_h_mem r10,sp ; original value stored - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - ; Test st $PS,@-R15 - mvr_h_gr r9,sp ; Restore stack pointer - mvr_h_gr r9,r10 - - set_cc 0x0f ; Condition codes affect result - set_dbits 3 ; Division bits affect result - st ps,@-r15 - test_cc 1 1 1 1 - test_h_mem 0x0000060f,sp - inci_h_gr -4,r10 - testr_h_gr r10,sp ; was decremented - - pass diff --git a/sim/testsuite/sim/fr30/stb.cgs b/sim/testsuite/sim/fr30/stb.cgs deleted file mode 100644 index d9d4fd0..0000000 --- a/sim/testsuite/sim/fr30/stb.cgs +++ /dev/null @@ -1,84 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# stb $Ri,@$Rj - - .include "testutils.inc" - - START - - .text - .global stb -stb: - mvr_h_gr sp,r9 ; Save stack pointer - ; Test stb $Ri,@Rj - mvi_h_mem 0xdeadbeef,sp - mvi_h_gr 0xaaaaaafe,r8 - set_cc 0x0f ; Condition codes should not change - stb r8,@sp - test_cc 1 1 1 1 - test_h_mem 0xfeadbeef,sp - test_h_gr 0xaaaaaafe,r8 - - ; Test stb $Ri,@(R13,Rj) - mvi_h_mem 0xbeefdead,sp - mvi_h_gr 0xaaaaaade,r8 - mvr_h_gr sp,r1 - inci_h_gr -8,sp - mvr_h_gr sp,r2 - mvi_h_mem 0xbeefdead,sp - inci_h_gr 4,sp - mvi_h_mem 0xbeefdead,sp - - mvi_h_gr 4,r13 - set_cc 0x0e ; Condition codes should not change - stb r8,@(r13,sp) - test_cc 1 1 1 0 - test_h_mem 0xdeefdead,r1 - test_h_gr 0xaaaaaade,r8 - - mvi_h_gr 0,r13 - set_cc 0x0d ; Condition codes should not change - stb r8,@(r13,sp) - test_cc 1 1 0 1 - test_h_mem 0xdeefdead,sp - test_h_gr 0xaaaaaade,r8 - - mvi_h_gr -4,r13 - set_cc 0x0c ; Condition codes should not change - stb r8,@(r13,sp) - test_cc 1 1 0 0 - test_h_mem 0xdeefdead,r2 - test_h_gr 0xaaaaaade,r8 - - ; Test stb $Ri,@(R14,$disp8 - mvr_h_gr r9,sp ; Restore stack pointer - mvi_h_gr 0xaaaaaafe,r8 - mvi_h_mem 0xdeadbeef,sp - mvr_h_gr sp,r14 - inci_h_gr -127,r14 - mvr_h_gr r14,r2 - mvi_h_mem 0xdeadbeef,r14 - inci_h_gr -128,r14 - mvr_h_gr r14,r3 - mvi_h_mem 0xdeadbeef,r14 - inci_h_gr 128,r14 - - set_cc 0x0b ; Condition codes should not change - stb r8,@(r14,127) - test_cc 1 0 1 1 - test_h_mem 0xfeadbeef,r1 - test_h_gr 0xaaaaaafe,r8 - - set_cc 0x0a ; Condition codes should not change - stb r8,@(r14,0) - test_cc 1 0 1 0 - test_h_mem 0xfeadbeef,r2 - test_h_gr 0xaaaaaafe,r8 - - set_cc 0x09 ; Condition codes should not change - stb r8,@(r14,-128) - test_cc 1 0 0 1 - test_h_mem 0xfeadbeef,r3 - test_h_gr 0xaaaaaafe,r8 - - pass diff --git a/sim/testsuite/sim/fr30/sth.cgs b/sim/testsuite/sim/fr30/sth.cgs deleted file mode 100644 index 64c83e6..0000000 --- a/sim/testsuite/sim/fr30/sth.cgs +++ /dev/null @@ -1,84 +0,0 @@ -# fr30 testcase for -# mach(): fr30 -# sth $Ri,@$Rj - - .include "testutils.inc" - - START - - .text - .global sth -sth: - mvr_h_gr sp,r9 ; Save stack pointer - ; Test sth $Ri,@Rj - mvi_h_mem 0xdeadbeef,sp - mvi_h_gr 0xaaaabeef,r8 - set_cc 0x0f ; Condition codes should not change - sth r8,@sp - test_cc 1 1 1 1 - test_h_mem 0xbeefbeef,sp - test_h_gr 0xaaaabeef,r8 - - ; Test sth $Ri,@(R13,Rj) - mvi_h_mem 0xbeefdead,sp - mvi_h_gr 0xaaaadead,r8 - mvr_h_gr sp,r1 - inci_h_gr -8,sp - mvr_h_gr sp,r2 - mvi_h_mem 0xbeefdead,sp - inci_h_gr 4,sp - mvi_h_mem 0xbeefdead,sp - - mvi_h_gr 4,r13 - set_cc 0x0e ; Condition codes should not change - sth r8,@(r13,sp) - test_cc 1 1 1 0 - test_h_mem 0xdeaddead,r1 - test_h_gr 0xaaaadead,r8 - - mvi_h_gr 0,r13 - set_cc 0x0d ; Condition codes should not change - sth r8,@(r13,sp) - test_cc 1 1 0 1 - test_h_mem 0xdeaddead,sp - test_h_gr 0xaaaadead,r8 - - mvi_h_gr -4,r13 - set_cc 0x0c ; Condition codes should not change - sth r8,@(r13,sp) - test_cc 1 1 0 0 - test_h_mem 0xdeaddead,r2 - test_h_gr 0xaaaadead,r8 - - ; Test sth $Ri,@(R14,$disp9) - mvr_h_gr r9,sp ; Restore stack pointer - mvi_h_gr 0xaaaabeef,r8 - mvi_h_mem 0xdeadbeef,sp - mvr_h_gr sp,r14 - inci_h_gr -254,r14 - mvr_h_gr r14,r2 - mvi_h_mem 0xdeadbeef,r14 - inci_h_gr -256,r14 - mvr_h_gr r14,r3 - mvi_h_mem 0xdeadbeef,r14 - inci_h_gr 256,r14 - - set_cc 0x0b ; Condition codes should not change - sth r8,@(r14,254) - test_cc 1 0 1 1 - test_h_mem 0xbeefbeef,r1 - test_h_gr 0xaaaabeef,r8 - - set_cc 0x0a ; Condition codes should not change - sth r8,@(r14,0) - test_cc 1 0 1 0 - test_h_mem 0xbeefbeef,r2 - test_h_gr 0xaaaabeef,r8 - - set_cc 0x09 ; Condition codes should not change - sth r8,@(r14,-256) - test_cc 1 0 0 1 - test_h_mem 0xbeefbeef,r3 - test_h_gr 0xaaaabeef,r8 - - pass diff --git a/sim/testsuite/sim/fr30/stilm.cgs b/sim/testsuite/sim/fr30/stilm.cgs deleted file mode 100644 index 197940b..0000000 --- a/sim/testsuite/sim/fr30/stilm.cgs +++ /dev/null @@ -1,41 +0,0 @@ -# fr30 testcase for stilm $i8 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stilm -stilm: - stilm 0 - test_ilm 0 - - stilm 0xe0 - test_ilm 0 - - stilm 1 - test_ilm 1 - - stilm 15 - test_ilm 15 - - stilm 16 - test_ilm 16 - - stilm 0 - test_ilm 16 - - stilm 1 - test_ilm 17 - - stilm 18 - test_ilm 18 - - stilm 31 - test_ilm 31 - - stilm 0xff - test_ilm 31 - - pass diff --git a/sim/testsuite/sim/fr30/stm0.cgs b/sim/testsuite/sim/fr30/stm0.cgs deleted file mode 100644 index 5cc162c..0000000 --- a/sim/testsuite/sim/fr30/stm0.cgs +++ /dev/null @@ -1,101 +0,0 @@ -# fr30 testcase for stm0 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stm0 -stm0: - ; Test stm0 ($reglist_low) - mvr_h_gr sp,r8 ; save stack pointer temporarily - mvr_h_gr sp,r9 ; save stack pointer permanently - mvi_h_gr 0,r0 - mvi_h_gr 1,r1 - mvi_h_gr 2,r2 - mvi_h_gr 3,r3 - mvi_h_gr 4,r4 - mvi_h_gr 5,r5 - mvi_h_gr 6,r6 - mvi_h_gr 7,r7 - set_cc 0x0f ; Condition codes should not change - stm0 (r0,r2,r4,r6) - test_cc 1 1 1 1 - inci_h_gr -4,r8 - test_h_mem 6,r8 - inci_h_gr -4,r8 - test_h_mem 4,r8 - inci_h_gr -4,r8 - test_h_mem 2,r8 - inci_h_gr -4,r8 - test_h_mem 0,r8 - - mvr_h_gr r9,sp ; restore stack pointer - mvr_h_gr r9,r8 ; save stack pointer temporarily - mvi_h_gr 0,r0 - mvi_h_gr 1,r1 - mvi_h_gr 2,r2 - mvi_h_gr 3,r3 - mvi_h_gr 4,r4 - mvi_h_gr 5,r5 - mvi_h_gr 6,r6 - mvi_h_gr 7,r7 - set_cc 0x0f ; Condition codes should not change - stm0 (r1,r3,r5,r7) - test_cc 1 1 1 1 - inci_h_gr -4,r8 - test_h_mem 7,r8 - inci_h_gr -4,r8 - test_h_mem 5,r8 - inci_h_gr -4,r8 - test_h_mem 3,r8 - inci_h_gr -4,r8 - test_h_mem 1,r8 - - mvr_h_gr r9,sp ; restore stack pointer - mvr_h_gr r9,r8 ; save stack pointer temporarily - mvi_h_gr 0,r0 - mvi_h_gr 1,r1 - mvi_h_gr 2,r2 - mvi_h_gr 3,r3 - mvi_h_gr 4,r4 - mvi_h_gr 5,r5 - mvi_h_gr 6,r6 - mvi_h_gr 7,r7 - set_cc 0x0f ; Condition codes should not change - stm0 (r1,r5,r7,r3) ; Order specified should not matter - test_cc 1 1 1 1 - inci_h_gr -4,r8 - test_h_mem 7,r8 - inci_h_gr -4,r8 - test_h_mem 5,r8 - inci_h_gr -4,r8 - test_h_mem 3,r8 - inci_h_gr -4,r8 - test_h_mem 1,r8 - - mvr_h_gr r9,sp ; restore stack pointer - mvr_h_gr r9,r8 ; save stack pointer temporarily - mvi_h_gr 9,r0 - mvi_h_gr 9,r1 - mvi_h_gr 9,r2 - mvi_h_gr 9,r3 - mvi_h_gr 9,r4 - mvi_h_gr 9,r5 - mvi_h_gr 9,r6 - mvi_h_gr 9,r7 - set_cc 0x0f ; Condition codes should not change - stm0 () ; should do nothing - test_cc 1 1 1 1 - testr_h_gr r9,sp - inci_h_gr -4,r8 - test_h_mem 7,r8 - inci_h_gr -4,r8 - test_h_mem 5,r8 - inci_h_gr -4,r8 - test_h_mem 3,r8 - inci_h_gr -4,r8 - test_h_mem 1,r8 - - pass diff --git a/sim/testsuite/sim/fr30/stm1.cgs b/sim/testsuite/sim/fr30/stm1.cgs deleted file mode 100644 index 2ac373d..0000000 --- a/sim/testsuite/sim/fr30/stm1.cgs +++ /dev/null @@ -1,97 +0,0 @@ -# fr30 testcase for stm1 ($reglist_low) -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stm1 -stm1: - ; Test stm1 ($reglist_low) - mvr_h_gr sp,r1 ; save stack pointer temporarily - mvr_h_gr sp,r2 ; save stack pointer permanently - mvi_h_gr 8,r8 - mvi_h_gr 9,r9 - mvi_h_gr 10,r10 - mvi_h_gr 11,r11 - mvi_h_gr 12,r12 - mvi_h_gr 13,r13 - mvi_h_gr 14,r14 - set_cc 0x0f ; Condition codes should not change - stm1 (r8,r10,r12,r14) - test_cc 1 1 1 1 - inci_h_gr -4,r1 - test_h_mem 14,r1 - inci_h_gr -4,r1 - test_h_mem 12,r1 - inci_h_gr -4,r1 - test_h_mem 10,r1 - inci_h_gr -4,r1 - testr_h_mem 8,r1 - - mvr_h_gr r2,sp ; restore stack pointer - mvr_h_gr r2,r1 ; save stack pointer temporarily - mvi_h_gr 8,r8 - mvi_h_gr 9,r9 - mvi_h_gr 10,r10 - mvi_h_gr 11,r11 - mvi_h_gr 12,r12 - mvi_h_gr 13,r13 - mvi_h_gr 14,r14 - set_cc 0x0f ; Condition codes should not change - stm1 (r9,r11,r13,r15) - test_cc 1 1 1 1 - inci_h_gr -4,r1 - testr_h_mem r2,r1 - inci_h_gr -4,r1 - test_h_mem 13,r1 - inci_h_gr -4,r1 - test_h_mem 11,r1 - inci_h_gr -4,r1 - test_h_mem 9,r1 ; saved r15 is from before stm1 - - mvr_h_gr r2,sp ; restore stack pointer - mvr_h_gr r2,r1 ; save stack pointer temporarily - mvi_h_gr 8,r8 - mvi_h_gr 9,r9 - mvi_h_gr 10,r10 - mvi_h_gr 11,r11 - mvi_h_gr 12,r12 - mvi_h_gr 13,r13 - mvi_h_gr 14,r14 - set_cc 0x0f ; Condition codes should not change - stm1 (r9,r13,r15,r11); Order specified should not matter - test_cc 1 1 1 1 - inci_h_gr -4,r1 - testr_h_mem r2,r1 - inci_h_gr -4,r1 - test_h_mem 13,r1 - inci_h_gr -4,r1 - test_h_mem 11,r1 - inci_h_gr -4,r1 - test_h_mem 9,r1 ; saved r15 is from before stm1 - - mvr_h_gr r2,sp ; restore stack pointer - mvr_h_gr r2,r1 ; save stack pointer temporarily - mvi_h_gr 9,r8 - mvi_h_gr 9,r9 - mvi_h_gr 9,r10 - mvi_h_gr 9,r11 - mvi_h_gr 9,r12 - mvi_h_gr 9,r13 - mvi_h_gr 9,r14 - set_cc 0x0f ; Condition codes should not change - stm1 () ; should do nothing - test_cc 1 1 1 1 - testr_h_gr r2,sp - inci_h_gr -4,r1 - testr_h_mem r2,r1 - inci_h_gr -4,r1 - test_h_mem 13,r1 - inci_h_gr -4,r1 - test_h_mem 11,r1 - inci_h_gr -4,r1 - test_h_mem 9,r1 - - pass diff --git a/sim/testsuite/sim/fr30/stres.cgs b/sim/testsuite/sim/fr30/stres.cgs deleted file mode 100644 index a85fdf3..0000000 --- a/sim/testsuite/sim/fr30/stres.cgs +++ /dev/null @@ -1,25 +0,0 @@ -# fr30 testcase for stres $@Ri+,$u4 -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global stres -stres: - ; Test stres $@Ri+,$u4 - ; The current implementation simply increments Ri - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - stres 0,@r7+ - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - mvi_h_gr 0x1000,r7 - set_cc 0x0f ; Condition codes are irrelevent - stres 0xf,@r7+ - test_cc 1 1 1 1 - test_h_gr 0x1004,r7 - - pass diff --git a/sim/testsuite/sim/fr30/sub.cgs b/sim/testsuite/sim/fr30/sub.cgs deleted file mode 100644 index eceaa79..0000000 --- a/sim/testsuite/sim/fr30/sub.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for sub $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global sub -sub: - ; Test sub $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of expected - sub r7,r8 - test_cc 0 0 0 0 - test_h_gr 1,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of expected - sub r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x7fffffff,r8 - - set_cc 0x0b ; Set mask opposite of expected - sub r8,r8 - test_cc 0 1 0 0 - test_h_gr 0,r8 - - set_cc 0x06 ; Set mask opposite of expected - sub r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xffffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/subc.cgs b/sim/testsuite/sim/fr30/subc.cgs deleted file mode 100644 index 2978e40..0000000 --- a/sim/testsuite/sim/fr30/subc.cgs +++ /dev/null @@ -1,62 +0,0 @@ -# fr30 testcase for subc $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global subc -subc: - ; Test subc $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0e ; Make sure carry is off - subc r7,r8 - test_cc 0 0 0 0 - test_h_gr 1,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0c ; Make sure carry is off - subc r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x7fffffff,r8 - - set_cc 0x0a ; Make sure carry is off - subc r8,r8 - test_cc 0 1 0 0 - test_h_gr 0,r8 - - set_cc 0x06 ; Make sure carry is off - subc r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xffffffff,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 3,r8 - set_cc 0x0f ; Make sure carry is on - subc r7,r8 - test_cc 0 0 0 0 - test_h_gr 1,r8 - - mvi_h_gr 0,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Make sure carry is on - subc r7,r8 - test_cc 0 0 1 0 - test_h_gr 0x7fffffff,r8 - - mvi_h_gr 0x7ffffffe,r7 - set_cc 0x0b ; Make sure carry is on - subc r7,r8 - test_cc 0 1 0 0 - test_h_gr 0,r8 - - mvi_h_gr 0,r7 - set_cc 0x07 ; Make sure carry is on - subc r7,r8 - test_cc 1 0 0 1 - test_h_gr 0xffffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/subn.cgs b/sim/testsuite/sim/fr30/subn.cgs deleted file mode 100644 index c483046..0000000 --- a/sim/testsuite/sim/fr30/subn.cgs +++ /dev/null @@ -1,36 +0,0 @@ -# fr30 testcase for subn $Rj,$Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global subn -subn: - ; Test subn $Rj,$Ri - mvi_h_gr 1,r7 - mvi_h_gr 2,r8 - set_cc 0x0f ; Set mask opposite of usual result - subn r7,r8 - test_cc 1 1 1 1 - test_h_gr 1,r8 - - mvi_h_gr 1,r7 - mvi_h_gr 0x80000000,r8 - set_cc 0x0d ; Set mask opposite of usual result - subn r7,r8 - test_cc 1 1 0 1 - test_h_gr 0x7fffffff,r8 - - set_cc 0x0b ; Set mask opposite of usual result - subn r8,r8 - test_cc 1 0 1 1 - test_h_gr 0,r8 - - set_cc 0x06 ; Set mask opposite of usual result - subn r7,r8 - test_cc 0 1 1 0 - test_h_gr 0xffffffff,r8 - - pass diff --git a/sim/testsuite/sim/fr30/testutils.inc b/sim/testsuite/sim/fr30/testutils.inc deleted file mode 100644 index 2b9e489..0000000 --- a/sim/testsuite/sim/fr30/testutils.inc +++ /dev/null @@ -1,210 +0,0 @@ -# r0, r4-r6 are used as tmps, consider them call clobbered by these macros. - - .macro start - .data -failmsg: - .ascii "fail\n" -passmsg: - .ascii "pass\n" - .text - .global _start -_start: - ldi32 0x7fffc,sp ; TODO -- what's a good value for this? - mov sp,usp - mov sp,ssp - .endm - -; Exit with return code - .macro exit rc - ldi32 \rc,r4 - ldi32 #1,r0 - int #10 - .endm - -; Pass the test case - .macro pass - ldi32 #5,r6 - ldi32 #passmsg,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 - exit #0 - .endm - -; Fail the testcase - .macro fail - ldi32 #5,r6 - ldi32 #failmsg,r5 - ldi32 #1,r4 - ldi32 #5,r0 - int #10 - exit #1 - .endm - -; Load an immediate value into a general register -; TODO: use minimal sized insn - .macro mvi_h_gr val reg - ldi32 \val,\reg - .endm - -; Load an immediate value into a dedicated register - .macro mvi_h_dr val reg - ldi32 \val,r0 - mov r0,\reg - .endm - -; Load a general register into another general register - .macro mvr_h_gr src targ - mov \src,\targ - .endm - -; Store an immediate into a word in memory - .macro mvi_h_mem val addr - mvi_h_gr \val r4 - mvr_h_mem r4,\addr - .endm - -; Store a register into a word in memory - .macro mvr_h_mem reg addr - st \reg,@\addr - .endm - -; Load a word value from memory - .macro ldmem_h_gr addr reg - ld @\addr,\reg - .endm - -; Add 2 general registers - .macro add_h_gr reg1 reg2 - add \reg1,\reg2 - .endm - -; Increment a register by and immediate - .macro inci_h_gr inc reg - mvi_h_gr \inc,r4 - add r4,\reg - .endm - -; Test the value of an immediate against a general register - .macro test_h_gr val reg - .if (\val >= 0) && (\val <= 15) - cmp \val,\reg - .else - .if (\val < 0) && (\val >= -16) - cmp2 \val,\reg - .else - ldi32 \val,r4 - cmp r4,\reg - .endif - .endif - beq test_gr\@ - fail -test_gr\@: - .endm - -; compare two general registers - .macro testr_h_gr reg1 reg2 - cmp \reg1,\reg2 - beq testr_gr\@ - fail -testr_gr\@: - .endm - -; Test the value of an immediate against a dedicated register - .macro test_h_dr val reg - mov \reg,r5 - test_h_gr \val r5 - .endm - -; Test the value of an general register against a dedicated register - .macro testr_h_dr gr dr - mov \dr,r5 - testr_h_gr \gr r5 - .endm - -; Compare an immediate with word in memory - .macro test_h_mem val addr - ldmem_h_gr \addr r5 - test_h_gr \val r5 - .endm - -; Compare a general register with word in memory - .macro testr_h_mem reg addr - ldmem_h_gr \addr r5 - testr_h_gr \reg r5 - .endm - -; Set the condition codes - .macro set_cc mask - andccr 0xf0 - orccr \mask - .endm - -; Set the stack mode - .macro set_s_user - orccr 0x20 - .endm - - .macro set_s_system - andccr 0x1f - .endm - -; Test the condition codes - .macro test_cc N Z V C - .if (\N == 1) - bp fail\@ - .else - bn fail\@ - .endif - .if (\Z == 1) - bne fail\@ - .else - beq fail\@ - .endif - .if (\V == 1) - bnv fail\@ - .else - bv fail\@ - .endif - .if (\C == 1) - bnc fail\@ - .else - bc fail\@ - .endif - bra test_cc\@ -fail\@: - fail -test_cc\@: - .endm - -; Set the division bits - .macro set_dbits val - mvr_h_gr ps,r5 - mvi_h_gr 0xfffff8ff,r4 - and r4,r5 - mvi_h_gr \val,r0 - mvi_h_gr 3,r4 - and r4,r0 - lsl 9,r0 - or r0,r5 - mvr_h_gr r5,ps - .endm - -; Test the division bits - .macro test_dbits val - mvr_h_gr ps,r0 - lsr 9,r0 - mvi_h_gr 3,r4 - and r4,r0 - test_h_gr \val,r0 - .endm - -; Save the return pointer - .macro save_rp - st rp,@-R15 - .ENDM - -; restore the return pointer - .macro restore_rp - ld @R15+,rp - .endm diff --git a/sim/testsuite/sim/fr30/xchb.cgs b/sim/testsuite/sim/fr30/xchb.cgs deleted file mode 100644 index 3450a2e..0000000 --- a/sim/testsuite/sim/fr30/xchb.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# fr30 testcase for xchb @$Rj,Ri -# mach(): fr30 - - .include "testutils.inc" - - START - - .text - .global xchb -xchb: - ; Test xchb @$Rj,Ri - mvi_h_mem 0xdeadbeef,sp - mvi_h_gr 0xbeefdead,r0 - set_cc 0x0f ; Condition codes are irrelevent - xchb @sp,r0 - test_cc 1 1 1 1 - test_h_gr 0xde,r0 - test_h_mem 0xadadbeef,sp - - pass diff --git a/sim/testsuite/sim/m32r/.Sanitize b/sim/testsuite/sim/m32r/.Sanitize deleted file mode 100644 index 6eb85f7..0000000 --- a/sim/testsuite/sim/m32r/.Sanitize +++ /dev/null @@ -1,223 +0,0 @@ -# .Sanitize for devo/sim/testsuite/sim/m32r - -# Each directory to survive it's way into a release will need a file -# like this one called "./.Sanitize". All keyword lines must exist, -# and must exist in the order specified by this file. Each directory -# in the tree will be processed, top down, in the following order. - -# Hash started lines like this one are comments and will be deleted -# before anything else is done. Blank lines will also be squashed -# out. - -# The lines between the "Do-first:" line and the "Things-to-keep:" -# line are executed as a /bin/sh shell script before anything else is -# done in this - -Do-first: - -cygnus_files=" -bcl24.cgs -bcl8.cgs -bncl24.cgs -bncl8.cgs -bra8-2.cgs -cmpeq.cgs -cmpz.cgs -divh.cgs -jc.cgs -jnc.cgs -maclh1.cgs -maclh1-2.cgs -machi-a.cgs -maclo-a.cgs -macwhi-a.cgs -macwlo-a.cgs -macwu1.cgs -msblo.cgs -mulhi-a.cgs -mullo-a.cgs -mulwhi-a.cgs -mulwlo-a.cgs -mulwu1.cgs -mvfachi-a.cgs -mvfaclo-a.cgs -mvfacmi-a.cgs -mvtachi-a.cgs -mvtaclo-a.cgs -pcmpbz.cgs -rac-dsi.cgs -rach-dsi.cgs -sadd.cgs -sat.cgs -satb.cgs -sath.cgs -sc.cgs -snc.cgs" - -if ( echo $* | grep keep\-cygnus > /dev/null ) ; then - keep_these_too="${cygnus_files} ${keep_these_too}" -else - lose_these_too="${cygnus_files} ${lose_these_too}" -fi - -Things-to-keep: - -allinsn.exp -misc.exp -testutils.inc - -add.cgs -add3.cgs -addi.cgs -addv.cgs -addv3.cgs -addx.cgs -and.cgs -and3.cgs -bc24.cgs -bc8.cgs -beq.cgs -beqz.cgs -bgez.cgs -bgtz.cgs -bl24.cgs -bl8.cgs -blez.cgs -bltz.cgs -bnc24.cgs -bnc8.cgs -bne.cgs -bnez.cgs -bra24.cgs -bra8.cgs -cmp.cgs -cmpi.cgs -cmpu.cgs -cmpui.cgs -div.cgs -divu.cgs -jl.cgs -jmp.cgs -ld-d.cgs -ld-plus.cgs -ld.cgs -ld24.cgs -ldb-d.cgs -ldb.cgs -ldh-d.cgs -ldh.cgs -ldi16.cgs -ldi8.cgs -ldub-d.cgs -ldub.cgs -lduh-d.cgs -lduh.cgs -lock.cgs -machi.cgs -maclo.cgs -macwhi.cgs -macwlo.cgs -mul.cgs -mulhi.cgs -mullo.cgs -mulwhi.cgs -mulwlo.cgs -mv.cgs -mvfachi.cgs -mvfaclo.cgs -mvfacmi.cgs -mvfc.cgs -mvtachi.cgs -mvtaclo.cgs -mvtc.cgs -neg.cgs -nop.cgs -not.cgs -or.cgs -or3.cgs -rac.cgs -rach.cgs -rem.cgs -remu.cgs -rte.cgs -seth.cgs -sll.cgs -sll3.cgs -slli.cgs -sra.cgs -sra3.cgs -srai.cgs -srl.cgs -srl3.cgs -srli.cgs -st-d.cgs -st-minus.cgs -st-plus.cgs -st.cgs -stb-d.cgs -stb.cgs -sth-d.cgs -sth.cgs -sub.cgs -subv.cgs -subx.cgs -trap.cgs -unlock.cgs -xor.cgs -xor3.cgs - -hello.ms -hw-trap.ms -uread16.ms -uread32.ms -uwrite16.ms -uwrite32.ms - -Things-to-lose: - -Do-last: - -cygnus_files="allinsn.exp misc.exp testutils.inc" -if ( echo $* | grep keep\-cygnus > /dev/null ) ; then - for i in $cygnus_files ; do - if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Keeping cygnus stuff in $i - fi - fi - done -else - for i in $cygnus_files ; do - if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then - if [ -n "${verbose}" ] ; then - echo Removing traces of \"cygnus\" from $i... - fi - cp $i new - sed '/start\-sanitize\-cygnus/,/end-\sanitize\-cygnus/d' < $i > new - if [ -n "${safe}" -a ! -f .Recover/$i ] ; then - if [ -n "${verbose}" ] ; then - echo Caching $i in .Recover... - fi - mv $i .Recover - fi - mv new $i - fi - done - # Remove cygnus from `mach'. - for i in *.cgs ; do - if [ -n "${verbose}" ] ; then - echo Removing traces of \"cygnus\" from $i... - fi - cp $i new - sed -e 's/cygnus//' < $i > new - if [ -n "${safe}" -a ! -f .Recover/$i ] ; then - if [ -n "${verbose}" ] ; then - echo Caching $i in .Recover... - fi - mv $i .Recover - fi - mv new $i - done -fi - -# End of file. diff --git a/sim/testsuite/sim/m32r/add.cgs b/sim/testsuite/sim/m32r/add.cgs deleted file mode 100644 index 8ed2b3a..0000000 --- a/sim/testsuite/sim/m32r/add.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for add $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global add -add: - - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - add r4, r5 - test_h_gr r4, 3 - - pass diff --git a/sim/testsuite/sim/m32r/add3.cgs b/sim/testsuite/sim/m32r/add3.cgs deleted file mode 100644 index d1cc848..0000000 --- a/sim/testsuite/sim/m32r/add3.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for add3 $dr,$sr,#$slo16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global add3 -add3: - - mvi_h_gr r5, 1 - add3 r4, r5, 2 - test_h_gr r4, 3 - - pass diff --git a/sim/testsuite/sim/m32r/addi.cgs b/sim/testsuite/sim/m32r/addi.cgs deleted file mode 100644 index 1448d0d..0000000 --- a/sim/testsuite/sim/m32r/addi.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for addi $dr,#$simm8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addi -addi: - - mvi_h_gr r5, 1 - addi r5, 2 - test_h_gr r5, 3 - - pass - diff --git a/sim/testsuite/sim/m32r/addv.cgs b/sim/testsuite/sim/m32r/addv.cgs deleted file mode 100644 index 6a61ccc..0000000 --- a/sim/testsuite/sim/m32r/addv.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for addv $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addv -addv: - - pass diff --git a/sim/testsuite/sim/m32r/addv3.cgs b/sim/testsuite/sim/m32r/addv3.cgs deleted file mode 100644 index 3a6c899..0000000 --- a/sim/testsuite/sim/m32r/addv3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for addv3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addv3 -addv3: - - pass diff --git a/sim/testsuite/sim/m32r/addx.cgs b/sim/testsuite/sim/m32r/addx.cgs deleted file mode 100644 index c8eb14d..0000000 --- a/sim/testsuite/sim/m32r/addx.cgs +++ /dev/null @@ -1,39 +0,0 @@ -# m32r testcase for addx $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global addx -addx: - mvi_h_condbit 1 - mvi_h_gr r4, 1 - mvi_h_gr r5, 2 - addx r4, r5 - bc not_ok - test_h_gr r4, 4 - - mvi_h_gr r4, 0xfffffffe - addx r4, r5 - bnc not_ok - test_h_gr r4, 0 - - mvi_h_gr r4, -1 - mvi_h_gr r5, -1 - mvi_h_condbit 1 - addx r4,r5 - bnc not_ok - test_h_gr r4, -1 - - mvi_h_gr r4,-1 - mvi_h_gr r5,0x7fffffff - mvi_h_condbit 1 - addx r5,r4 - bnc not_ok - test_h_gr r5,0x7fffffff - - pass - -not_ok: - fail diff --git a/sim/testsuite/sim/m32r/allinsn.exp b/sim/testsuite/sim/m32r/allinsn.exp deleted file mode 100644 index 3f63ace..0000000 --- a/sim/testsuite/sim/m32r/allinsn.exp +++ /dev/null @@ -1,22 +0,0 @@ -# M32R simulator testsuite. - -if [istarget m32r*-*-*] { - # load support procs - # load_lib cgen.exp - - # start-sanitize-m32rx - # FIXME: This should live in common place. - set opts(as,m32rx) "-m32rx --m32rx-enable-special" - # end-sanitize-m32rx - - # The .cgs suffix is for "cgen .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.cgs]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src - } -} diff --git a/sim/testsuite/sim/m32r/and.cgs b/sim/testsuite/sim/m32r/and.cgs deleted file mode 100644 index 3ec7337..0000000 --- a/sim/testsuite/sim/m32r/and.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for and $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global and -and: - - pass diff --git a/sim/testsuite/sim/m32r/and3.cgs b/sim/testsuite/sim/m32r/and3.cgs deleted file mode 100644 index c581cdd..0000000 --- a/sim/testsuite/sim/m32r/and3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for and3 $dr,$sr,#$uimm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global and3 -and3: - - pass diff --git a/sim/testsuite/sim/m32r/bc24.cgs b/sim/testsuite/sim/m32r/bc24.cgs deleted file mode 100644 index 6bb4333..0000000 --- a/sim/testsuite/sim/m32r/bc24.cgs +++ /dev/null @@ -1,24 +0,0 @@ -# m32r testcase for bc $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bc24 -bc24: - - mvi_h_condbit 0 - bc.l test0fail - bra test0pass -test0fail: - fail -test0pass: - - mvi_h_condbit 1 - bc.l test1pass - fail -test1pass: - - pass - diff --git a/sim/testsuite/sim/m32r/bc8.cgs b/sim/testsuite/sim/m32r/bc8.cgs deleted file mode 100644 index ceb622c..0000000 --- a/sim/testsuite/sim/m32r/bc8.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for bc $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bc8 -bc8: - - mvi_h_condbit 0 - bc.s test0fail - bra test0pass -test0fail: - fail -test0pass: - - mvi_h_condbit 1 - bc.s test1pass - fail -test1pass: - - pass diff --git a/sim/testsuite/sim/m32r/beq.cgs b/sim/testsuite/sim/m32r/beq.cgs deleted file mode 100644 index 90cf470..0000000 --- a/sim/testsuite/sim/m32r/beq.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for beq $src1,$src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global beq -beq: - - pass diff --git a/sim/testsuite/sim/m32r/beqz.cgs b/sim/testsuite/sim/m32r/beqz.cgs deleted file mode 100644 index 436c2fa..0000000 --- a/sim/testsuite/sim/m32r/beqz.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for beqz $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global beqz -beqz: - - pass diff --git a/sim/testsuite/sim/m32r/bgez.cgs b/sim/testsuite/sim/m32r/bgez.cgs deleted file mode 100644 index 48f90c8..0000000 --- a/sim/testsuite/sim/m32r/bgez.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bgez $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bgez -bgez: - - pass diff --git a/sim/testsuite/sim/m32r/bgtz.cgs b/sim/testsuite/sim/m32r/bgtz.cgs deleted file mode 100644 index fa534e4..0000000 --- a/sim/testsuite/sim/m32r/bgtz.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bgtz $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bgtz -bgtz: - - pass diff --git a/sim/testsuite/sim/m32r/bl24.cgs b/sim/testsuite/sim/m32r/bl24.cgs deleted file mode 100644 index f4ebcd3..0000000 --- a/sim/testsuite/sim/m32r/bl24.cgs +++ /dev/null @@ -1,19 +0,0 @@ -# m32r testcase for bl $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bl24 -bl24: - bl.l test0pass -test1fail: - fail - -test0pass: - seth r4, high (test1fail) - or3 r4, r4, low (test1fail) - bne r4, r14, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/bl8.cgs b/sim/testsuite/sim/m32r/bl8.cgs deleted file mode 100644 index ad2a649..0000000 --- a/sim/testsuite/sim/m32r/bl8.cgs +++ /dev/null @@ -1,19 +0,0 @@ -# m32r testcase for bl $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bl8 -bl8: - bl.s test0pass -test1fail: - fail - -test0pass: - seth r4, high (test1fail) - or3 r4, r4, low (test1fail) - bne r4, r14, test1fail - - pass diff --git a/sim/testsuite/sim/m32r/blez.cgs b/sim/testsuite/sim/m32r/blez.cgs deleted file mode 100644 index be512ce..0000000 --- a/sim/testsuite/sim/m32r/blez.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for blez $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global blez -blez: - - pass diff --git a/sim/testsuite/sim/m32r/bltz.cgs b/sim/testsuite/sim/m32r/bltz.cgs deleted file mode 100644 index a379e85..0000000 --- a/sim/testsuite/sim/m32r/bltz.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bltz $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bltz -bltz: - - pass diff --git a/sim/testsuite/sim/m32r/bnc24.cgs b/sim/testsuite/sim/m32r/bnc24.cgs deleted file mode 100644 index 2699c10..0000000 --- a/sim/testsuite/sim/m32r/bnc24.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bnc $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bnc24 -bnc24: - - pass diff --git a/sim/testsuite/sim/m32r/bnc8.cgs b/sim/testsuite/sim/m32r/bnc8.cgs deleted file mode 100644 index 9ed1ab1..0000000 --- a/sim/testsuite/sim/m32r/bnc8.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bnc $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bnc8 -bnc8: - - pass diff --git a/sim/testsuite/sim/m32r/bne.cgs b/sim/testsuite/sim/m32r/bne.cgs deleted file mode 100644 index 598ef54..0000000 --- a/sim/testsuite/sim/m32r/bne.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bne $src1,$src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bne -bne: - - pass diff --git a/sim/testsuite/sim/m32r/bnez.cgs b/sim/testsuite/sim/m32r/bnez.cgs deleted file mode 100644 index eb35889..0000000 --- a/sim/testsuite/sim/m32r/bnez.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bnez $src2,$disp16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bnez -bnez: - - pass diff --git a/sim/testsuite/sim/m32r/bra24.cgs b/sim/testsuite/sim/m32r/bra24.cgs deleted file mode 100644 index 3469c93..0000000 --- a/sim/testsuite/sim/m32r/bra24.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bra $disp24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bra24 -bra24: - - pass diff --git a/sim/testsuite/sim/m32r/bra8.cgs b/sim/testsuite/sim/m32r/bra8.cgs deleted file mode 100644 index 918f1d4..0000000 --- a/sim/testsuite/sim/m32r/bra8.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for bra $disp8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global bra8 -bra8: - - pass diff --git a/sim/testsuite/sim/m32r/cmp.cgs b/sim/testsuite/sim/m32r/cmp.cgs deleted file mode 100644 index 477a5b1..0000000 --- a/sim/testsuite/sim/m32r/cmp.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for cmp $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmp -cmp: - - pass diff --git a/sim/testsuite/sim/m32r/cmpi.cgs b/sim/testsuite/sim/m32r/cmpi.cgs deleted file mode 100644 index add2a43..0000000 --- a/sim/testsuite/sim/m32r/cmpi.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for cmpi $src2,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmpi -cmpi: - - pass diff --git a/sim/testsuite/sim/m32r/cmpu.cgs b/sim/testsuite/sim/m32r/cmpu.cgs deleted file mode 100644 index d959a3b..0000000 --- a/sim/testsuite/sim/m32r/cmpu.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for cmpu $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmpu -cmpu: - - pass diff --git a/sim/testsuite/sim/m32r/cmpui.cgs b/sim/testsuite/sim/m32r/cmpui.cgs deleted file mode 100644 index 760663b..0000000 --- a/sim/testsuite/sim/m32r/cmpui.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for cmpui $src2,#$uimm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global cmpui -cmpui: - - pass diff --git a/sim/testsuite/sim/m32r/div.cgs b/sim/testsuite/sim/m32r/div.cgs deleted file mode 100644 index 05fe822..0000000 --- a/sim/testsuite/sim/m32r/div.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for div $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global div -div: - - pass diff --git a/sim/testsuite/sim/m32r/divu.cgs b/sim/testsuite/sim/m32r/divu.cgs deleted file mode 100644 index 5b241dc..0000000 --- a/sim/testsuite/sim/m32r/divu.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for divu $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global divu -divu: - - pass diff --git a/sim/testsuite/sim/m32r/hello.ms b/sim/testsuite/sim/m32r/hello.ms deleted file mode 100644 index 0cd45bc..0000000 --- a/sim/testsuite/sim/m32r/hello.ms +++ /dev/null @@ -1,18 +0,0 @@ -# output: Hello world! - - .globl _start -_start: - -; write (hello world) - ldi8 r3,#14 - ld24 r2,#hello - ldi8 r1,#1 - ldi8 r0,#5 - trap #0 -; exit (0) - ldi8 r1,#0 - ldi8 r0,#1 - trap #0 - -length: .long 14 -hello: .ascii "Hello world!\r\n" diff --git a/sim/testsuite/sim/m32r/hw-trap.ms b/sim/testsuite/sim/m32r/hw-trap.ms deleted file mode 100644 index 6961e4f..0000000 --- a/sim/testsuite/sim/m32r/hw-trap.ms +++ /dev/null @@ -1,31 +0,0 @@ -# output: pass -# mach(): m32r m32rx - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#bra_insn - ld r0,@r0 - ld24 r1,#trap2_handler - addi r1,#-0x48 ; pc relative address from trap 2 slot to handler - srai r1,#2 - or r0,r1 - ld24 r2,#0x48 ; address of trap 2 slot - st r0,@r2 - -; perform trap - ldi r4,#0 - trap #2 - test_h_gr r4,42 - - pass - -; trap 2 handler -trap2_handler: - ldi r4,#42 - rte - -bra_insn: - bra.l 0 diff --git a/sim/testsuite/sim/m32r/jl.cgs b/sim/testsuite/sim/m32r/jl.cgs deleted file mode 100644 index 649a004..0000000 --- a/sim/testsuite/sim/m32r/jl.cgs +++ /dev/null @@ -1,20 +0,0 @@ -# m32r testcase for jl $sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global jl -jl: - seth r4, high (ok) - or3 r4, r4, low (ok) - jl r4 -not_ok: - fail -ok: - seth r4, high (not_ok) - or3 r4, r4, low (not_ok) - bne r4, r14, not_ok - - pass diff --git a/sim/testsuite/sim/m32r/jmp.cgs b/sim/testsuite/sim/m32r/jmp.cgs deleted file mode 100644 index 717a455..0000000 --- a/sim/testsuite/sim/m32r/jmp.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for jmp $sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global jmp -jmp: - seth r4, high (ok) - or3 r4, r4, low (ok) - jmp r4 - - fail -ok: - pass diff --git a/sim/testsuite/sim/m32r/ld-d.cgs b/sim/testsuite/sim/m32r/ld-d.cgs deleted file mode 100644 index 3ff3ff6..0000000 --- a/sim/testsuite/sim/m32r/ld-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ld $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld_d -ld_d: - - pass diff --git a/sim/testsuite/sim/m32r/ld-plus.cgs b/sim/testsuite/sim/m32r/ld-plus.cgs deleted file mode 100644 index fc6dfd2..0000000 --- a/sim/testsuite/sim/m32r/ld-plus.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ld $dr,@$sr+ -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld_plus -ld_plus: - - pass diff --git a/sim/testsuite/sim/m32r/ld.cgs b/sim/testsuite/sim/m32r/ld.cgs deleted file mode 100644 index 3471aae..0000000 --- a/sim/testsuite/sim/m32r/ld.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ld $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld -ld: - - pass diff --git a/sim/testsuite/sim/m32r/ld24.cgs b/sim/testsuite/sim/m32r/ld24.cgs deleted file mode 100644 index 2ca8273..0000000 --- a/sim/testsuite/sim/m32r/ld24.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ld24 $dr,#$uimm24 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ld24 -ld24: - - pass diff --git a/sim/testsuite/sim/m32r/ldb-d.cgs b/sim/testsuite/sim/m32r/ldb-d.cgs deleted file mode 100644 index 711bb10..0000000 --- a/sim/testsuite/sim/m32r/ldb-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldb $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldb_d -ldb_d: - - pass diff --git a/sim/testsuite/sim/m32r/ldb.cgs b/sim/testsuite/sim/m32r/ldb.cgs deleted file mode 100644 index 45245c3..0000000 --- a/sim/testsuite/sim/m32r/ldb.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldb $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldb -ldb: - - pass diff --git a/sim/testsuite/sim/m32r/ldh-d.cgs b/sim/testsuite/sim/m32r/ldh-d.cgs deleted file mode 100644 index 6b6c66f..0000000 --- a/sim/testsuite/sim/m32r/ldh-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldh $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldh_d -ldh_d: - - pass diff --git a/sim/testsuite/sim/m32r/ldh.cgs b/sim/testsuite/sim/m32r/ldh.cgs deleted file mode 100644 index 8539b37..0000000 --- a/sim/testsuite/sim/m32r/ldh.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldh $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldh -ldh: - - pass diff --git a/sim/testsuite/sim/m32r/ldi16.cgs b/sim/testsuite/sim/m32r/ldi16.cgs deleted file mode 100644 index 4f56827..0000000 --- a/sim/testsuite/sim/m32r/ldi16.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldi $dr,$slo16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldi16 -ldi16: - - pass diff --git a/sim/testsuite/sim/m32r/ldi8.cgs b/sim/testsuite/sim/m32r/ldi8.cgs deleted file mode 100644 index 11d9566..0000000 --- a/sim/testsuite/sim/m32r/ldi8.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldi $dr,#$simm8 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldi8 -ldi8: - - pass diff --git a/sim/testsuite/sim/m32r/ldub-d.cgs b/sim/testsuite/sim/m32r/ldub-d.cgs deleted file mode 100644 index e3fc03d..0000000 --- a/sim/testsuite/sim/m32r/ldub-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldub $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldub_d -ldub_d: - - pass diff --git a/sim/testsuite/sim/m32r/ldub.cgs b/sim/testsuite/sim/m32r/ldub.cgs deleted file mode 100644 index 649c311..0000000 --- a/sim/testsuite/sim/m32r/ldub.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for ldub $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global ldub -ldub: - - pass diff --git a/sim/testsuite/sim/m32r/lduh-d.cgs b/sim/testsuite/sim/m32r/lduh-d.cgs deleted file mode 100644 index 57f8e50..0000000 --- a/sim/testsuite/sim/m32r/lduh-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for lduh $dr,@($slo16,$sr) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global lduh_d -lduh_d: - - pass diff --git a/sim/testsuite/sim/m32r/lduh.cgs b/sim/testsuite/sim/m32r/lduh.cgs deleted file mode 100644 index 94061d7..0000000 --- a/sim/testsuite/sim/m32r/lduh.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for lduh $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global lduh -lduh: - - pass diff --git a/sim/testsuite/sim/m32r/lock.cgs b/sim/testsuite/sim/m32r/lock.cgs deleted file mode 100644 index 75ef76b..0000000 --- a/sim/testsuite/sim/m32r/lock.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for lock $dr,@$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global lock -lock: - - pass diff --git a/sim/testsuite/sim/m32r/machi.cgs b/sim/testsuite/sim/m32r/machi.cgs deleted file mode 100644 index 2e2ef00..0000000 --- a/sim/testsuite/sim/m32r/machi.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for machi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global machi -machi: - - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x10123 - mvi_h_gr r5, 0x20456 - machi r4, r5 - test_h_accum0 0, 0x20001 - - pass diff --git a/sim/testsuite/sim/m32r/maclo.cgs b/sim/testsuite/sim/m32r/maclo.cgs deleted file mode 100644 index 5d03539..0000000 --- a/sim/testsuite/sim/m32r/maclo.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for maclo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global maclo -maclo: - - mvi_h_accum0 0, 1 - mvi_h_gr r4, 0x1230001 - mvi_h_gr r5, 0x4560002 - maclo r4, r5 - test_h_accum0 0, 0x20001 - - pass diff --git a/sim/testsuite/sim/m32r/macwhi.cgs b/sim/testsuite/sim/m32r/macwhi.cgs deleted file mode 100644 index 76a596d..0000000 --- a/sim/testsuite/sim/m32r/macwhi.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for macwhi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global macwhi -macwhi: - - pass diff --git a/sim/testsuite/sim/m32r/macwlo.cgs b/sim/testsuite/sim/m32r/macwlo.cgs deleted file mode 100644 index f1092a5..0000000 --- a/sim/testsuite/sim/m32r/macwlo.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for macwlo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global macwlo -macwlo: - - pass diff --git a/sim/testsuite/sim/m32r/misc.exp b/sim/testsuite/sim/m32r/misc.exp deleted file mode 100644 index 38fe0a1..0000000 --- a/sim/testsuite/sim/m32r/misc.exp +++ /dev/null @@ -1,22 +0,0 @@ -# Miscellaneous M32R simulator testcases - -if [istarget m32r*-*-*] { - # load support procs - # load_lib cgen.exp - - # start-sanitize-m32rx - # FIXME: This should live in common place. - set opts(as,m32rx) "-m32rx --m32rx-enable-special" - # end-sanitize-m32rx - - # The .ms suffix is for "miscellaneous .s". - foreach src [lsort [glob -nocomplain $srcdir/$subdir/*.ms]] { - # If we're only testing specific files and this isn't one of them, - # skip it. - if ![runtest_file_p $runtests $src] { - continue - } - - run_sim_test $src - } -} diff --git a/sim/testsuite/sim/m32r/mul.cgs b/sim/testsuite/sim/m32r/mul.cgs deleted file mode 100644 index 7e0ccc0..0000000 --- a/sim/testsuite/sim/m32r/mul.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mul $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mul -mul: - - pass diff --git a/sim/testsuite/sim/m32r/mulhi.cgs b/sim/testsuite/sim/m32r/mulhi.cgs deleted file mode 100644 index 77c103d..0000000 --- a/sim/testsuite/sim/m32r/mulhi.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for mulhi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mulhi -mulhi: - - mvi_h_gr r4, 0x40000 - mvi_h_gr r5, 0x50000 - mulhi r4, r5 - test_h_accum0 0, 0x140000 - - pass diff --git a/sim/testsuite/sim/m32r/mullo.cgs b/sim/testsuite/sim/m32r/mullo.cgs deleted file mode 100644 index 11aadff..0000000 --- a/sim/testsuite/sim/m32r/mullo.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for mullo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mullo -mullo: - - mvi_h_gr r4, 4 - mvi_h_gr r5, 5 - mullo r4, r5 - test_h_accum0 0, 0x140000 - - pass diff --git a/sim/testsuite/sim/m32r/mulwhi.cgs b/sim/testsuite/sim/m32r/mulwhi.cgs deleted file mode 100644 index 766afca..0000000 --- a/sim/testsuite/sim/m32r/mulwhi.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mulwhi $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mulwhi -mulwhi: - - pass diff --git a/sim/testsuite/sim/m32r/mulwlo.cgs b/sim/testsuite/sim/m32r/mulwlo.cgs deleted file mode 100644 index 6bd267d..0000000 --- a/sim/testsuite/sim/m32r/mulwlo.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mulwlo $src1,$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mulwlo -mulwlo: - - pass diff --git a/sim/testsuite/sim/m32r/mv.cgs b/sim/testsuite/sim/m32r/mv.cgs deleted file mode 100644 index b14cbe3..0000000 --- a/sim/testsuite/sim/m32r/mv.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mv $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mv -mv: - - pass diff --git a/sim/testsuite/sim/m32r/mvfachi.cgs b/sim/testsuite/sim/m32r/mvfachi.cgs deleted file mode 100644 index 380e37b..0000000 --- a/sim/testsuite/sim/m32r/mvfachi.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mvfachi $dr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfachi -mvfachi: - - pass diff --git a/sim/testsuite/sim/m32r/mvfaclo.cgs b/sim/testsuite/sim/m32r/mvfaclo.cgs deleted file mode 100644 index 0e05cf0..0000000 --- a/sim/testsuite/sim/m32r/mvfaclo.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mvfaclo $dr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfaclo -mvfaclo: - - pass diff --git a/sim/testsuite/sim/m32r/mvfacmi.cgs b/sim/testsuite/sim/m32r/mvfacmi.cgs deleted file mode 100644 index 580bcae..0000000 --- a/sim/testsuite/sim/m32r/mvfacmi.cgs +++ /dev/null @@ -1,15 +0,0 @@ -# m32r testcase for mvfacmi $dr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfacmi -mvfacmi: - - mvi_h_accum0 0x12345678, 0x87654321 - mvfacmi r4 - test_h_gr r4, 0x56788765 - - pass diff --git a/sim/testsuite/sim/m32r/mvfc.cgs b/sim/testsuite/sim/m32r/mvfc.cgs deleted file mode 100644 index 0c160d9..0000000 --- a/sim/testsuite/sim/m32r/mvfc.cgs +++ /dev/null @@ -1,17 +0,0 @@ -# m32r testcase for mvfc $dr,$scr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvfc -mvfc: - mvi_h_condbit 0 - mvi_h_gr r4, 2 - - mvfc r4, cr1 - - test_h_gr r4, 0x80000000 - - pass diff --git a/sim/testsuite/sim/m32r/mvtachi.cgs b/sim/testsuite/sim/m32r/mvtachi.cgs deleted file mode 100644 index 827dc10..0000000 --- a/sim/testsuite/sim/m32r/mvtachi.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mvtachi $src1 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvtachi -mvtachi: - - pass diff --git a/sim/testsuite/sim/m32r/mvtaclo.cgs b/sim/testsuite/sim/m32r/mvtaclo.cgs deleted file mode 100644 index 5f628f3..0000000 --- a/sim/testsuite/sim/m32r/mvtaclo.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mvtaclo $src1 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvtaclo -mvtaclo: - - pass diff --git a/sim/testsuite/sim/m32r/mvtc.cgs b/sim/testsuite/sim/m32r/mvtc.cgs deleted file mode 100644 index 9d824c9..0000000 --- a/sim/testsuite/sim/m32r/mvtc.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for mvtc $sr,$dcr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global mvtc -mvtc: - - pass diff --git a/sim/testsuite/sim/m32r/neg.cgs b/sim/testsuite/sim/m32r/neg.cgs deleted file mode 100644 index 52bb44c..0000000 --- a/sim/testsuite/sim/m32r/neg.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for neg $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global neg -neg: - - pass diff --git a/sim/testsuite/sim/m32r/nop.cgs b/sim/testsuite/sim/m32r/nop.cgs deleted file mode 100644 index 517d34d..0000000 --- a/sim/testsuite/sim/m32r/nop.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for nop -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global nop -nop: - - pass diff --git a/sim/testsuite/sim/m32r/not.cgs b/sim/testsuite/sim/m32r/not.cgs deleted file mode 100644 index 358dac5..0000000 --- a/sim/testsuite/sim/m32r/not.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for not $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global not -not: - - pass diff --git a/sim/testsuite/sim/m32r/or.cgs b/sim/testsuite/sim/m32r/or.cgs deleted file mode 100644 index afa629b..0000000 --- a/sim/testsuite/sim/m32r/or.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for or $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global or -or: - - pass diff --git a/sim/testsuite/sim/m32r/or3.cgs b/sim/testsuite/sim/m32r/or3.cgs deleted file mode 100644 index 200907a..0000000 --- a/sim/testsuite/sim/m32r/or3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for or3 $dr,$sr,#$ulo16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global or3 -or3: - - pass diff --git a/sim/testsuite/sim/m32r/rac.cgs b/sim/testsuite/sim/m32r/rac.cgs deleted file mode 100644 index 35b9ae3..0000000 --- a/sim/testsuite/sim/m32r/rac.cgs +++ /dev/null @@ -1,23 +0,0 @@ -# m32r testcase for rac -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rac -rac: - - mvi_h_accum0 1, 0x4001 - rac - test_h_accum0 2, 0x10000 - - mvi_h_accum0 0x3fff, 0xffff4000 - rac - test_h_accum0 0x7fff, 0xffff0000 - - mvi_h_accum0 0xffff8000, 0 - rac - test_h_accum0 0xffff8000, 0 - - pass diff --git a/sim/testsuite/sim/m32r/rach.cgs b/sim/testsuite/sim/m32r/rach.cgs deleted file mode 100644 index efc36d8..0000000 --- a/sim/testsuite/sim/m32r/rach.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for rach -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rach -rach: - - pass diff --git a/sim/testsuite/sim/m32r/rem.cgs b/sim/testsuite/sim/m32r/rem.cgs deleted file mode 100644 index f9416c8..0000000 --- a/sim/testsuite/sim/m32r/rem.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for rem $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rem -rem: - - pass diff --git a/sim/testsuite/sim/m32r/remu.cgs b/sim/testsuite/sim/m32r/remu.cgs deleted file mode 100644 index 9098ca6..0000000 --- a/sim/testsuite/sim/m32r/remu.cgs +++ /dev/null @@ -1,18 +0,0 @@ -# m32r testcase for remu $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global remu -remu: - mvi_h_gr r4, -17 - mvi_h_gr r5, 7 - - remu r4, r5 - - test_h_gr r4, 4 -; test_h_gr r4, -3 - - pass diff --git a/sim/testsuite/sim/m32r/rte.cgs b/sim/testsuite/sim/m32r/rte.cgs deleted file mode 100644 index c431e07..0000000 --- a/sim/testsuite/sim/m32r/rte.cgs +++ /dev/null @@ -1,22 +0,0 @@ -# m32r testcase for rte -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global rte -rte: - mvi_h_gr r4, 0x80030000 ; C set, interrupt disabled, using interrupt stack - mvtc r4, cr0 - - mvaddr_h_gr r4, ok - mvtc r4, cr6 - -; rte - fail -ok: - mvfc r4, cr0 - test_h_gr r4, 0x03030000 ; C clear, interrupts enabled, user stack - - pass diff --git a/sim/testsuite/sim/m32r/seth.cgs b/sim/testsuite/sim/m32r/seth.cgs deleted file mode 100644 index bfe57c0..0000000 --- a/sim/testsuite/sim/m32r/seth.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for seth $dr,#$hi16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global seth -seth: - - pass diff --git a/sim/testsuite/sim/m32r/sll.cgs b/sim/testsuite/sim/m32r/sll.cgs deleted file mode 100644 index 492032a..0000000 --- a/sim/testsuite/sim/m32r/sll.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sll $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sll -sll: - - pass diff --git a/sim/testsuite/sim/m32r/sll3.cgs b/sim/testsuite/sim/m32r/sll3.cgs deleted file mode 100644 index 6d2747c..0000000 --- a/sim/testsuite/sim/m32r/sll3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sll3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sll3 -sll3: - - pass diff --git a/sim/testsuite/sim/m32r/slli.cgs b/sim/testsuite/sim/m32r/slli.cgs deleted file mode 100644 index 600d27a..0000000 --- a/sim/testsuite/sim/m32r/slli.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for slli $dr,#$uimm5 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global slli -slli: - - pass diff --git a/sim/testsuite/sim/m32r/sra.cgs b/sim/testsuite/sim/m32r/sra.cgs deleted file mode 100644 index 3c72199..0000000 --- a/sim/testsuite/sim/m32r/sra.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sra $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sra -sra: - - pass diff --git a/sim/testsuite/sim/m32r/sra3.cgs b/sim/testsuite/sim/m32r/sra3.cgs deleted file mode 100644 index 837258d..0000000 --- a/sim/testsuite/sim/m32r/sra3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sra3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sra3 -sra3: - - pass diff --git a/sim/testsuite/sim/m32r/srai.cgs b/sim/testsuite/sim/m32r/srai.cgs deleted file mode 100644 index 603c5b7..0000000 --- a/sim/testsuite/sim/m32r/srai.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for srai $dr,#$uimm5 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srai -srai: - - pass diff --git a/sim/testsuite/sim/m32r/srl.cgs b/sim/testsuite/sim/m32r/srl.cgs deleted file mode 100644 index ccbf460..0000000 --- a/sim/testsuite/sim/m32r/srl.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for srl $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srl -srl: - - pass diff --git a/sim/testsuite/sim/m32r/srl3.cgs b/sim/testsuite/sim/m32r/srl3.cgs deleted file mode 100644 index d26f571..0000000 --- a/sim/testsuite/sim/m32r/srl3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for srl3 $dr,$sr,#$simm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srl3 -srl3: - - pass diff --git a/sim/testsuite/sim/m32r/srli.cgs b/sim/testsuite/sim/m32r/srli.cgs deleted file mode 100644 index 5ce6d07..0000000 --- a/sim/testsuite/sim/m32r/srli.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for srli $dr,#$uimm5 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global srli -srli: - - pass diff --git a/sim/testsuite/sim/m32r/st-d.cgs b/sim/testsuite/sim/m32r/st-d.cgs deleted file mode 100644 index 29e1066..0000000 --- a/sim/testsuite/sim/m32r/st-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for st $src1,@($slo16,$src2) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st_d -st_d: - - pass diff --git a/sim/testsuite/sim/m32r/st-minus.cgs b/sim/testsuite/sim/m32r/st-minus.cgs deleted file mode 100644 index 1aed708..0000000 --- a/sim/testsuite/sim/m32r/st-minus.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for st $src1,@-$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st_minus -st_minus: - - pass diff --git a/sim/testsuite/sim/m32r/st-plus.cgs b/sim/testsuite/sim/m32r/st-plus.cgs deleted file mode 100644 index 00539d7..0000000 --- a/sim/testsuite/sim/m32r/st-plus.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for st $src1,@+$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st_plus -st_plus: - - pass diff --git a/sim/testsuite/sim/m32r/st.cgs b/sim/testsuite/sim/m32r/st.cgs deleted file mode 100644 index cd2d9c5..0000000 --- a/sim/testsuite/sim/m32r/st.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for st $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global st -st: - - pass diff --git a/sim/testsuite/sim/m32r/stb-d.cgs b/sim/testsuite/sim/m32r/stb-d.cgs deleted file mode 100644 index 533ccf0..0000000 --- a/sim/testsuite/sim/m32r/stb-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for stb $src1,@($slo16,$src2) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global stb_d -stb_d: - - pass diff --git a/sim/testsuite/sim/m32r/stb.cgs b/sim/testsuite/sim/m32r/stb.cgs deleted file mode 100644 index 2b5dff1..0000000 --- a/sim/testsuite/sim/m32r/stb.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for stb $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global stb -stb: - - pass diff --git a/sim/testsuite/sim/m32r/sth-d.cgs b/sim/testsuite/sim/m32r/sth-d.cgs deleted file mode 100644 index 14a4711..0000000 --- a/sim/testsuite/sim/m32r/sth-d.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sth $src1,@($slo16,$src2) -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sth_d -sth_d: - - pass diff --git a/sim/testsuite/sim/m32r/sth.cgs b/sim/testsuite/sim/m32r/sth.cgs deleted file mode 100644 index d0dd43d..0000000 --- a/sim/testsuite/sim/m32r/sth.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sth $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sth -sth: - - pass diff --git a/sim/testsuite/sim/m32r/sub.cgs b/sim/testsuite/sim/m32r/sub.cgs deleted file mode 100644 index 8dbe6b8..0000000 --- a/sim/testsuite/sim/m32r/sub.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for sub $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global sub -sub: - - pass diff --git a/sim/testsuite/sim/m32r/subv.cgs b/sim/testsuite/sim/m32r/subv.cgs deleted file mode 100644 index 4a46fb5..0000000 --- a/sim/testsuite/sim/m32r/subv.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for subv $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global subv -subv: - - pass diff --git a/sim/testsuite/sim/m32r/subx.cgs b/sim/testsuite/sim/m32r/subx.cgs deleted file mode 100644 index 597373a..0000000 --- a/sim/testsuite/sim/m32r/subx.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for subx $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global subx -subx: - - pass diff --git a/sim/testsuite/sim/m32r/testutils.inc b/sim/testsuite/sim/m32r/testutils.inc deleted file mode 100644 index 24d925e..0000000 --- a/sim/testsuite/sim/m32r/testutils.inc +++ /dev/null @@ -1,105 +0,0 @@ -# r0-r3 are used as tmps, consider them call clobbered by these macros. - - .macro start - .data -failmsg: - .ascii "fail\n" -passmsg: - .ascii "pass\n" - .text - .global _start -_start: - .endm - - .macro exit rc - ldi8 r1, \rc - ldi8 r0, #1 - trap #0 - .endm - - .macro pass - ldi8 r3, 5 - ld24 r2, passmsg - ldi8 r1, 1 - ldi8 r0, 5 - trap #0 - exit 0 - .endm - - .macro fail - ldi8 r3, 5 - ld24 r2, failmsg - ldi8 r1, 1 - ldi8 r0, 5 - trap #0 - exit 1 - .endm - - .macro mvi_h_gr reg, val - .if (\val >= -128) && (\val <= 127) - ldi8 \reg, \val - .else - seth \reg, high(\val) - or3 \reg, \reg, low(\val) - .endif - .endm - -# Other macros know this only clobbers r0. - .macro test_h_gr reg, val - mvi_h_gr r0, \val - beq \reg, r0, test_gr\@ - fail -test_gr\@: - .endm - - .macro mvi_h_condbit val - ldi8 r0, 0 - ldi8 r1, 1 - .if \val - cmp r0, r1 - .else - cmp r1, r0 - .endif - .endm - - .macro test_h_condbit val - .if \val - bc test_c1\@ - fail -test_c1\@: - .else - bnc test_c0\@ - fail -test_c0\@: - .endif - .endm - - .macro mvi_h_accum0 hi, lo - mvi_h_gr r0, \hi - mvtachi r0 - mvi_h_gr r0, \lo - mvtaclo r0 - .endm - - .macro test_h_accum0 hi, lo - mvfachi r1 - test_h_gr r1, \hi - mvfaclo r1 - test_h_gr r1, \lo - .endm - -# start-sanitize-m32rx - .macro mvi_h_accum1 hi, lo - mvi_h_gr r0, \hi - mvtachi r0, a1 - mvi_h_gr r0, \lo - mvtaclo r0, a1 - .endm - - .macro test_h_accum1 hi, lo - mvfachi r1, a1 - test_h_gr r1, \hi - mvfaclo r1, a1 - test_h_gr r1, \lo - .endm -# end-sanitize-m32rx diff --git a/sim/testsuite/sim/m32r/trap.cgs b/sim/testsuite/sim/m32r/trap.cgs deleted file mode 100644 index 386fe7f..0000000 --- a/sim/testsuite/sim/m32r/trap.cgs +++ /dev/null @@ -1,30 +0,0 @@ -# m32r testcase for trap #$uimm4 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global trap -trap: - -; Create a trap 2 handler and call it. - - ld24 r0,#0x48 ; address of trap 2 handler - ld24 r1,#trap2_handler - addi r0,#-4 ; adjust for pre-increment stores - ld r2,@r1+ - st r2,@+r0 - ld r2,@r1+ - st r2,@+r0 - trap #2 - - fail - -trap2_ok: - pass - - .data -trap2_handler: - ld24 r0,#trap2_ok - jmp r0 diff --git a/sim/testsuite/sim/m32r/unlock.cgs b/sim/testsuite/sim/m32r/unlock.cgs deleted file mode 100644 index 8040c3d..0000000 --- a/sim/testsuite/sim/m32r/unlock.cgs +++ /dev/null @@ -1,27 +0,0 @@ -# m32r testcase for unlock $src1,@$src2 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global unlock -unlock: - mvaddr_h_gr r4, data_loc - mvi_h_gr r5, 1 - - lock r5, @r4 - - mvi_h_gr r5, 0 - unlock r5, @r4 - - test_h_gr r5, 1 - - mvi_h_gr r5, 0 - unlock r5, @r4 ; This should be a nop since the processor should be unlocked. - - test_h_gr r5, 0 - pass - -data_loc: - .word 0 diff --git a/sim/testsuite/sim/m32r/uread16.ms b/sim/testsuite/sim/m32r/uread16.ms deleted file mode 100644 index 550e99a..0000000 --- a/sim/testsuite/sim/m32r/uread16.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned read* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - ldh r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .short 42 diff --git a/sim/testsuite/sim/m32r/uread32.ms b/sim/testsuite/sim/m32r/uread32.ms deleted file mode 100644 index 935c716..0000000 --- a/sim/testsuite/sim/m32r/uread32.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned read* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - ld r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .word 42 diff --git a/sim/testsuite/sim/m32r/uwrite16.ms b/sim/testsuite/sim/m32r/uwrite16.ms deleted file mode 100644 index 11bfd6e..0000000 --- a/sim/testsuite/sim/m32r/uwrite16.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned write* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - sth r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .short 42 diff --git a/sim/testsuite/sim/m32r/uwrite32.ms b/sim/testsuite/sim/m32r/uwrite32.ms deleted file mode 100644 index 495a123..0000000 --- a/sim/testsuite/sim/m32r/uwrite32.ms +++ /dev/null @@ -1,18 +0,0 @@ -# mach: m32r m32rx -# xerror: -# output: *misaligned write* - - .include "testutils.inc" - - start - -; construct bra trap2_handler in trap 2 slot - ld24 r0,#foo+1 - st r0,@r0 - fail - exit 0 - -.data - .p2align 2 -foo: - .word 42 diff --git a/sim/testsuite/sim/m32r/xor.cgs b/sim/testsuite/sim/m32r/xor.cgs deleted file mode 100644 index c554681..0000000 --- a/sim/testsuite/sim/m32r/xor.cgs +++ /dev/null @@ -1,16 +0,0 @@ -# m32r testcase for xor $dr,$sr -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global xor -xor: - - mvi_h_gr r4, 3 - mvi_h_gr r5, 6 - xor r4, r5 - test_h_gr r4, 5 - - pass diff --git a/sim/testsuite/sim/m32r/xor3.cgs b/sim/testsuite/sim/m32r/xor3.cgs deleted file mode 100644 index 7e1879e..0000000 --- a/sim/testsuite/sim/m32r/xor3.cgs +++ /dev/null @@ -1,11 +0,0 @@ -# m32r testcase for xor3 $dr,$sr,#$uimm16 -# mach(): m32r m32rx - - .include "testutils.inc" - - start - - .global xor3 -xor3: - - pass diff --git a/sim/testsuite/tic80-coff/Makefile.in b/sim/testsuite/tic80-coff/Makefile.in deleted file mode 100644 index d2cb56b..0000000 --- a/sim/testsuite/tic80-coff/Makefile.in +++ /dev/null @@ -1,179 +0,0 @@ -# Makefile for regression testing the GNU debugger. -# Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc. - -# This file is part of GDB. - -# GDB is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. - 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For more information, check -dnl any existing configure script. - -AC_PREREQ(2.5) -dnl FIXME - think of a truly uniq file to this directory -AC_INIT(Makefile.in) - -CC=${CC-cc} -AC_SUBST(CC) -AC_CONFIG_AUX_DIR(`cd $srcdir;pwd`/../../..) -AC_CANONICAL_SYSTEM - -AC_SUBST(target_cpu) - - -AC_OUTPUT(Makefile) diff --git a/sim/testsuite/tic80-coff/exit47.s b/sim/testsuite/tic80-coff/exit47.s deleted file mode 100644 index b87cd2a..0000000 --- a/sim/testsuite/tic80-coff/exit47.s +++ /dev/null @@ -1,5 +0,0 @@ -.globl __start -__start: - addu 47, r0, r2 - addu 1, r0, r15 - trap 72 diff --git a/sim/testsuite/tic80-coff/hello.s b/sim/testsuite/tic80-coff/hello.s deleted file mode 100644 index 1891fd2..0000000 --- a/sim/testsuite/tic80-coff/hello.s +++ /dev/null @@ -1,16 +0,0 @@ - .globl __start -__start: -# write (hello world) - addu 4, r0, r15 - addu 1, r0, r2 - addu hello, r0, r4 - ld length(r0), r6 -# addu 12, r0, r5 - trap 72 -# exit (0) - addu 1, r0, r15 - addu 0, r0, r2 - trap 72 - -length: .long 14 -hello: .ascii "Hello World!\r\n" diff --git a/sim/testsuite/tic80-coff/loop.s b/sim/testsuite/tic80-coff/loop.s deleted file mode 100644 index 3e8b946..0000000 --- a/sim/testsuite/tic80-coff/loop.s +++ /dev/null @@ -1,2 +0,0 @@ - .globl __start -__start: br.a __start diff --git a/sim/testsuite/tic80-coff/t-shift.s b/sim/testsuite/tic80-coff/t-shift.s deleted file mode 100644 index 9f25fa1..0000000 --- a/sim/testsuite/tic80-coff/t-shift.s +++ /dev/null @@ -1,562 +0,0 @@ -; Test program to tic80 alu operations -; compile with tic80-coff-gcc -nostartfiles -nostdlib - - .macro write string - .section .const -1: .ascii "\string\n" -2: - .section .text - addu 1,r0,r2 ; filedes - addu 1b,r0,r4 ; string - addu 2b-1b,r0,r6 ; length - addu 4,r0,r15 ; write system call # - trap 72 - .endm - - .macro expect reg, value, string - xor \value,\reg,r19 ; produces r19 == 0 if matches expected value - bcnd.a 3f,r19,eq0.w - .section .const -1: .ascii "Expected \value for \string\n" -2: - .section .text - addu 1,r0,r2 ; filedes - addu 1b,r0,r4 ; string - addu 2b-1b,r0,r6 ; length - addu 4,r0,r15 ; write system call # - trap 72 - - ld _errors(r0),r19 - addu 1,r19,r19 - st _errors(r0),r19 -3: - .endm - - .globl __start - .globl _errors - .data -_errors: - .long 0 - - .text - -__start: - write "Test add" - addu 0x12345678,r0,r7 - addu 0x12345678,r0,r8 - add r7,r8,r9 - expect r9,0x2468acf0,"add #1" - - addu 0x54545478,r0,r8 - add 0x0001,r8,r9 - expect r9,0x54545479,"add #2" - - addu 0x12345678,r0,r8 - add 0x12345678,r8,r9 - expect r9,0x2468acf0,"add #3" - -; This will cause overflow -; add 0x789abcde,r8,r9 -; expect r9,0x8acf1356,"add #4" - - write "Test addu" - addu 0x12345678,r0,r7 - addu 0x12345678,r0,r8 - addu r7,r8,r9 - expect r9,0x2468acf0,"addu #1" - - addu 0x54545478,r0,r8 - addu 0x0001,r8,r9 - expect r9,0x54545479,"addu #2" - - addu 0x12345678,r0,r8 - addu 0x12345678,r8,r9 - expect r9,0x2468acf0,"addu #3" - - addu 0x789abcde,r8,r9 - expect r9,0x8acf1356,"addu #4" - - write "Test and" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - and r7,r8,r9 - expect r9,0x8,"and #1" - - and 0x7fff,r8,r9 - expect r9,0x5678,"add #2" - - and 0xff0000ff,r8,r9 - expect r9,0x12000078,"add #3" - - write "Test and.tt" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - and.tt r7,r8,r9 - expect r9,0x8,"and.tt #1" - - and.tt 0x7fff,r8,r9 - expect r9,0x5678,"add.tt #2" - - and.tt 0xff0000ff,r8,r9 - expect r9,0x12000078,"add.tt #3" - - write "Test and.ff" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - and.ff r7,r8,r9 - expect r9,0xedcba980,"and.ff #1" - - and.ff 0x7fff,r8,r9 - expect r9,0xedcb8000,"add.ff #2" - - and.ff 0xff0000ff,r8,r9 - expect r9,0x00cba900,"add.ff #3" - - write "Test and.ft" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - and.ft r7,r8,r9 - expect r9,0x12345670,"and.ft #1" - - and.ft 0x7fff,r8,r9 - expect r9,0x12340000,"add.ft #2" - - and.ft 0xff0000ff,r8,r9 - expect r9,0x00345600,"add.ft #3" - - write "Test and.tf" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - and.tf r7,r8,r9 - expect r9,0x7,"and.tf #1" - - and.tf 0x7fff,r8,r9 - expect r9,0x2987,"add.tf #2" - - and.tf 0xff0000ff,r8,r9 - expect r9,0xed000087,"add.tf #3" - - write "Test cmp" - addu 0x12345678,r0,r7 - addu 0x54545478,r0,r8 - cmp r7,r8,r9 - expect r9,0x19a99aa9,"cmp #1" - - cmp 0xd3c4,r8,r9 - expect r9,0x19a96a5a,"cmp #2" - - cmp 0x54545478,r7,r9 - expect r9,0x26666aa9,"cmp #3" - - cmp 0x13c4,r8,r9 - expect r9,0x19a66a5a,"cmp #4" - - write "Test exts" - addu 5,r0,r4 - addu 8,r0,r5 - addu 0x10203040,r0,r7 - exts 5,8,r7,r9 - expect r9,0xffffff82,"exts #1" - - exts r4,8,r7,r9 - expect r9,0xffffff82,"exts #2" - - addu 0x0f0e0d0c,r0,r9 - exts 5,8,r9,r7 - expect r7,0x00000068,"exts #3" - - exts r4,8,r9,r7 - expect r7,0x00000068,"exts #4" - - write "Test extu" - addu 5,r0,r4 - addu 8,r0,r5 - addu 0x10203040,r0,r7 - extu 5,8,r7,r9 - expect r9,0x00000082,"extu #1" - - extu r4,8,r7,r9 - expect r9,0x00000082,"extu #2" - - addu 0x0f0e0d0c,r0,r9 - extu 5,8,r9,r7 - expect r7,0x00000068,"extu #3" - - extu r4,8,r9,r7 - expect r7,0x00000068,"extu #4" - - write "Test ins" - addu 4,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - ins 4,11,r7,r9 - expect r9,0xfedcbe78,"ins #1" - - addu 0xfedcba98,r0,r9 - ins r4,11,r7,r9 - expect r9,0xfedcbe78,"ins #2" - - addu 0xfedcba98,r0,r9 - ins 4,11,r9,r7 - expect r7,0x01234187,"ins #3" - - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - ins r4,11,r9,r7 - expect r7,0x01234187,"ins #4" - - write "Test lmo" - addu 0x0089abc,r0,r7 - lmo r7,r9 - expect r9,0xc,"lmo #1" - - lmo r0,r9 - expect r9,32,"lmo #2" - - write "Test nop" - nop - - write "Test or" - addu 0x0000000f,r0,r7 - addu 0x12345678,r0,r8 - or r7,r8,r9 - expect r9,0x1234567f,"or #1" - - or 0x7fff,r8,r9 - expect r9,0x12347fff,"or #2" - - or 0xff0000ff,r8,r9 - expect r9,0xff3456ff,"or #3" - - write "Test or.tt" - addu 0x0000000f,r0,r7 - addu 0x12345678,r0,r8 - or.tt r7,r8,r9 - expect r9,0x1234567f,"or.tt #1" - - or.tt 0x7fff,r8,r9 - expect r9,0x12347fff,"or.tt #2" - - or.tt 0xff0000ff,r8,r9 - expect r9,0xff3456ff,"or.tt #3" - - write "Test or.ff" - addu 0x0000000f,r0,r7 - addu 0x12345678,r0,r8 - or.ff r7,r8,r9 - expect r9,0xfffffff7,"or.ff #1" - - or.ff 0x7fff,r8,r9 - expect r9,0xffffa987,"or.ff #2" - - or.ff 0xff0000ff,r8,r9 - expect r9,0xedffff87,"or.ff #3" - - write "Test or.ft" - addu 0x0000000f,r0,r7 - addu 0x12345678,r0,r8 - or.ft r7,r8,r9 - expect r9,0xfffffff8,"or.ft #1" - - or.ft 0x7fff,r8,r9 - expect r9,0xffffd678,"or.ft #2" - - or.ft 0xff0000ff,r8,r9 - expect r9,0x12ffff78,"or.ft #3" - - write "Test or.tf" - addu 0x0000000f,r0,r7 - addu 0x12345678,r0,r8 - or.tf r7,r8,r9 - expect r9,0xedcba98f,"or.tf #1" - - or.tf 0x7fff,r8,r9 - expect r9,0xedcbffff,"or.tf #2" - - or.tf 0xff0000ff,r8,r9 - expect r9,0xffcba9ff,"or.tf #3" - - write "Test rmo" - addu 0xdcba9800,r0,r7 - rmo r7,r9 - expect r9,0x14,"rmo #1" - - rmo r0,r9 - expect r9,32,"rmo #2" - - write "Test rotl" - addu 27,r0,r4 - addu 0x1234567,r0,r7 - rotl 27,32,r7,r9 - expect r9,0x38091a2b,"rotl #1" - - rotl r4,32,r7,r9 - expect r9,0x38091a2b,"rotl #2" - - write "Test rotr" - addu 5,r0,r4 - addu 0x1234567,r0,r7 - rotr 5,32,r7,r9 - expect r9,0x38091a2b,"rotr #1" - - rotr r4,32,r7,r9 - expect r9,0x38091a2b,"rotr #2" - - write "Test shl" - addu 5,r0,r4 - addu 0x1234567,r0,r7 - shl 5,32,r7,r9 - expect r9,0x2468ace0,"shl #1" - - shl r4,32,r7,r9 - expect r9,0x2468ace0,"shl #2" - - write "Test sl" - addu 4,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sl.im 4,11,r7,r9 - expect r9,0xfedcbe78,"sl #1" - - addu 0xfedcba98,r0,r9 - sl.im r4,11,r7,r9 - expect r9,0xfedcbe78,"sl #2" - - addu 0xfedcba98,r0,r9 - sl.im 4,11,r9,r7 - expect r7,0x01234187,"sl #3" - - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sl.im r4,11,r9,r7 - expect r7,0x01234187,"sl #4" - - addu 27,r0,r4 - addu 0x1234567,r0,r7 - sl.dz 27,32,r7,r9 - expect r9,0x38091a2b,"sl #5" - - sl.dz r4,32,r7,r9 - expect r9,0x38091a2b,"sl #6" - - addu 5,r0,r4 - addu 0x1234567,r0,r7 - sl.iz 5,32,r7,r9 - expect r9,0x2468ace0,"sl #7" - - sl.iz r4,32,r7,r9 - expect r9,0x2468ace0,"sl #8" - - write "Test sli" - addu 4,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sli.im 4,11,r7,r9 - expect r9,0x12345298,"sli #1" - - addu 0xfedcba98,r0,r9 - sli.im r4,11,r7,r9 - expect r9,0x12345298,"sli #2" - - addu 0xfedcba98,r0,r9 - sli.im 4,11,r9,r7 - expect r7,0xedcbad67,"sli #3" - - addu 0x1234567,r0,r7 - sli.im r4,11,r9,r7 - expect r7,0xedcbad67,"sli #4" - - write "Test sr" - addu 5,r0,r4 - addu 0x1234567,r0,r7 - sr.dz 5,32,r7,r9 - expect r9,0x38091a2b,"sr #1" - - sr.dz r4,32,r7,r9 - expect r9,0x38091a2b,"sr #2" - - addu 5,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sr.es 5,32,r7,r9 - expect r9,0x00091a2b,"sr #3" - - sr.es r4,32,r7,r9 - expect r9,0x00091a2b,"sr #4" - - addu 0xfedcba98,r0,r9 - sr.es 5,32,r9,r7 - expect r7,0xfff6e5d4,"sr #5" - - addu 0x1234567,r0,r7 - sr.es r4,32,r9,r7 - expect r7,0xfff6e5d4,"sr #6" - - addu 5,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sr.ez 5,32,r7,r9 - expect r9,0x00091a2b,"sr #7" - - sr.ez r4,32,r7,r9 - expect r9,0x00091a2b,"sr #8" - - addu 0xfedcba98,r0,r9 - sr.ez 5,32,r9,r7 - expect r7,0x07f6e5d4,"sr #9" - - addu 0x1234567,r0,r7 - sr.ez r4,32,r9,r7 - expect r7,0x07f6e5d4,"sr #10" - - addu 5,r0,r4 - addu 8,r0,r5 - addu 0x10203040,r0,r7 - sr.ds 5,8,r7,r9 - expect r9,0xffffff82,"sr #11" - - sr.ds r4,8,r7,r9 - expect r9,0xffffff82,"sr #12" - - addu 0x0f0e0d0c,r0,r9 - sr.ds 5,8,r9,r7 - expect r7,0x00000068,"sr #13" - - sr.ds r4,8,r9,r7 - expect r7,0x00000068,"sr #14" - - addu 5,r0,r4 - addu 8,r0,r5 - addu 0x10203040,r0,r7 - sr.dz 5,8,r7,r9 - expect r9,0x00000082,"sr #15" - - sr.dz r4,8,r7,r9 - expect r9,0x00000082,"sr #16" - - addu 0x0f0e0d0c,r0,r9 - sr.dz 5,8,r9,r7 - expect r7,0x00000068,"sr #17" - - sr.dz r4,8,r9,r7 - expect r7,0x00000068,"sr #18" - - write "Test sra" - addu 5,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sra 5,32,r7,r9 - expect r9,0x00091a2b,"sra #1" - - sra r4,32,r7,r9 - expect r9,0x00091a2b,"sra #2" - - addu 0xfedcba98,r0,r9 - sra 5,32,r9,r7 - expect r7,0xfff6e5d4,"sra #3" - - addu 0x1234567,r0,r7 - sra r4,32,r9,r7 - expect r7,0xfff6e5d4,"sra #4" - - addu 0xaabbccdd, r0, r4 - sra 0,0,r4,r2 - expect r2, 0xaabbccdd, "sra #5" - - write "Test sri" - addu 5,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - sri.em 5,11,r7,r9 - expect r9,0xf8091a98,"sri #1" - - sri.em r4,11,r7,r9 - expect r9,0xf8091a98,"sri #2" - - write "Test srl" - addu 5,r0,r4 - addu 0x1234567,r0,r7 - addu 0xfedcba98,r0,r9 - srl 5,32,r7,r9 - expect r9,0x00091a2b,"srl #1" - - srl r4,32,r7,r9 - expect r9,0x00091a2b,"srl #2" - - addu 0xfedcba98,r0,r9 - srl 5,32,r9,r7 - expect r7,0x07f6e5d4,"srl #3" - - addu 0x1234567,r0,r7 - srl r4,32,r9,r7 - expect r7,0x07f6e5d4,"srl #4" - - write "Test sub" - addu 0x12345678,r0,r7 - addu 0x12345677,r0,r8 - sub r7,r8,r9 - expect r9,1,"sub #1" - - addu 1,r0,r8 - sub 2,r8,r9 - expect r9,1,"sub #2" - - addu 0x12345677,r0,r8 - sub 0x12345678,r8,r9 - expect r9,1,"sub #3" - -; This overflows -; addu 0,r0,r7 -; addu 0x80000000,r0,r8 -; sub r7,r8,r9 -; expect r9,0x80000000,"sub #4" - - write "Test subu" - addu 0x12345678,r0,r7 - addu 0x12345677,r0,r8 - subu r7,r8,r9 - expect r9,1,"subu #1" - - addu 1,r0,r8 - subu 2,r8,r9 - expect r9,1,"subu #2" - - addu 0x12345677,r0,r8 - subu 0x12345678,r8,r9 - expect r9,1,"subu #3" - - addu 0,r0,r7 - addu 0x80000000,r0,r8 - subu r7,r8,r9 - expect r9,0x80000000,"subu #4" - - write "Test xnor" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - xnor r7,r8,r9 - expect r9,0xedcba988,"xnor #1" - - xnor 0x7fff,r8,r9 - expect r9,0xedcbd678,"xnor #2" - - xnor 0xff0000ff,r8,r9 - expect r9,0x12cba978,"xnor #3" - - write "Test xor" - addu 0xf,r0,r7 - addu 0x12345678,r0,r8 - xor r7,r8,r9 - expect r9,0x12345677,"xor #1" - - xor 0x7fff,r8,r9 - expect r9,0x12342987,"xor #2" - - xor 0xff0000ff,r8,r9 - expect r9,0xed345687,"xor #3" - - write "Done" - ld _errors(r0),r2 ; # of errors - addu 1,r0,r15 ; exit system call number - trap 72 - - |