diff options
Diffstat (limited to 'sim/testsuite/frv/tinc.cgs')
| -rw-r--r-- | sim/testsuite/frv/tinc.cgs | 100 |
1 files changed, 100 insertions, 0 deletions
diff --git a/sim/testsuite/frv/tinc.cgs b/sim/testsuite/frv/tinc.cgs new file mode 100644 index 0000000..8e99e31 --- /dev/null +++ b/sim/testsuite/frv/tinc.cgs @@ -0,0 +1,100 @@ +# frv testcase for tinc $ICCi_2,$GRi,$s12 +# mach: all + + .include "testutils.inc" + + start + + .global tinc +tinc: + and_spr_immed -4081,tbr ; clear tbr.tt + set_gr_spr tbr,gr7 + inc_gr_immed 2112,gr7 ; address of exception handler + set_bctrlr_0_0 gr7 ; bctrlr 0,0 + + set_spr_immed 128,lcr + set_gr_immed 0,gr7 + + set_psr_et 1 + set_spr_addr ok0,lr + set_icc 0x0 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +ok0: + set_spr_addr bad,lr + set_icc 0x1 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr ok2,lr + set_icc 0x2 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +ok2: + set_spr_addr bad,lr + set_icc 0x3 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr ok4,lr + set_icc 0x4 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +ok4: + set_spr_addr bad,lr + set_icc 0x5 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr ok6,lr + set_icc 0x6 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +ok6: + set_spr_addr bad,lr + set_icc 0x7 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr ok8,lr + set_icc 0x8 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +ok8: + set_spr_addr bad,lr + set_icc 0x9 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr oka,lr + set_icc 0xa 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +oka: + set_spr_addr bad,lr + set_icc 0xb 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr okc,lr + set_icc 0xc 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +okc: + set_spr_addr bad,lr + set_icc 0xd 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + set_psr_et 1 + set_spr_addr oke,lr + set_icc 0xe 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + fail +oke: + set_spr_addr bad,lr + set_icc 0xf 0 + tinc icc0,gr7,4 ; should branch to tbr + (128 + 4)*16 + + pass +bad: + fail |