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Diffstat (limited to 'sim/sh64/tconfig.h')
| -rw-r--r-- | sim/sh64/tconfig.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/sim/sh64/tconfig.h b/sim/sh64/tconfig.h new file mode 100644 index 0000000..9d64be9 --- /dev/null +++ b/sim/sh64/tconfig.h @@ -0,0 +1,39 @@ +/* SH64 target configuration file. -*- C -*- */ + +/* Define this if the simulator can vary the size of memory. + See the xxx simulator for an example. + This enables the `-m size' option. + The memory size is stored in STATE_MEM_SIZE. */ +/* Not used for SH64 since we use the memory module. TODO -- check this */ +/* #define SIM_HAVE_MEM_SIZE */ + +/* See sim-hload.c. We properly handle LMA. -- TODO: check this */ +#define SIM_HANDLES_LMA 1 + +/* For MSPR support. FIXME: revisit. */ +#define WITH_DEVICES 0 + +#if 0 +/* Enable watchpoints. */ +#define WITH_WATCHPOINTS 1 +#endif + +/* ??? Temporary hack until model support unified. */ +#define SIM_HAVE_MODEL + +/* Define this to enable the intrinsic breakpoint mechanism. */ +/* FIXME: may be able to remove SIM_HAVE_BREAKPOINTS since it essentially + duplicates ifdef SIM_BREAKPOINT (right?) */ +#if 1 +#define SIM_HAVE_BREAKPOINTS +#define SIM_BREAKPOINT { 0, 0, 0, 0xD } +#define SIM_BREAKPOINT_SIZE 4 +#endif + +/* This is a global setting. Different cpu families can't mix-n-match -scache + and -pbb. However some cpu families may use -simple while others use + one of -scache/-pbb. ???? */ +#define WITH_SCACHE_PBB 1 + +/* Define this if the target cpu is bi-endian and the simulator supports it. */ +#define SIM_HAVE_BIENDIAN |