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-rwxr-xr-xsim/riscv/configure57
1 files changed, 2 insertions, 55 deletions
diff --git a/sim/riscv/configure b/sim/riscv/configure
index aa123f5..cdbedcc 100755
--- a/sim/riscv/configure
+++ b/sim/riscv/configure
@@ -634,7 +634,6 @@ LIBOBJS
sim_reserved_bits
sim_scache
sim_float
-sim_alignment
cgen_breaks
MAINT
MAINTAINER_MODE_FALSE
@@ -752,7 +751,6 @@ sim_inline
sim_hw
sim_hw_objs
sim_hw_cflags
-sim_endian
sim_default_model
sim_bitsize'
ac_subst_files=''
@@ -768,7 +766,6 @@ with_gnu_ld
enable_libtool_lock
enable_maintainer_mode
enable_sim_inline
-enable_sim_endian
enable_sim_default_model
enable_sim_bitsize
enable_werror
@@ -1413,8 +1410,6 @@ Optional Features:
sometimes confusing) to the casual installer
--enable-sim-inline=inlines
Specify which functions should be inlined
- --enable-sim-endian=endian
- Specify target byte endian orientation
--enable-sim-default-model=model
Specify default model to simulate
--enable-sim-bitsize=N Specify target bitsize (32 or 64)
@@ -10747,7 +10742,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 10750 "configure"
+#line 10745 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -10853,7 +10848,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
-#line 10856 "configure"
+#line 10851 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@@ -11148,52 +11143,6 @@ fi
-
-wire_endian="LITTLE"
-default_endian=""
-# Check whether --enable-sim-endian was given.
-if test "${enable_sim_endian+set}" = set; then :
- enableval=$enable_sim_endian; case "${enableval}" in
- b*|B*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_BIG";;
- l*|L*) sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_LITTLE";;
- yes) if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_${wire_endian}"
- else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_${default_endian}"
- else
- echo "No hard-wired endian for target $target" 1>&6
- sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_UNKNOWN"
- fi
- fi;;
- no) if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=BFD_ENDIAN_${default_endian}"
- else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=BFD_ENDIAN_${wire_endian}"
- else
- echo "No default endian for target $target" 1>&6
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=BFD_ENDIAN_UNKNOWN"
- fi
- fi;;
- *) as_fn_error $? "\"Unknown value $enableval for --enable-sim-endian\"" "$LINENO" 5; sim_endian="";;
-esac
-if test x"$silent" != x"yes" && test x"$sim_endian" != x""; then
- echo "Setting endian flags = $sim_endian" 6>&1
-fi
-else
- if test x"$default_endian" != x; then
- sim_endian="-DWITH_DEFAULT_TARGET_BYTE_ORDER=BFD_ENDIAN_${default_endian}"
-else
- if test x"$wire_endian" != x; then
- sim_endian="-DWITH_TARGET_BYTE_ORDER=BFD_ENDIAN_${wire_endian}"
- else
- sim_endian=
- fi
-fi
-fi
-
-
# Select the default model for the target.
riscv_model=
case "${target}" in
@@ -11506,8 +11455,6 @@ ac_config_commands="$ac_config_commands stamp-h"
-
-
cat >confcache <<\_ACEOF
# This file is a shell script that caches the results of configure
# tests run on this system so they can be shared between configure