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Diffstat (limited to 'sim/mn10300/ChangeLog')
| -rw-r--r-- | sim/mn10300/ChangeLog | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog index 251f478..1278b76 100644 --- a/sim/mn10300/ChangeLog +++ b/sim/mn10300/ChangeLog @@ -1,3 +1,8 @@ +Wed Aug 26 09:29:38 1998 Joyce Janczyn <janczyn@cygnus.com> + + * mn10300.igen (div,divu): Fix divide instructions so divide by 0 + behaves like the hardware. + Tue Aug 25 16:46:59 1998 Joyce Janczyn <janczyn@cygnus.com> * mn10300.igen (OP_F0F4): Need to load contents of register AN0 |