diff options
Diffstat (limited to 'sim/mips')
| -rw-r--r-- | sim/mips/ChangeLog | 8 | ||||
| -rw-r--r-- | sim/mips/sim-main.h | 7 |
2 files changed, 15 insertions, 0 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 61b922e..a6e059c 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,7 @@ +2000-05-24 Michael Hayes <mhayes@cygnus.com> + + * mips.igen (do_dmultx): Fix typo. + Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> * configure: Regenerated to track ../common/aclocal.m4 changes. @@ -6,6 +10,10 @@ Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com> * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call. +2000-04-12 Frank Ch. Eigler <fche@redhat.com> + + * sim-main.h (GPR_CLEAR): Define macro. + Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com> * interp.c (decode_coproc): Output long using %lx and not %s. diff --git a/sim/mips/sim-main.h b/sim/mips/sim-main.h index 6b6a6f9..4ec46e9 100644 --- a/sim/mips/sim-main.h +++ b/sim/mips/sim-main.h @@ -773,6 +773,13 @@ char* pr_addr PARAMS ((SIM_ADDR addr)); char* pr_uword64 PARAMS ((uword64 addr)); +/* Some mips flavours split their GPR banks into two halves. */ +#ifdef SPLIT_GPR +#define GPR_CLEAR(N) do { GPR_SET((N),0); GPR1_SET((N),0); } while (0) +#else +#define GPR_CLEAR(N) do { GPR_SET((N),0); } while (0) +#endif + void mips_cpu_exception_trigger(SIM_DESC sd, sim_cpu* cpu, address_word pc); void mips_cpu_exception_suspend(SIM_DESC sd, sim_cpu* cpu, int exception); void mips_cpu_exception_resume(SIM_DESC sd, sim_cpu* cpu, int exception); |