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-rw-r--r--sim/mips/ChangeLog5
-rw-r--r--sim/mips/mips.igen6
2 files changed, 7 insertions, 4 deletions
diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 3581d5e..9e19ed9 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+2002-02-28 Chris Demetriou <cgd@broadcom.com>
+
+ * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
+ filter flags "32,f".
+
2002-02-27 Chris Demetriou <cgd@broadcom.com>
* mips.igen (PREFX): This is a 64-bit instruction, use '64'
diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 76b45e9..57565e7 100644
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -3576,9 +3576,8 @@
}
-110101,5.BASE,5.FT,16.OFFSET:COP1:64::LDC1
+110101,5.BASE,5.FT,16.OFFSET:COP1:32,f::LDC1
"ldc1 f<FT>, <OFFSET>(r<BASE>)"
-*mipsI:
*mipsII:
*mipsIII:
*mipsIV:
@@ -4081,9 +4080,8 @@
}
-111101,5.BASE,5.FT,16.OFFSET:COP1:64::SDC1
+111101,5.BASE,5.FT,16.OFFSET:COP1:32,f::SDC1
"sdc1 f<FT>, <OFFSET>(r<BASE>)"
-*mipsI:
*mipsII:
*mipsIII:
*mipsIV: